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11. 发明申请

US20140061948A1 SENSOR PACKAGING METHOD AND SENSOR PACKAGES 有权
标题翻译：传感器包装方法和传感器包装
公开(公告)号：US20140061948A1
公开(公告)日：2014-03-06
申请号：US13597824
申请日：2012-08-29
申请人： Philip H. Bowles , Paige M. Holm , Stephen R. Hooper , Raymond M. Roop
发明人： Philip H. Bowles , Paige M. Holm , Stephen R. Hooper , Raymond M. Roop
IPC分类号： H01L23/52 , H01L21/50
CPC分类号： H01L23/528 , B81C1/0023 , B81C1/00238 , B81C2201/019 , B81C2203/0792 , H01L2224/48091 , H01L2924/1461 , H01L2924/00014 , H01L2924/00
摘要： A method (80) entails providing (82) a structure (117), providing (100) a controller element (102, 24), and bonding (116) the controller element to an outer surface (52, 64) of the structure (117). The structure includes a sensor wafer (92) and a cap wafer (94). Inner surfaces (34, 36) of the wafers (92, 94) are coupled together, with sensors (30) interposed between the wafers (92, 94). One wafer (94, 92) includes a substrate portion (40, 76) with bond pads (42) formed on its inner surface (34, 36). The other wafer (94, 92) conceals the substrate portion (40, 76). After bonding, methodology (80) entails forming (120) conductive elements (60) on the element (102, 24), removing (126) material sections (96, 98, 107) from the wafers (92, 94, 102) to expose the bond pads (42), forming (130) electrical interconnects (56), applying (134) packaging material (64), and singulating (138) to produce sensor packages (20, 70).
摘要翻译：方法（80）需要提供（82）结构（117），提供（100）控制器元件（102,24），并且将所述控制器元件（116）结合（116）到所述结构的外表面（52,64） 117）。该结构包括传感器晶片（92）和盖晶片（94）。晶片（92,94）的内表面（34,36）被耦合在一起，传感器（30）置于晶片（92,94）之间。一个晶片（94,92）包括具有形成在其内表面（34,36）上的接合焊盘（42）的衬底部分（40,76）。另一个晶片（94,92）隐藏基板部分（40,76）。在键合之后，方法（80）需要在元件（102,24）上形成（120）导电元件（60），将材料部分（96,98,107）从晶片（92,94,107）移除到露出接合焊盘（42），形成（130）电互连（56），施加（134）包装材料（64）和单分离（138）以产生传感器封装（20,70）。

12. 发明授权

US5291607A Microprocessor having environmental sensing capability 失效
标题翻译：具有环境感知能力的微处理器
公开(公告)号：US5291607A
公开(公告)日：1994-03-01
申请号：US965549
申请日：1992-10-23
申请人： Ljubisa Ristic , William C. Dunn , Bertrand F. Cambou , Lewis E. Terry , Raymond M. Roop
发明人： Ljubisa Ristic , William C. Dunn , Bertrand F. Cambou , Lewis E. Terry , Raymond M. Roop
IPC分类号： H02H5/00 , G06F15/20 , G01D5/00
CPC分类号： H02H5/00
摘要： A microprocessor having a monolithically integrated environmental sensor is provided. The microprocessor is shielded from an environmental signal by isolation which is specific to the type of sensor used, thereby allowing the sensor to be exposed to the environmental signal. Optionally, high current drive circuitry is integrated with the microprocessor-sensor circuit to provide a monolithic device which allows control of power loads based in part on output from an environmental sensing device.
摘要翻译：提供具有单片集成环境传感器的微处理器。微处理器通过隔离来屏蔽环境信号，这是特定于使用的传感器类型，从而允许传感器暴露于环境信号。可选地，高电流驱动电路与微处理器传感器电路集成以提供单片设备，其允许部分地基于来自环境感测设备的输出来控制功率负载。

13. 发明授权

US5260596A Monolithic circuit with integrated bulk structure resonator 失效
标题翻译：具有集成体积结构谐振器的单片电路
公开(公告)号：US5260596A
公开(公告)日：1993-11-09
申请号：US681258
申请日：1991-04-08
申请人： William C. Dunn , H. Ming Liaw , Ljubisa Ristic , Raymond M. Roop
发明人： William C. Dunn , H. Ming Liaw , Ljubisa Ristic , Raymond M. Roop
IPC分类号： H01L27/20 , H03H9/05 , H03H9/17 , H03H9/19 , H03H9/24 , H01L29/66 , H01L29/96
CPC分类号： H03H9/173 , H01L27/20 , H03H9/0542 , H03H9/2426 , H03H9/2457
摘要： A structure is provided to integrate bulk structure resonators into a monolithic integrated circuit chip. The chip also contains the remaining circuit components (17, 21, 24) required for the desired system function. Micromachining techniques are used to fabricate both support and a cavity (11, 27, 28) which allows mechanical vibration without interference. Alternative embodiments incorporate the use of non-piezoelectric mechanical resonators (14), quartz crystal resonators (18) and thin film piezoelectric resonators (22). Each type of resonator is used for the range of frequencies to which it is suited, providing a family of monolithic resonators capable of being used with integrated circuits having operating frequencies from a few hundred hertz to over 500 Mhz.
摘要翻译：提供了将体结构谐振器集成到单片集成电路芯片中的结构。该芯片还包含所需系统功能所需的其余电路元件（17,21,24）。微加工技术用于制造支撑件和腔体（11,27,28），其允许机械振动而不受干扰。替代实施例包括使用非压电机械谐振器（14），石英晶体谐振器（18）和薄膜压电谐振器（22）。每种类型的谐振器用于其适合的频率范围，提供能够与具有几百赫兹至500Mhz以上的工作频率的集成电路一起使用的单片谐振器系列。

14. 发明授权

US5493248A Integrated circuit for sensing an environmental condition and producing a high power circuit 失效
标题翻译：用于感测环境条件并产生高功率电路的集成电路
公开(公告)号：US5493248A
公开(公告)日：1996-02-20
申请号：US933968
申请日：1992-08-24
申请人： William C. Dunn , Ljubisa Ristic , Bertrand F. Cambou , Lewis E. Terry , Raymond M. Roop
发明人： William C. Dunn , Ljubisa Ristic , Bertrand F. Cambou , Lewis E. Terry , Raymond M. Roop
IPC分类号： G01D3/028 , H01L35/00 , H01L25/00 , H03K3/00
CPC分类号： G01D3/028
摘要： An environmental sensor integrated with high current drive device is provided. An environmental sensor is fabricated on a semiconductor substrate using conventional MOS process used for N-well CMOS logic and DMOS power transistors. An N-well is preferably used as a junction etch stop for micromachining of mechanical sensor components. A high voltage P-type region is used to electrically isolate the high current device from the sensor device. By locating the sensor device away from the high current drive device on a common semiconductor substrate, good performance can be achieved from the sensor even while the high current device dissipates a large amount of power.
摘要翻译：提供与大电流驱动装置集成的环境传感器。使用用于N阱CMOS逻辑和DMOS功率晶体管的常规MOS工艺在半导体衬底上制造环境传感器。优选使用N阱作为用于机械传感器部件的微加工的结腐蚀终止。高压P型区域用于将高电流装置与传感器装置电隔离。通过将传感器装置定位在公共半导体衬底上的高电流驱动装置上，即使在高电流装置耗散大量功率的情况下也可以从传感器获得良好的性能。

15. 发明授权

US5329815A Vibration monolithic gyroscope 失效
标题翻译：振动单片陀螺仪
公开(公告)号：US5329815A
公开(公告)日：1994-07-19
申请号：US810064
申请日：1991-12-19
申请人： William C. Dunn , Raymond M. Roop
发明人： William C. Dunn , Raymond M. Roop
IPC分类号： G01C19/5719 , G01P9/04
CPC分类号： G01C19/5719
摘要： A vibration gyroscope including a central mounting post and a planar mass symmetrically affixed thereto for vibrational movement. The post and mass are formed from a single layer of semiconductor material deposited on a substrate, such as silicon. Capacitive plates positioned below and above the mass, formed by depositing two additional layers of semiconductor material, are utilized for driving the mass and sensing vibration produced by the Coriolis effect.
摘要翻译：振动陀螺仪，其包括中心安装柱和对称地固定在其上的平面质量用于振动运动。柱和质量由沉积在诸如硅的衬底上的单层半导体材料形成。通过沉积两个另外的半导体材料层而形成的位于质量块下方和上方的电容板用于驱动质量并感测由科里奥利效应产生的振动。

16. 发明授权

US07585744B2 Method of forming a seal for a semiconductor device 有权
标题翻译：形成用于半导体器件的密封件的方法
公开(公告)号：US07585744B2
公开(公告)日：2009-09-08
申请号：US10730230
申请日：2003-12-08
申请人： Bishnu P. Gogoi , Raymond M. Roop , Hemant D. Desai
发明人： Bishnu P. Gogoi , Raymond M. Roop , Hemant D. Desai
IPC分类号： H01L21/76
CPC分类号： B81C1/00293 , B81C2203/0136 , B81C2203/0145
摘要： In one embodiment, a reflowable layer 51 is deposited over a semiconductor device 10 and reflowed in an environment having a pressure approximately equal to that of atmosphere to form a seal layer 52. The seal layer 52 seals all openings 43 in the underlying layer of the semiconductor device 10. Since the reflow is performed at approximately atmospheric pressure a gap 50 which was coupled to the opening 43 is sealed at approximately atmospheric pressure, which is desirable for the semiconductor device 10 to avoid oscillation. The seal layer 52 is also desirable because it prevents particles from entering the gap 50. In another embodiment, the seal layer 52 is deposited in an environment having a pressure approximately equal to atmospheric pressure to seal the hole 43 without a reflow being performed.
摘要翻译：在一个实施例中，可回流层51沉积在半导体器件10上并且在具有大致等于大气压力的压力的环境中回流以形成密封层52.密封层52将所有的开口43密封在由于回流在近似大气压下进行，所以连接到开口43的间隙50在大气压下被密封，这对于半导体器件10来说避免振荡是期望的。密封层52也是期望的，因为它防止颗粒进入间隙50.在另一个实施例中，密封层52沉积在具有大致等于大气压力的压力的环境中，以密封孔43而不进行回流。

17. 发明授权

US06720635B1 Electronic component 有权
标题翻译：电子元器件
公开(公告)号：US06720635B1
公开(公告)日：2004-04-13
申请号：US09466337
申请日：1999-12-17
申请人： Daniel J. Koch , Bishnu Prasanna Gogoi , Raymond M. Roop
发明人： Daniel J. Koch , Bishnu Prasanna Gogoi , Raymond M. Roop
IPC分类号： H01L2984
CPC分类号： H01L23/16 , B81B2201/025 , B81B2201/0264 , B81C1/00246 , B81C2203/0778 , G01P15/0802 , G01P15/125 , G01P2015/0814 , H01L2924/0002 , H01L2924/00
摘要： An electronic component includes a composite semiconductor substrate (110, 810) having a first side (111) opposite a second side (112), a semiconductor device (160, 170) at the first side of the composite semiconductor substrate, and a transducer (400, 600, 900) at the second side of the composite semiconductor substrate.
摘要翻译：电子部件包括具有与第二侧（112）相对的第一侧（111）和复合半导体衬底的第一侧的半导体器件（160,170）的复合半导体衬底（110,810）和换能器 400,600,900）在复合半导体衬底的第二侧。

18. 发明授权

US06916728B2 Method for forming a semiconductor structure through epitaxial growth 有权
标题翻译：通过外延生长形成半导体结构的方法
公开(公告)号：US06916728B2
公开(公告)日：2005-07-12
申请号：US10328923
申请日：2002-12-23
申请人： Bishnu Gogoi , Raymond M. Roop
发明人： Bishnu Gogoi , Raymond M. Roop
IPC分类号： B81B3/00 , H01L21/20 , H01L21/22
CPC分类号： B81C1/00476 , B81B2201/025 , B81B2203/0307 , B81C2201/0109 , Y10S438/977
摘要： A method for creating a MEMS structure is provided. In accordance with the method, an article is provided which comprises a substrate (101) and a single crystal semiconductor layer (105), and having a sacrificial layer (103) comprising a first dielectric material which is disposed between the substrate and the semiconductor layer. An opening (107) is created which extends through the semiconductor layer (105) and the sacrificial layer (103) and which exposes a portion of the substrate (101). An anchor portion (109) comprising a second dielectric material is then formed in the opening (107). Next, the semiconductor layer (105) is epitaxially grown to a suitable device thickness, thereby forming a device layer (111).
摘要翻译：提供了一种用于产生MEMS结构的方法。根据该方法，提供一种包括基板（101）和单晶半导体层（105）的制品，并且具有包括设置在基板和半导体层之间的第一介电材料的牺牲层（103）。产生一个开口（107），其延伸穿过半导体层（105）和牺牲层（103），并露出基底（101）的一部分。然后在开口（107）中形成包括第二电介质材料的锚定部分（109）。接下来，将半导体层（105）外延生长至合适的器件厚度，从而形成器件层（111）。

19. 发明授权

US5818093A Semiconductor device having a movable gate 失效
标题翻译：具有可移动栅极的半导体器件
公开(公告)号：US5818093A
公开(公告)日：1998-10-06
申请号：US591875
申请日：1996-01-25
申请人： Ronald J. Gutteridge , Margaret L. Kniffin , Zuoying L. Zhang , Raymond M. Roop
发明人： Ronald J. Gutteridge , Margaret L. Kniffin , Zuoying L. Zhang , Raymond M. Roop
IPC分类号： G01P15/08 , G01P15/12 , H01L29/78 , H01L29/84 , H01L27/14 , H01L27/20 , H01L29/82
CPC分类号： G01P15/0802 , G01P15/124
摘要： A semiconductor device (8) has a movable gate (20) over a semiconductor substrate (14) having a top surface (30). Source and drain regions (16-19) are in the substrate, and a channel region (24,25) is between the source and drain regions. The gate is suspended above the source and drain regions such that the gate is movable in a plane substantially parallel to the top surface of the substrate. In one embodiment the device is an accelerometer having the gate connected to a beam (10) with an aspect ratio between 2:1 and 10:1. Also, the gate can have first and second levels (22,23) corresponding to first and second threshold voltages of the channel region.
摘要翻译：半导体器件（8）在具有顶表面（30）的半导体衬底（14）上方具有可移动栅极（20）。源区和漏区（16-19）位于衬底中，沟道区（24,25）位于源区和漏区之间。栅极悬挂在源极和漏极区域之上，使得栅极可在基本上平行于衬底的顶表面的平面中移动。在一个实施例中，该装置是加速度计，其具有连接到长宽比在2:1和10:1之间的梁（10）的栅极。此外，栅极可以具有对应于沟道区的第一和第二阈值电压的第一和第二电平（22,23）。

20. 发明授权

US5141887A Low voltage, deep junction device and method 失效
标题翻译：低电压，深接点器件及方法
公开(公告)号：US5141887A
公开(公告)日：1992-08-25
申请号：US687192
申请日：1991-04-17
申请人： Hang M. Liaw , Frank S. d'Aragona , Raymond M. Roop , Dennis R. Olsen
发明人： Hang M. Liaw , Frank S. d'Aragona , Raymond M. Roop , Dennis R. Olsen
IPC分类号： H01L21/18 , H01L21/306
CPC分类号： H01L21/02046 , H01L21/187 , Y10S148/012
摘要： A method of fabricating a low voltage, deep junction semiconductor device includes providing first and second wafers of opposite conductivity types, each having a dopant concentration of at least 4.0.times.10.sup.16 atoms/cc. After cleaning the wafers and removing heavy metal impurities therefrom by gettering, the wafers are bonded together. This method results in the successful fabrication of semiconductor devices having a junction depth in the range of 20 to 500 microns and a breakdown voltage of less than 20 volts.
摘要翻译：制造低电压深结半导体器件的方法包括提供具有至少4.0×10 16原子/ cc的掺杂剂浓度的相反导电类型的第一和第二晶片。在清洗晶片并通过吸气除去重金属杂质之后，将晶片结合在一起。该方法导致半导体器件的成功制造，其结深在20至500微米的范围内，击穿电压小于20伏。

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