专利快速检索-快速检索全球专利，免费商用专利数据库-IPRDB

11. 发明授权

US06853006B2 Silicon carbide semiconductor device 有权
标题翻译：碳化硅半导体器件
公开(公告)号：US06853006B2
公开(公告)日：2005-02-08
申请号：US10630978
申请日：2003-07-31
申请人： Mitsuhiro Kataoka , Yuuichi Takeuchi , Masami Naito , Rajesh Kumar , Hiroyuki Matsunami , Tsunenobu Kimoto
发明人： Mitsuhiro Kataoka , Yuuichi Takeuchi , Masami Naito , Rajesh Kumar , Hiroyuki Matsunami , Tsunenobu Kimoto
IPC分类号： H01L29/80 , H01L21/04 , H01L21/337 , H01L29/04 , H01L29/24 , H01L29/808 , H01L31/312
CPC分类号： H01L29/66068 , H01L29/045 , H01L29/1608 , H01L29/8083
摘要： A silicon carbide (SiC) substrate is provided with an off-oriented {0001} surface whose off-axis direction is . A trench is formed on the SiC to have a stripe structure extending toward a direction. An SiC epitaxial layer is formed on an inside surface of the trench.
摘要翻译：碳化硅（SiC）衬底设置有离轴取向{0001}表面，其离轴方向<11-20>。在SiC上形成沟槽以具有向<11-20>方向延伸的条纹结构。在沟槽的内表面上形成SiC外延层。

12. 发明授权

US07989231B2 Method of manufacturing silicon carbide semiconductor device 有权
标题翻译：制造碳化硅半导体器件的方法
公开(公告)号：US07989231B2
公开(公告)日：2011-08-02
申请号：US12659495
申请日：2010-03-11
申请人： Atsuya Akiba , Yuuichi Takeuchi
发明人： Atsuya Akiba , Yuuichi Takeuchi
IPC分类号： H01L21/66
CPC分类号： H01L22/12 , H01L21/02378 , H01L21/0243 , H01L21/02529
摘要： In a method of manufacturing a silicon carbide semiconductor device, a trench and a thickness measurement section are formed in a surface of a semiconductor substrate made of silicon carbide. The thickness measurement section includes a plurality of grooves and a protruding portion provided between the grooves so as to have a predetermined width. When an epitaxial layer made of silicon carbide is grown, a thickness of the epitaxial layer formed on the surface of the semiconductor substrate is measured by calculating a difference in height between a surface of the epitaxial layer formed on a portion of the surface of the semiconductor substrate different from the thickness measurement section and a top surface of the protruding portion. The predetermined width is less than a surface migration amount of atoms during growth of the epitaxial layer.
摘要翻译：在制造碳化硅半导体器件的方法中，在由碳化硅制成的半导体衬底的表面中形成沟槽和厚度测量部分。厚度测量部分包括多个凹槽和设置在凹槽之间以具有预定宽度的突出部分。当生长由碳化硅制成的外延层时，通过计算形成在半导体表面的一部分表面上的外延层的表面之间的高度差来测量在半导体衬底的表面上形成的外延层的厚度基板不同于厚度测量部分和突出部分的顶表面。预定宽度小于外延层生长期间原子的表面迁移量。

13. 发明申请

US20090124060A1 Method for manufacturing silicon carbide semiconductor apparatus 有权
标题翻译：碳化硅半导体器件的制造方法
公开(公告)号：US20090124060A1
公开(公告)日：2009-05-14
申请号：US12289413
申请日：2008-10-28
申请人： Masatake Nagaya , Yuuichi Takeuchi , Katsuhiro Nagata
发明人： Masatake Nagaya , Yuuichi Takeuchi , Katsuhiro Nagata
IPC分类号： H01L21/76 , H01L21/461
CPC分类号： H01L21/8213 , H01L21/02013 , H01L21/02024 , H01L21/30625 , H01L29/1608 , Y10S438/931
摘要： A method for manufacturing a silicon carbide semiconductor apparatus is disclosed. According to the method, an element structure is formed on a front surface side of a semiconductor substrate. A rear surface of the semiconductor substrate is grinded or polished in a direction parallel to a flat surface of a table. A front surface of the semiconductor substrate is grinded and polished in a direction parallel to the rear surface after the rear surface of the semiconductor substrate is grinded or polished.
摘要翻译：公开了一种制造碳化硅半导体器件的方法。根据该方法，在半导体基板的正面侧形成元件结构。半导体衬底的后表面在与平台的平坦表面平行的方向上被研磨或抛光。在研磨或抛光半导体衬底的后表面之后，在与背面平行的方向上研磨和抛光半导体衬底的前表面。

14. 发明申请

US20090114969A1 Silicon carbide semiconductor device and related manufacturing method 有权
标题翻译：碳化硅半导体器件及相关制造方法
公开(公告)号：US20090114969A1
公开(公告)日：2009-05-07
申请号：US12289624
申请日：2008-10-30
申请人： Naohiro Suzuki , Yuuichi Takeuchi , Takeshi Endo , Eiichi Okuno , Toshimasa Yamamoto
发明人： Naohiro Suzuki , Yuuichi Takeuchi , Takeshi Endo , Eiichi Okuno , Toshimasa Yamamoto
IPC分类号： H01L29/94 , H01L21/04 , H01L29/68
CPC分类号： H01L29/7813 , H01L29/045 , H01L29/0619 , H01L29/0623 , H01L29/0634 , H01L29/0847 , H01L29/1095 , H01L29/1608 , H01L29/47 , H01L29/66068 , H01L29/7391 , H01L29/7397 , H01L29/7828
摘要： An SiC semiconductor device and a related manufacturing method are disclosed having a structure provided with a p+-type deep layer formed in a depth equal to or greater than that of a trench to cause a depletion layer between at a PN junction between the p+-type deep layer and an n−-type drift layer to extend into the n−-type drift layer in a remarkable length, making it difficult for a high voltage, resulting from an adverse affect arising from a drain voltage, to enter a gate oxide film. This results in a capability of minimizing an electric field concentration in the gate oxide film, i.e., an electric field concentration occurring at the gate oxide film at a bottom wall of the trench.
摘要翻译：公开了一种SiC半导体器件和相关制造方法，其具有设置有等于或大于沟槽深度形成的p +型深层的结构，以在p +型之间的PN结处引起耗尽层深层和n型漂移层以非常长的长度延伸到n型漂移层中，使得由于漏极电压引起的不利影响导致的高电压难以进入栅极氧化膜。这导致使栅极氧化膜中的电场浓度最小化的能力，即在沟槽的底壁处的栅极氧化膜处发生的电场浓度。

15. 发明申请

US20050233539A1 Method for manufacturing semiconductor device having trench in silicon carbide semiconductor substrate 有权
标题翻译：一种在碳化硅半导体衬底中制造具有沟槽的半导体器件的方法
公开(公告)号：US20050233539A1
公开(公告)日：2005-10-20
申请号：US11105587
申请日：2005-04-14
申请人： Yuuichi Takeuchi , Rajesh Malhan , Hiroyuki Matsunami , Tsunenobu Kimoto
发明人： Yuuichi Takeuchi , Rajesh Malhan , Hiroyuki Matsunami , Tsunenobu Kimoto
IPC分类号： C30B23/02 , H01L21/04 , H01L21/306 , H01L21/337 , H01L21/76 , H01L29/04 , H01L29/24 , H01L29/78 , H01L29/808
CPC分类号： H01L29/045 , H01L29/66068 , H01L29/7828 , H01L29/8083
摘要： A method for manufacturing a silicon carbide semiconductor device includes the steps of: forming a trench mask on an upper surface of a semiconductor substrate; forming the trench such that the trench having an aspect ratio equal to or larger than 2 and having a trench slanting angle equal to or larger than 80 degrees is formed; and removing a damage portion in such a manner that the damage portion disposed on an inner surface of the trench formed in the semiconductor substrate in the step of forming the trench is etched and removed in hydrogen atmosphere under decompression pressure at a temperature equal to or higher than 1600° C.
摘要翻译：一种制造碳化硅半导体器件的方法包括以下步骤：在半导体衬底的上表面上形成沟槽掩模; 形成沟槽，使得形成具有等于或大于2并且具有等于或大于80度的沟槽倾斜角的纵横比的沟槽; 并且以这样的方式去除损伤部分，即在形成沟槽的步骤中形成在半导体衬底的沟槽的内表面上的损伤部分在氢气气氛中在等于或等于更高的温度的减压下被蚀刻和去除比1600℃

16. 发明授权

US5723376A Method of manufacturing SiC semiconductor device having double oxide film formation to reduce film defects 失效
标题翻译：制造具有双氧化膜形成以减少膜缺陷的SiC半导体器件的方法
公开(公告)号：US5723376A
公开(公告)日：1998-03-03
申请号：US745958
申请日：1996-11-07
申请人： Yuuichi Takeuchi , Takeshi Miyajima , Kazukuni Hara , Norihito Tokura
发明人： Yuuichi Takeuchi , Takeshi Miyajima , Kazukuni Hara , Norihito Tokura
IPC分类号： H01L21/04 , H01L29/423 , H01L29/78 , H01L21/265 , H01L21/44 , H01L21/48
CPC分类号： H01L29/7813 , H01L21/049 , H01L29/42368 , H01L29/66068 , Y10S438/931
摘要： A groove is formed on the surface of a semiconductor substrate composed of silicon carbide and a first thermal oxidation film is formed by executing thermal oxidation on a damaged layer of groove inner walls. Then, the first thermal oxidation film is removed so that the damaged layer can be removed. Since a second thermal oxidation film is formed after the damaged layer is removed, the second thermal oxidation film is uniform. A silicon carbide semiconductor device can be achieved with less side etching because substantially a (0001) carbon face of a cubic system is chosen as the plane orientation of the semiconductor substrate.
摘要翻译：在由碳化硅构成的半导体基板的表面上形成有槽，通过对凹槽内壁的损伤层进行热氧化而形成第一热氧化膜。然后，去除第一热氧化膜，从而可以去除损伤层。由于在损坏层被去除之后形成第二热氧化膜，所以第二热氧化膜是均匀的。可以通过较少的侧面蚀刻实现碳化硅半导体器件，因为基本上选择立方晶系的（0001）碳面作为半导体衬底的平面取向。

17. 发明授权

US5698880A Semiconductor device having a groove with a curved part formed on its side surface 失效
标题翻译：半导体器件具有在其侧表面上形成有弯曲部分的凹槽
公开(公告)号：US5698880A
公开(公告)日：1997-12-16
申请号：US539380
申请日：1995-10-05
申请人： Shigeki Takahashi , Mitsuhiro Kataoka , Tsuyoshi Yamamoto , Yuuichi Takeuchi , Norihito Tokura
发明人： Shigeki Takahashi , Mitsuhiro Kataoka , Tsuyoshi Yamamoto , Yuuichi Takeuchi , Norihito Tokura
IPC分类号： H01L21/336 , H01L29/76 , H01L29/94 , H01L31/062 , H01L31/113
CPC分类号： Y02E10/50
摘要： A manufacturing method for a semiconductor device, which can attain a low ion voltage in a manufacturing method for a semiconductor device involving a process for forming a groove by etching prior to selective oxidation, selectively oxidizing a region including the groove and thereby making a channel part of the groove, is disclosed. A groove part is thermally oxidized by using a silicon nitride film as a mask. A LOCOS oxide film is formed by this thermal oxidation, and concurrently a U-groove is formed on the surface of an n.sup.- -type epitaxial layer eroded by the LOCOS oxide film, and the shape of the U-groove is fixed. A curve part formed during a chemical dry etching process remains as a curve part on the side surface of the U-groove. Then, an n.sup.+ -type source layer is formed by means of thermal diffusion to a junction thickness of 0.5 to 1 .mu.m, and a channel is set up as well. The junction depth obtained by this thermal diffusion is set up more deeply than the curve part which is formed during the above etching and remains on the side surface of the U-groove after the above selective thermal oxidation.
摘要翻译：一种用于半导体器件的制造方法的半导体器件的制造方法，其包括在选择性氧化之前通过蚀刻形成沟槽的工艺的半导体器件的制造方法，选择性地氧化包括沟槽的区域，从而形成沟道部分的凹槽。通过使用氮化硅膜作为掩模将槽部热氧化。通过该热氧化形成LOCOS氧化物膜，并且在由LOCOS氧化物膜侵蚀的n型外延层的表面上形成U形槽，并且U形槽的形状被固定。在化学干蚀刻过程中形成的曲线部分在U形槽的侧表面上保持为曲线部分。然后，通过热扩散形成0.5±1μm的结合厚度的n +型源极层，并且还设置沟道。通过该热扩散获得的结深度比在上述蚀刻期间形成的曲线部分更深地设置，并且在上述选择性热氧化之后保留在U形槽的侧表面上。

18. 发明授权

US07825449B2 Silicon carbide semiconductor device and related manufacturing method 有权
标题翻译：碳化硅半导体器件及相关制造方法
公开(公告)号：US07825449B2
公开(公告)日：2010-11-02
申请号：US12289624
申请日：2008-10-30
申请人： Naohiro Suzuki , Yuuichi Takeuchi , Takeshi Endo , Eiichi Okuno , Toshimasa Yamamoto
发明人： Naohiro Suzuki , Yuuichi Takeuchi , Takeshi Endo , Eiichi Okuno , Toshimasa Yamamoto
IPC分类号： H01L29/94 , H01L21/04 , H01L29/68
CPC分类号： H01L29/7813 , H01L29/045 , H01L29/0619 , H01L29/0623 , H01L29/0634 , H01L29/0847 , H01L29/1095 , H01L29/1608 , H01L29/47 , H01L29/66068 , H01L29/7391 , H01L29/7397 , H01L29/7828
摘要： An SiC semiconductor device and a related manufacturing method are disclosed having a structure provided with a p+-type deep layer formed in a depth equal to or greater than that of a trench to cause a depletion layer between at a PN junction between the p+-type deep layer and an n−-type drift layer to extend into the n−-type drift layer in a remarkable length, making it difficult for a high voltage, resulting from an adverse affect arising from a drain voltage, to enter a gate oxide film. This results in a capability of minimizing an electric field concentration in the gate oxide film, i.e., an electric field concentration occurring at the gate oxide film at a bottom wall of the trench.
摘要翻译：公开了一种SiC半导体器件和相关制造方法，其具有设置有等于或大于沟槽深度形成的p +型深层的结构，以在p +型之间的PN结处引起耗尽层深层和n型漂移层以非常长的长度延伸到n型漂移层中，使得由于漏极电压引起的不利影响导致的高电压难以进入栅极氧化膜。这导致使栅极氧化膜中的电场浓度最小化的能力，即在沟槽的底壁处的栅极氧化膜处发生的电场浓度。

19. 发明申请

US20100233832A1 Method of manufacturing silicon carbide seminconductor device 有权
标题翻译：制造碳化硅半导体器件的方法
公开(公告)号：US20100233832A1
公开(公告)日：2010-09-16
申请号：US12659495
申请日：2010-03-11
申请人： Atsuya Akiba , Yuuichi Takeuchi
发明人： Atsuya Akiba , Yuuichi Takeuchi
IPC分类号： H01L21/66
CPC分类号： H01L22/12 , H01L21/02378 , H01L21/0243 , H01L21/02529
摘要： In a method of manufacturing a silicon carbide semiconductor device, a trench and a thickness measurement section are formed in a surface of a semiconductor substrate made of silicon carbide. The thickness measurement section includes a plurality of grooves and a protruding portion provided between the grooves so as to have a predetermined width. When an epitaxial layer made of silicon carbide is grown, a thickness of the epitaxial layer formed on the surface of the semiconductor substrate is measured by calculating a difference in height between a surface of the epitaxial layer formed on a portion of the surface of the semiconductor substrate different from the thickness measurement section and a top surface of the protruding portion. The predetermined width is less than a surface migration amount of atoms during growth of the epitaxial layer.
摘要翻译：在制造碳化硅半导体器件的方法中，在由碳化硅制成的半导体衬底的表面中形成沟槽和厚度测量部分。厚度测量部分包括多个凹槽和设置在凹槽之间以具有预定宽度的突出部分。当生长由碳化硅制成的外延层时，通过计算形成在半导体表面的一部分表面上的外延层的表面之间的高度差来测量在半导体衬底的表面上形成的外延层的厚度基板不同于厚度测量部分和突出部分的顶表面。预定宽度小于外延层生长期间原子的表面迁移量。

20. 发明授权

US07763543B2 Method for manufacturing silicon carbide semiconductor apparatus 有权
标题翻译：碳化硅半导体器件的制造方法
公开(公告)号：US07763543B2
公开(公告)日：2010-07-27
申请号：US12289413
申请日：2008-10-28
申请人： Masatake Nagaya , Yuuichi Takeuchi , Katsuhiro Nagata
发明人： Masatake Nagaya , Yuuichi Takeuchi , Katsuhiro Nagata
IPC分类号： H01L21/311
CPC分类号： H01L21/8213 , H01L21/02013 , H01L21/02024 , H01L21/30625 , H01L29/1608 , Y10S438/931
摘要： A method for manufacturing a silicon carbide semiconductor apparatus is disclosed. According to the method, an element structure is formed on a front surface side of a semiconductor substrate. A rear surface of the semiconductor substrate is grinded or polished in a direction parallel to a flat surface of a table. A front surface of the semiconductor substrate is grinded and polished in a direction parallel to the rear surface after the rear surface of the semiconductor substrate is grinded or polished.
摘要翻译：公开了一种制造碳化硅半导体器件的方法。根据该方法，在半导体基板的正面侧形成元件结构。半导体衬底的后表面在与平台的平坦表面平行的方向上被研磨或抛光。在研磨或抛光半导体衬底的后表面之后，在与背面平行的方向上研磨和抛光半导体衬底的前表面。

你已经成功收藏专利！

检索式保存成功!

IPRDB

热门服务

关于我们

友情链接

联系方式