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11. 发明授权

US06314100B1 Method of validation and host buffer allocation for unmapped fibre channel frames 失效
标题翻译：未映射光纤通道帧的验证方法和主机缓冲区分配
公开(公告)号：US06314100B1
公开(公告)日：2001-11-06
申请号：US09048930
申请日：1998-03-26
申请人： Bradley Roach , Stuart Berman , David Duckman
发明人： Bradley Roach , Stuart Berman , David Duckman
IPC分类号： H04L1256
CPC分类号： H04L49/901 , H04L49/357 , H04L49/90 , H04L49/9042 , H04L49/9094
摘要： A method of validation and host buffer allocation for unmapped fiber channel frames. More particularly, the invention encompasses a method of validating unmapped frames, each including a header and a payload, including receiving a frame as a current frame; determining if the current frame is a first frame in a sequence, and if so, saving the header and payload of the current frame in a buffer, and otherwise determining if the current frame is a next expected frame in the sequence; if the current frame is the next expected frame in the sequence, then saving the payload of the current frame in the buffer after the payload of the prior frame; determining if the current frame is a last frame in the sequence, and if so, sending a message to a host indicating receipt of the complete sequence; if the current frame is not the next expected frame in the sequence, then saving the header and payload of the current frame in the buffer, and sending a message to the host indicating receipt of a partial sequence. The host CPU is interrupted when either a complete sequence is received, or a partial sequence is received, followed by a frame from a different sequence. The host CPU may then process the concatenated payload of the sequence. The invention is particularly useful for processing TCP/IP frames in a Fiber Channel network.
摘要翻译：一种用于未映射光纤通道帧的验证方法和主机缓冲区分配方法。更具体地，本发明包括验证未映射帧的方法，每个帧包括报头和有效载荷，包括接收帧作为当前帧; 确定当前帧是否是序列中的第一帧，如果是，则将当前帧的报头和有效载荷保存在缓冲器中，否则确定当前帧是否是序列中的下一个预期帧; 如果当前帧是序列中的下一个预期帧，则将当前帧的有效载荷在先前帧的有效载荷之后保存在缓冲器中; 确定当前帧是否是序列中的最后一帧，如果是，则向主机发送指示接收到完整序列的消息; 如果当前帧不是序列中的下一个预期帧，则将当前帧的报头和有效载荷保存在缓冲器中，并向主机发送指示接收到部分序列的消息。当接收到完整的序列或接收到部分序列后，主机CPU被中断，后面是来自不同序列的帧。然后，主机CPU可以处理序列的级联有效载荷。本发明对于在光纤通道网络中处理TCP / IP帧特别有用。

12. 发明申请

US20070013705A1 Stacking series of non-power-of-two frame buffers in a memory array 有权
标题翻译：在存储器阵列中堆叠两个非功率的两帧缓冲器
公开(公告)号：US20070013705A1
公开(公告)日：2007-01-18
申请号：US11179221
申请日：2005-07-11
申请人： Bradley Roach , Raul Oteyza , David Duckman
发明人： Bradley Roach , Raul Oteyza , David Duckman
IPC分类号： G06F12/02
CPC分类号： G06F12/0223
摘要： Storing frames of data in frame buffers sized to match the frame size when the frame size is not a power-of-two number of bytes is disclosed. The buffer size is chosen to be the largest power-of-two that is less than the frame size. When a frame of data is to be stored, the buffer number of a free buffer is effectively multiplied by the buffer size to obtain a partial frame buffer address Q. The buffer size subtracted from the frame size is referred to as a residual buffer size, and the buffer number is effectively multiplied by the residual buffer size to obtain a residual frame buffer address R. The full frame buffer starting address S=Q+R. For implementations where the difference between the frame size and the buffer size is a power-of-two value, binary shifts and addition can be used instead of a multiplier.
摘要翻译：公开了当帧大小不是两倍的字节数时，将数据帧存储在帧缓冲器中，其大小适合于帧大小。缓冲区大小选择为小于帧大小的最大二次幂。当要存储数据帧时，可以将缓冲器数量乘以缓冲器大小以获得部分帧缓冲器地址Q.从帧大小中减去的缓冲器大小被称为剩余缓冲器大小，并且缓冲器数量被有效地乘以残余缓冲器大小以获得残余帧缓冲器地址R.全帧缓冲器起始地址S = Q + R。对于帧大小和缓冲器大小之间的差异是二分之一值的实现，可以使用二进制移位和相加来代替乘法器。

13. 发明授权

US06904505B1 Method for determining valid bytes for multiple-byte burst memories 有权
标题翻译：用于确定多字节突发存储器的有效字节的方法
公开(公告)号：US06904505B1
公开(公告)日：2005-06-07
申请号：US09687526
申请日：2000-10-12
申请人： Eric Peel , Bradley Roach , Qing Xue
发明人： Eric Peel , Bradley Roach , Qing Xue
IPC分类号： G06F12/02 , G06F12/04 , G06F12/08 , G06F13/28 , G06F12/00
CPC分类号： G06F13/28
摘要： A memory controller for a multi-byte burst memory device may control access to memory based on parameters set up by a client. These parameters may include a byte address and a byte count that indicates the number of bytes the client is requesting from memory. These values, and an integer representing the number of bytes in a burst-accessed word, may be operated on to produce a word that may be used to identify valid bytes in the burst-accessed word.
摘要翻译：用于多字节突发存储器设备的存储器控制器可以基于由客户端设置的参数来控制对存储器的访问。这些参数可以包括一个字节地址和一个字节计数，指示客户端从存储器请求的字节数。这些值和表示突发访问字中的字节数的整数可以被操作以产生可用于标识突发访问字中的有效字节的字。

14. 发明授权

US06711494B2 Data formatter for shifting data to correct data lanes 有权
标题翻译：数据格式化程序用于将数据移动到正确的数据通道
公开(公告)号：US06711494B2
公开(公告)日：2004-03-23
申请号：US10000848
申请日：2001-11-30
申请人： Eric Peel , Bradley Roach , Qing Xue
发明人： Eric Peel , Bradley Roach , Qing Xue
IPC分类号： G06F1200
CPC分类号： G06F5/08 , G06F5/10
摘要： A data formatter includes a shift register and a pointer manager. The shift register receives data from a providing RAM and shifts that data in response to reading data from the providing RAM and writing data to a receiving FIFO. A pointer manager maintains a pointer that points to a first valid byte in a sub-block of data into the correct bytes lanes of the FIFO by moving the pointer as data is shifted into and out of the shift register.
摘要翻译：数据格式化器包括移位寄存器和指针管理器。移位寄存器从提供RAM接收数据，并响应于从提供RAM读取数据并将数据写入接收FIFO而移位该数据。指针管理器通过在数据被移入和移出移位寄存器时通过移动指针来保持将数据子块中的第一有效字节指向FIFO的正确字节通道的指针。

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