会员体验
专利管家(专利管理)
工作空间(专利管理)
风险监控(情报监控)
数据分析(专利分析)
侵权分析(诉讼无效)
联系我们
交流群
官方交流:
QQ群: 891211   
微信请扫码    >>>
现在联系顾问~
热词
    • 14. 发明授权
    • Method for forming recesses
    • 凹槽形成方法
    • US07179748B1
    • 2007-02-20
    • US11195293
    • 2005-08-02
    • Pei-Ing LeeChung-Yuan LeeChien-Li Cheng
    • Pei-Ing LeeChung-Yuan LeeChien-Li Cheng
    • H01L21/311
    • H01L21/3086H01L21/26586H01L27/10823H01L27/10829H01L27/10876H01L29/66621Y10S438/944Y10S438/947
    • A method for forming a recess. The method includes providing a substrate with two protrusions having a first side wall and a second side wall opposite to the first side wall disposed above the substrate, conformally forming a mask layer on the substrate and the protrusions, tilt implanting the mask layer with a first angle using a first implanting mask adjacent to the first side wall of the protrusions, tilt implanting the mask layer with a second angle using a second implanting mask adjacent to the second side wall of the protrusions, removing implanted portions of the mask layer to form a patterned mask layer, and etching the substrate using the patterned mask layer, thereby forming a recess, wherein distances from the recess to the two protrusions, respectively, are different.
    • 一种形成凹部的方法。 该方法包括提供具有两个突出物的两个突起,所述两个突起具有第一侧壁和与设置在基底上方的第一侧壁相对的第二侧壁,在基底上共形成掩模层和突起,倾斜地将掩模层以第一 使用与突起的第一侧壁相邻的第一注入掩模的角度,使用与突起的第二侧壁相邻的第二注入掩模以第二角度注入掩模层,去除掩模层的植入部分以形成 图案化掩模层,并使用图案化掩模层蚀刻基板,从而形成凹部,其中分别从凹部到两个突起的距离不同。
    • 20. 发明申请
    • SEMICONDUCTOR DEVICE HAVING A TRENCH GATE AND METHOD OF FABRICATING THE SAME
    • 具有高温闸门的半导体器件及其制造方法
    • US20080135907A1
    • 2008-06-12
    • US12021969
    • 2008-01-29
    • Jeng-Ping LinPei-Ing Lee
    • Jeng-Ping LinPei-Ing Lee
    • H01L27/108
    • H01L29/7834H01L27/10876H01L29/42368H01L29/66621
    • A method of fabricating a semiconductor device having a trench gate is provided. First, a semiconductor substrate having a trench etch mask thereon is provided. The semiconductor substrate is etched to form a first trench having a first depth using the trench etch mask as a shield. Impurities are doped into the semiconductor substrate through the first trench to form a doped region. The doped region and the semiconductor substrate underlying the first trench are etched to form a second trench having a second depth greater than the first depth, wherein the second trench has a sidewall and a bottom. A gate insulating layer is formed on the sidewall and the bottom of the second trench. A trench gate is formed in the second trench.
    • 提供一种制造具有沟槽栅极的半导体器件的方法。 首先,提供其上具有沟槽蚀刻掩模的半导体衬底。 蚀刻半导体衬底以形成具有第一深度的第一沟槽,使用沟槽蚀刻掩模作为屏蔽。 杂质通过第一沟槽掺杂到半导体衬底中以形成掺杂区域。 蚀刻第一沟槽下面的掺杂区域和半导体衬底以形成具有大于第一深度的第二深度的第二沟槽,其中第二沟槽具有侧壁和底部。 栅极绝缘层形成在第二沟槽的侧壁和底部上。 沟槽栅极形成在第二沟槽中。