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    • 13. 发明授权
    • Flexible event monitoring counters in multi-node processor systems and process of operating the same
    • 多节点处理器系统中的灵活事件监控计数器及其操作过程
    • US06347362B1
    • 2002-02-12
    • US09221577
    • 1998-12-29
    • Ioannis T. SchoinasAli S. Oztaskin
    • Ioannis T. SchoinasAli S. Oztaskin
    • G06F1300
    • G06F11/3072G06F11/3006G06F11/3037G06F11/348G06F12/08G06F12/122G06F2201/88
    • A flexible event monitoring counter apparatus and process are provided for a processor system including a plurality of nodes, each node having a processor and a portion of a total main memory of the processor system. One example of such a processor system is a Non-Uniform-Memory-Architecture (NUMA) system. In order to reduce the total number of counters necessary, the counter structure will track certain ones of a type of event which occur in the processor system, determined in accordance with a predetermined standard to be most interesting, while discarding other ones of the same type of event determined by the standard to be less interesting. In accordance with one embodiment, the type of event which is tracked or discarded can be page accesses to pages of the total main memory. The standard of most interesting events can be based on the pages which receive the most requests for remote access from a node other than the node where the requested page is located. The information regarding the most interesting events can be used, if desired, to make decisions regarding migration and/or replication of pages between the different nodes.
    • 为包括多个节点的处理器系统提供灵活的事件监视计数器装置和处理,每个节点具有处理器和处理器系统的总主存储器的一部分。 这种处理器系统的一个例子是非均匀存储器架构(NUMA)系统。 为了减少所需的计数器总数,计数器结构将跟踪在处理器系统中出现的某种类型的事件,其根据预定标准确定为最有趣,同时丢弃相同类型的其他类型 由标准决定的事件不那么有趣。 根据一个实施例,被跟踪或丢弃的事件的类型可以是对总主存储器的页面的页面访问。 最有趣的事件的标准可以基于从除请求的页面所在的节点之外的节点接收到对远程访问的最多请求的页面。 如果需要,可以使用关于最有趣事件的信息来做出关于不同节点之间的页面的迁移和/或复制的决定。
    • 14. 发明申请
    • Method For Enforcing Resource Access Control In Computer Systems
    • 在计算机系统中执行资源访问控制的方法
    • US20140298408A1
    • 2014-10-02
    • US14304307
    • 2014-06-13
    • Manoj R. SastryIoannis T. SchoinasDaniel M. Cermak
    • Manoj R. SastryIoannis T. SchoinasDaniel M. Cermak
    • H04L29/06
    • H04L63/10G06F12/1458G06F21/6218G06F21/78
    • A method and system for enforcing access control to system resources and assets. Security attributes associated with devices that initiate transactions in the system are automatically generated and forwarded with transaction messages. The security attributes convey access privileges assigned to each initiator. One or more security enforcement mechanisms are implemented in the system to evaluate the security attributes against access policy requirements to access various system assets and resources, such as memory, registers, address ranges, etc. If the privileges identified by the security attributes indicate the access request is permitted, the transaction is allowed to proceed. The security attributes of the initiator scheme provides a modular, consistent secure access enforcement scheme across system designs.
    • 一种执行对系统资源和资产的访问控制的方法和系统。 与系统中发起事务的设备相关联的安全属性将自动生成并使用事务消息进行转发。 安全属性传达分配给每个启动器的访问权限。 在系统中实现一个或多个安全执行机制以根据访问策略要求评估安全属性以访问诸如存储器,寄存器,地址范围等的各种系统资产和资源。如果由安全属性标识的特权指示访问 允许请求,允许交易进行。 启动器方案的安全属性提供跨系统设计的模块化,一致的安全访问实施方案。
    • 15. 发明申请
    • METHOD, APPARATUS, SYSTEM FOR QUALIFYING CPU TRANSACTIONS WITH SECURITY ATTRIBUTES
    • 方法,装置,用于对具有安全属性的CPU交易进行质量评估的系统
    • US20140282819A1
    • 2014-09-18
    • US13828676
    • 2013-03-14
    • Manoj R. SastryIoannis T. SchoinasDaniel M. Cermak
    • Manoj R. SastryIoannis T. SchoinasDaniel M. Cermak
    • G06F21/62
    • G06F21/74G06F21/57G06F21/78
    • Method, apparatus, and system for qualifying CPU transactions with security attributes. Immutable security attributes are generated for transactions initiator by a CPU or processor core that identifying the execution mode of the CPU/core being trusted or untrusted. The transactions may be targeted to an Input/Output (I/O) device or system memory via which a protected asset may be accessed. Policy enforcement logic blocks are implemented at various points in the apparatus or system that allow or deny transactions access to protected assets based on the immutable security attributes generated for the transactions. In one aspect, a multiple-level security scheme is implemented under which a mode register is updated via a first transaction to indicate the CPU/core is operating in a trusted execution mode, and security attributes are generated for a second transaction using execution mode indicia in the mode register to verify the transaction is from a trusted initiator.
    • 用于对具有安全属性的CPU事务进行限定的方法,设备和系统。 由CPU或处理器核心为事务发起者生成不可变的安全属性,用于识别CPU /核心被信任或不可信任的执行模式。 这些事务可以被定向到可被访问受保护资产的输入/输出(I / O)设备或系统存储器。 策略执行逻辑块在设备或系统中的不同点实现,其允许或拒绝事务基于为事务生成的不可变安全属性而访问被保护资产。 在一个方面,实现多级安全方案,在该级别下,通过第一事务来更新模式寄存器以指示CPU /核心以可信执行模式运行,并且使用执行模式标记为第二事务生成安全属性 在模式寄存器中验证事务来自可信发起者。