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    • 11. 发明申请
    • Using edges of self-assembled monolayers to form narrow features
    • 使用自组装单层的边缘形成狭窄的特征
    • US20110294296A1
    • 2011-12-01
    • US10442774
    • 2003-05-21
    • Joanna AizenbergVikram Sundar
    • Joanna AizenbergVikram Sundar
    • H01L21/302H01L21/28H01L21/336
    • H01L21/32139B81C1/00063G03F7/40H01L21/0337H01L29/66742
    • The present invention provides a method for manufacturing a structure over a semiconductor substrate. To form a trench, a patterned layer is formed on a portion of a substrate such that the patterned layer forms a target area located adjacent an edge of the patterned layer. A self-assembled monolayer (SAM) is coupled to the substrate up to the patterned layer, but excluded from the patterned layer. The substrate is then removed within the target area. A wire is formed in a similar fashion except that the first SAM is exchanged with a second SAM in the target area. Then either the substrate outside of the target area is removed, or conductive metal crystals are grown within the target area. Such structures may be advantageously used in the manufacture of a number of active or passive electronic devices, such as a field effect transistor.
    • 本发明提供一种用于制造半导体衬底上的结构的方法。 为了形成沟槽,在衬底的一部分上形成图案化层,使得图案化层形成邻近图案化层的边缘定位的靶区域。 自组装单层(SAM)被耦合到衬底直到图案化层,但是从图案化层排除。 然后在目标区域内去除衬底。 线以类似的方式形成,除了第一SAM与目标区域中的第二SAM交换。 然后去除目标区域外的衬底,或者在目标区域内生长导电金属晶体。 这样的结构可以有利地用于制造诸如场效应晶体管的多个有源或无源电子器件。