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11. 发明申请

US20120218828A1 Methods for Programming Nonvolatile Memory Devices 有权
标题翻译：非易失性存储器件编程方法
公开(公告)号：US20120218828A1
公开(公告)日：2012-08-30
申请号：US13468312
申请日：2012-05-10
申请人： Hyun-Sil Oh , Kitae Park , Soonwook Hwang
发明人： Hyun-Sil Oh , Kitae Park , Soonwook Hwang
IPC分类号： G11C16/08
CPC分类号： G11C16/10 , G11C16/0483
摘要： Provided is a method for programming a nonvolatile memory device. The nonvolatile memory device includes a local word line to divide a memory cell string into a first area including a selected word line and a second area not including the selected word line. In the method, word lines of the first area are driven by a first pass voltage and word lines of the second area driven by a second pass voltage higher than the first pass voltage. A cell transistor corresponding to the local word line is turned off after the first pass voltage and the second pass voltage are applied. The selected word line is driven by a program voltage after the cell transistor is turned off.
摘要翻译：提供了一种用于对非易失性存储器件进行编程的方法。非易失性存储器件包括用于将存储单元串划分成包括所选字线的第一区域和不包括所选字线的第二区域的本地字线。在该方法中，第一区域的字线由第一通过电压和由比第一通过电压高的第二通过电压驱动的第二区域的字线驱动。在施加第一通过电压和第二通过电压之后，对应于本地字线的单元晶体管截止。在单元晶体管截止之后，所选字线由编程电压驱动。

12. 发明授权

US08254181B2 Nonvolatile memory device and programming method 有权
标题翻译：非易失性存储器件和编程方法
公开(公告)号：US08254181B2
公开(公告)日：2012-08-28
申请号：US12581479
申请日：2009-10-19
申请人： Soonwook Hwang , Kitae Park , Jaewook Lee , Han Sung Joo
发明人： Soonwook Hwang , Kitae Park , Jaewook Lee , Han Sung Joo
IPC分类号： G11C16/06 , G11C16/34 , G11C16/24 , G11C16/10
CPC分类号： G11C16/3404 , G11C16/344
摘要： A nonvolatile memory device includes; a memory cell array configured into a plurality of memory blocks, a decoder connected to the plurality of memory blocks via a word line, a page buffer connected to the plurality of memory blocks via a bit line, and control logic configured to define a control voltage applied to at least one of the word line and the bit line during a program/verify operation in accordance with a location of each one of the plurality of memory blocks within the memory cell array.
摘要翻译：非易失性存储装置包括：配置成多个存储器块的存储单元阵列，经由字线连接到多个存储器块的解码器，经由位线连接到多个存储器块的页缓冲器以及被配置为定义控制电压的控制逻辑根据存储单元阵列内的多个存储块中的每一个的位置，在程序/验证操作期间应用于字线和位线中的至少一个。

13. 发明授权

US08154924B2 Nonvolatile memory device and read method 有权
标题翻译：非易失性存储器件和读取方法
公开(公告)号：US08154924B2
公开(公告)日：2012-04-10
申请号：US12506345
申请日：2009-07-21
申请人： Kitae Park , Myoung Gon Kang
发明人： Kitae Park , Myoung Gon Kang
IPC分类号： G11C11/34
CPC分类号： G11C16/26 , G11C16/0483 , G11C16/3418 , G11C16/3427
摘要： Disclosed is a nonvolatile memory including a memory cell array including a first cell string connected between a first bit line and a first common source line, and a second cell string a second common source line and a second bit line adjacent to the first bit line. The nonvolatile memory also includes a control logic circuit configured to independently control the first and second common source lines.
摘要翻译：公开了一种非易失性存储器，包括存储单元阵列，其包括连接在第一位线和第一公共源极线之间的第一单元串，以及第二单元串，与第一位线相邻的第二公共源极线和第二位线。非易失性存储器还包括被配置为独立地控制第一和第二公共源极线的控制逻辑电路。

14. 发明授权

US08125827B2 Flash memory systems and operating methods using adaptive read voltage levels 有权
标题翻译：闪存系统和使用自适应读取电压电平的操作方法
公开(公告)号：US08125827B2
公开(公告)日：2012-02-28
申请号：US12490896
申请日：2009-06-24
申请人： Kitae Park
发明人： Kitae Park
IPC分类号： G11C11/34
CPC分类号： G11C11/5642 , G06F11/1068 , G11C16/28 , G11C16/3418 , G11C16/3431 , G11C29/00 , G11C2211/5634
摘要： Some embodiments of the present invention provide methods of operating nonvolatile memory devices. Reference data is stored in a plurality of memory cells. The reference data is read, and a threshold voltage distribution of the plurality of memory cells is determined responsive to reading the reference data. A read voltage of the nonvolatile memory device is modified based on the determined threshold voltage distribution. The nonvolatile memory device may include a main region configured to stored data and a dummy region configured to store the reference data, and the methods may further include reading data from the main region using the modified read voltage.
摘要翻译：本发明的一些实施例提供了操作非易失性存储器件的方法。参考数据存储在多个存储单元中。读取参考数据，并且响应于读取参考数据确定多个存储器单元的阈值电压分布。基于确定的阈值电压分布来修改非易失性存储器件的读取电压。非易失性存储器件可以包括被配置为存储数据的主区域和被配置为存储参考数据的虚拟区域，并且该方法还可以包括使用修改的读取电压从主区域读取数据。

15. 发明申请

US20100202211A1 NONVOLATILE MEMORY DEVICE AND METHOD FOR PROGRAMMING THE SAME 审中-公开
标题翻译：非易失性存储器件及其编程方法
公开(公告)号：US20100202211A1
公开(公告)日：2010-08-12
申请号：US12686058
申请日：2010-01-12
申请人： Kitae Park , Youngsun Song
发明人： Kitae Park , Youngsun Song
IPC分类号： G11C16/04
CPC分类号： G11C16/3418 , G11C16/24 , G11C16/3427
摘要： Provided are a nonvolatile memory device and a method for programming the same. The method for programming the nonvolatile memory device includes programming at least one memory cell of the nonvolatile memory device by repeating program loops. A first self-boosting method is applied to at least one of the program loops and a second self-boosting method, different from the first self-boosting method, is applied to at least one other of the program loops.
摘要翻译：提供一种非易失性存储器件及其编程方法。用于编程非易失性存储器件的方法包括通过重复程序循环对非易失性存储器件的至少一个存储器单元进行编程。第一自增强方法被应用于程序循环中的至少一个，并且与第一自增强方法不同的第二自升压方法被应用于程序循环中的至少另一个。

16. 发明申请

US20100074025A1 Nonvolatile Memory Devices Having Erased-State Verify Capability and Methods of Operating Same 有权
标题翻译：具有擦除状态验证能力的非易失性存储器件和操作方法相同
公开(公告)号：US20100074025A1
公开(公告)日：2010-03-25
申请号：US12543993
申请日：2009-08-19
申请人： Kitae Park , Chanik Park
发明人： Kitae Park , Chanik Park
IPC分类号： G11C16/04 , G11C16/06
CPC分类号： G11C16/10 , G11C16/0483 , G11C16/3454
摘要： A program method of a nonvolatile memory device includes applying a program voltage to program cells for changing data; verifying the program cells, based on the changed data; and verifying program inhibit cells for maintaining stored data even when the program voltage is applied to the program inhibit cells, based on the stored data.
摘要翻译：非易失性存储器件的编程方法包括将程序电压施加到编程单元以改变数据; 基于改变的数据验证程序单元; 以及即使当基于所存储的数据将程序电压施加到程序禁止单元时，验证程序禁止用于维持存储的数据的单元。

17. 发明申请

US20220102750A1 LITHIUM BATTERY 有权
公开(公告)号：US20220102750A1
公开(公告)日：2022-03-31
申请号：US17545036
申请日：2021-12-08
申请人： Hyeokjo Gwon , Jinkju Kang , Kitae Park , Hyunchul Lee , Ryounghee Kim , Euncheol Do , Soojin Park , Sangmin Ji
发明人： Hyeokjo Gwon , Jinkju Kang , Kitae Park , Hyunchul Lee , Ryounghee Kim , Euncheol Do , Soojin Park , Sangmin Ji
IPC分类号： H01M10/052 , H01M10/0567 , H01M50/44 , H01M50/46 , H01M50/403 , H01M50/411
摘要： Provided herein is a lithium battery including: a cathode including a cathode active material; an anode including an anode active material; an electrolyte between the cathode and the anode; and a separator impregnated with the electrolyte, wherein the separator includes cellulose nanofibers, and wherein a differential scanning calorimetry (DSC) thermogram of the separator evinces an exothermic reaction peak, represented by a differential value (dH/dT), at a temperature in a range of about 150° C. to about 200° C.

18. 发明申请

US20150003169A1 NONVOLATILE MEMORY DEVICE, A MEMORY SYSTEM HAVING THE SAME, AND A READ METHOD THEREOF 有权
标题翻译：非易失存储器件，具有该存储器件的存储器系统及其读取方法
公开(公告)号：US20150003169A1
公开(公告)日：2015-01-01
申请号：US14242332
申请日：2014-04-01
申请人： Sang-Wan Nam , Kitae Park , Hyun-Wook Park , Jae-Kyun Rhee
发明人： Sang-Wan Nam , Kitae Park , Hyun-Wook Park , Jae-Kyun Rhee
IPC分类号： G11C16/26
CPC分类号： G11C16/26 , G11C11/5628 , G11C16/0483 , G11C16/3427
摘要： A method of reading a nonvolatile memory device including: applying a read voltage to a selected wordline of the nonvolatile memory device; applying a read pass voltage to unselected wordlines of the nonvolatile memory device; sensing a state of a memory cell connected to the selected wordline; and applying the read pass voltage to the selected wordline after the sensing.
摘要翻译：一种读取非易失性存储器件的方法，包括：将读取电压施加到非易失性存储器件的选定字线; 对非易失性存储器件的未选字线施加读通过电压; 感测连接到所选字线的存储单元的状态; 并且在感测之后将读通道电压施加到所选择的字线。

19. 发明授权

US08773908B2 Nonvolatile memory devices and methods of programming nonvolatile memory devices 有权
标题翻译：非易失性存储器件和非易失性存储器件编程方法
公开(公告)号：US08773908B2
公开(公告)日：2014-07-08
申请号：US13477161
申请日：2012-05-22
申请人： Youngsun Song , Bogeun Kim , Ohsuk Kwon , Kitae Park , Seung-Hwan Shin , Sangyong Yoon
发明人： Youngsun Song , Bogeun Kim , Ohsuk Kwon , Kitae Park , Seung-Hwan Shin , Sangyong Yoon
IPC分类号： G11C16/04 , G11C11/56 , G11C16/34 , G11C16/08
CPC分类号： G11C16/10 , G11C11/5621 , G11C11/5628 , G11C11/5642 , G11C16/08 , G11C16/34 , G11C16/3459
摘要： A nonvolatile memory device includes a memory cell array, a page buffer unit which output a verify-read result, a reference current generating unit which generates a reference current signal, a page buffer decoding unit which outputs currents according to the verify-read result. The nonvolatile memory device further includes an analog bit counting unit which counts the currents, a digital adding unit which calculates an accumulated sum of the counting result, a pass/fail checking unit which outputs a pass signal or fail signal according to the calculation result, and a control unit controlling a program operation.
摘要翻译：非易失性存储器件包括存储单元阵列，输出验证读取结果的页面缓冲器单元，产生参考电流信号的参考电流产生单元，根据验证读取结果输出电流的页面缓冲器解码单元。非易失性存储装置还包括对电流进行计数的模拟比特计数单元，计算计数结果的累积和的数字加法单元，根据计算结果输出通过信号或失败信号的通过/失败检查单元，以及控制程序操作的控制单元。

20. 发明申请

US20130141972A1 DATA STORAGE SYSTEM HAVING MULTI-BIT MEMORY DEVICE AND OPERATING METHOD THEREOF 有权
标题翻译：具有多位存储器件的数据存储系统及其操作方法
公开(公告)号：US20130141972A1
公开(公告)日：2013-06-06
申请号：US13737140
申请日：2013-01-09
申请人： Sangyong Yoon , Kitae Park , Jinman Han , Wonseok Lee
发明人： Sangyong Yoon , Kitae Park , Jinman Han , Wonseok Lee
IPC分类号： G11C16/10 , G11C16/26
CPC分类号： G11C16/10 , G11C11/56 , G11C11/5628 , G11C14/0018 , G11C16/0483 , G11C16/26 , G11C2211/5641 , G11C2211/5642 , G11C2211/5643
摘要： A data storage device includes a non-volatile memory device which includes a memory cell array; and a memory controller which includes a buffer memory and which controls the non-volatile memory device. The operating method of the data storage device includes storing data in the buffer memory according to an external request, and determining whether the data stored in the buffer memory is data accompanying a buffer program operation of the memory cell array. When the data stored in the buffer memory is data accompanying the buffer program operation, the method further includes determining whether a main program operation on the memory cell array is required, and when a main program operation on the memory cell array is required, determining a program pattern of the main program operation on the memory cell array. The method further includes issuing a set of commands for the main program operation on the memory cell array to the multi-bit memory device based on the determined program pattern.
摘要翻译：数据存储装置包括：非易失性存储装置，其包括存储单元阵列; 以及包括缓冲存储器并且控制非易失性存储器件的存储器控制器。数据存储装置的操作方法包括根据外部请求将数据存储在缓冲存储器中，并且确定存储在缓冲存储器中的数据是否是与存储单元阵列的缓冲器程序操作相关的数据。当存储在缓冲存储器中的数据是与缓冲器程序操作相关的数据时，该方法还包括确定是否需要对存储单元阵列的主程序操作，以及当需要存储单元阵列的主程序操作时，存储单元阵列中的主程序操作的程序模式。该方法还包括基于所确定的程序模式向存储器单元阵列发出用于主程序操作的一组命令给多位存储器件。

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