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11. 发明授权

US06452448B1 Family of analog amplifier and comparator circuits with body voltage control 有权
标题翻译：具有体电压控制的模拟放大器和比较器电路系列
公开(公告)号：US06452448B1
公开(公告)日：2002-09-17
申请号：US09616550
申请日：2000-07-14
申请人： Anthony R. Bonaccio , Michel S. Michail , Wilbur D. Pricer , Steven J. Tanghe
发明人： Anthony R. Bonaccio , Michel S. Michail , Wilbur D. Pricer , Steven J. Tanghe
IPC分类号： H03F345
CPC分类号： H03F3/45748 , H03F3/4521 , H03F2203/45342 , H03F2203/45658 , H03F2203/45711
摘要： A structure for an amplifier circuit which includes a pair of source-coupled differential transistors, each of source-coupled differential transistors having a body and a gate, and input transistors electrically connected to the source-coupled transistors. Also, the input transistors load the body and the gate of the source-coupled transistors with positive feedback signals. As a result, a differential gain is increased and a common mode gain is not increased. The output of the pair of source-coupled differential transistors is directed to second pair of transistors. The second pair of transistors generates mirrored voltages which track with input voltages. The second pair of transistors generates mirrored voltages translated by an offset voltage to values near ground, mirrored voltages which represent a voltage gain over an input voltage, and mirrored voltages which are largely differential and includes approximately no common mode input voltage.
摘要翻译：一种用于放大器电路的结构，其包括一对源极耦合差分晶体管，每个源极耦合差分晶体管具有主体和栅极，以及输入晶体管，电连接到源耦合晶体管。此外，输入晶体管负载负极反馈信号的源极耦合晶体管的主体和栅极。结果，差分增益增加并且共模增益不增加。一对源极耦合差分晶体管的输出被引导到第二对晶体管。第二对晶体管产生用输入电压跟踪的镜像电压。第二对晶体管产生由偏移电压转换为接近接近的值的镜像电压，表示输入电压上的电压增益的镜像电压和大幅度差分的近似不包含共模输入电压的镜像电压。

12. 发明授权

US6081135A Device and method to reduce power consumption in integrated semiconductor devices 失效
标题翻译：集成半导体器件降低功耗的器件和方法
公开(公告)号：US6081135A
公开(公告)日：2000-06-27
申请号：US74442
申请日：1998-05-07
申请人： Kenneth J. Goodnow , Michel S. Michail , Clarence R. Ogilvie , Wilbur D. Pricer , Sebastian T. Ventrone
发明人： Kenneth J. Goodnow , Michel S. Michail , Clarence R. Ogilvie , Wilbur D. Pricer , Sebastian T. Ventrone
IPC分类号： H03K19/00 , H03K3/033
CPC分类号： H03K19/0016
摘要： According to the preferred embodiment, a device and method for reducing power consumption by reducing unneeded node toggling is provided. The preferred embodiment reduces unneeded node toggling in a circuit by utilizing either a pull-up or pull-down transistor to pull the input of the circuit to a state that minimizes power consumption during periods in which the circuit is inactive. By tying the circuit input high or low during inactivity, node toggling is reduced or eliminated in that circuit. In the preferred embodiment, the inputs to the circuit all pulled after a time of inactivity which is proportional to the leakage current of the leakiest transistor in the circuit. By timing the input pulling proportional to the leakage current, the power consumption is minimized without excessive power loss caused by the pulling itself.
摘要翻译：根据优选实施例，提供了一种通过减少不需要的节点切换来降低功耗的装置和方法。优选实施例通过利用上拉或下拉晶体管将电路中的输入引导到在电路不活动的时段期间最小化功耗的状态来减少电路中的不需要的节点切换。通过在不活动状态下将电路输入高或低，在该电路中节点切换被减少或消除。在优选实施例中，电路的输入在与电路中最漏电晶体管的漏电流成比例的不活动时间之后全部被拉。通过定时输入拉动与泄漏电流成比例，最大限度地减少功耗，而不会由拉动本身引起的功率损耗过大。

13. 发明授权

US5825245A Compound cascode amplifier 失效
标题翻译：复合共源共栅放大器
公开(公告)号：US5825245A
公开(公告)日：1998-10-20
申请号：US855602
申请日：1997-05-13
申请人： Michel S. Michail , Wilbur David Pricer
发明人： Michel S. Michail , Wilbur David Pricer
IPC分类号： H03F3/30 , H03F3/45
CPC分类号： H03F3/45179 , H03F3/3028 , H03F3/45219 , H03F2203/45028 , H03F2203/45658
摘要： A compound cascode amplifier comprising first and second FET input transistors, the gates of which are coupled to a differential input, and first and second FET cascode transistors. The sources of the first and second cascode transistors are coupled respectively to the drains of the first and second input transistors. The gate of the first cascode transistor is coupled to a reference voltage V Ref. The drain of the first cascode transistor is coupled to the gate of the second cascode transistor, and the drain of the second cascode transistor forms the output of the circuit. In operation the drive to the gate of the second cascode transistor arrives in synchronization with the drive to the source thereof, such that the drive to the gate arrives in anticipation of a voltage swing at the output of the second cascode transistor amplifier, not in reaction to it. Accordingly, this arrangement does not introduce a delay or an additional pole in the frequency response of the circuit. A more detailed embodiment of the compound cascode amplifier further includes first and second complementary FET input transistors, and first and second complementary FET cascode transistors.
摘要翻译：一种复合共源共栅放大器，包括第一和第二FET输入晶体管，其栅极耦合到差分输入，以及第一和第二FET共源共栅晶体管。第一和第二共源共栅晶体管的源极分别耦合到第一和第二输入晶体管的漏极。第一共源共栅晶体管的栅极耦合到参考电压V Ref。第一共源共栅晶体管的漏极耦合到第二共源共栅晶体管的栅极，第二共源共栅晶体管的漏极形成电路的输出。在操作中，到第二共源共栅晶体管的栅极的驱动到达与其源极的驱动同步，使得到达栅极的驱动器预期在第二共源共栅晶体管放大器的输出处的电压摆动，而不是在反应给它因此，这种布置不会在电路的频率响应中引入延迟或额外的极点。复合共源共栅放大器的更详细的实施例还包括第一和第二互补FET输入晶体管以及第一和第二互补FET共源共栅晶体管。

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