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11. 发明授权

US08558301B2 Semiconductor device, and method for manufacturing semiconductor device 失效
标题翻译：半导体装置及半导体装置的制造方法
公开(公告)号：US08558301B2
公开(公告)日：2013-10-15
申请号：US13208454
申请日：2011-08-12
申请人： Masao Shingu , Akira Takashima , Koichi Muraoka
发明人： Masao Shingu , Akira Takashima , Koichi Muraoka
IPC分类号： H01L29/76
CPC分类号： H01L29/788 , H01L21/28273 , H01L21/28282 , H01L27/11521 , H01L27/11568 , H01L29/42324 , H01L29/4234 , H01L29/513 , H01L29/66825
摘要： There is provided a semiconductor device in which degradation of reliability originating in the interface between an upper insulating layer and an element isolation insulating layer is suppressed. The semiconductor device includes: a semiconductor region; a plurality of stacked structures each of which is disposed on the semiconductor region and has a tunnel insulating film, a charge storage layer, an upper insulating layer, and a control electrode stacked sequentially; an element isolation insulating layer disposed on side faces of the plurality of stacked structures; and a source-drain region disposed on the semiconductor region and among the plurality of stacked structures. The element isolation insulating layer includes at least one of SiO2, SiN, and SiON, the upper insulating layer is an oxide containing at least one metal M selected from the group consisting of a rare earth metal, Y, Zr, and Hf, and Si, and respective lengths Lcharge, Ltop, and Lgate of the charge storage layer, the upper insulating layer, and the control electrode in a channel length direction satisfy the relation “Lcharge
摘要翻译：提供一种半导体器件，其中抑制源于上绝缘层和元件隔离绝缘层之间的界面的可靠性的劣化。半导体器件包括：半导体区域; 多个堆叠结构，其各自设置在所述半导体区域上，并且具有依次堆叠的隧道绝缘膜，电荷存储层，上绝缘层和控制电极; 设置在所述多个堆叠结构的侧面上的元件隔离绝缘层; 以及设置在半导体区域和多个堆叠结构中的源极 - 漏极区域。元件隔离绝缘层包括SiO 2，SiN和SiON中的至少一种，上绝缘层是含有选自稀土金属，Y，Zr和Hf中的至少一种金属M的氧化物，Si ，并且沟道长度方向上的电荷存储层，上绝缘层和控制电极的各自的长度Lcharge，Ltop和Lgate满足关系“Lcharge

12. 发明申请

US20100072535A1 NONVOLATILE SEMICONDUCTOR MEMORY DEVICE 有权
标题翻译：非易失性半导体存储器件
公开(公告)号：US20100072535A1
公开(公告)日：2010-03-25
申请号：US12506588
申请日：2009-07-21
申请人： Akira Takashima , Masao Shingu , Naoki Yasuda , Koichi Muraoka
发明人： Akira Takashima , Masao Shingu , Naoki Yasuda , Koichi Muraoka
IPC分类号： H01L29/792
CPC分类号： H01L29/513 , H01L27/11568 , H01L29/4234 , H01L29/792
摘要： A nonvolatile semiconductor memory device includes a source region and a drain region provided apart from each other in a semiconductor substrate, a first insulating film provided on a channel region between the source region and the drain region, a charge storage layer provided on the first insulating film, a second insulating film provided on the charge storage layer and including a stacked structure of a lanthanum aluminum silicate film and a dielectric film made of silicon oxide or silicon oxynitride, and a control gate electrode provided on the second insulating film.
摘要翻译：非易失性半导体存储器件包括在半导体衬底中彼此分开设置的源极区域和漏极区域，设置在源极区域和漏极区域之间的沟道区域上的第一绝缘膜，设置在第一绝缘体上的电荷存储层膜，设置在电荷存储层上并包括硅酸铝镧硅酸盐膜和由氧化硅或氮氧化硅制成的电介质膜的叠层结构的第二绝缘膜和设置在第二绝缘膜上的控制栅电极。

13. 发明申请

US20120025294A1 SEMICONDUCTOR DEVICE, AND METHOD FOR MANUFACTURING SEMICONDUCTOR DEVICE 失效
标题翻译：半导体器件及制造半导体器件的方法
公开(公告)号：US20120025294A1
公开(公告)日：2012-02-02
申请号：US13208454
申请日：2011-08-12
申请人： Masao SHINGU , Akira Takashima , Koichi Muraoka
发明人： Masao SHINGU , Akira Takashima , Koichi Muraoka
IPC分类号： H01L29/788 , H01L21/336
CPC分类号： H01L29/788 , H01L21/28273 , H01L21/28282 , H01L27/11521 , H01L27/11568 , H01L29/42324 , H01L29/4234 , H01L29/513 , H01L29/66825
摘要： There is provided a semiconductor device in which degradation of reliability originating in the interface between an upper insulating layer and an element isolation insulating layer is suppressed. The semiconductor device includes: a semiconductor region; a plurality of stacked structures each of which is disposed on the semiconductor region and has a tunnel insulating film, a charge storage layer, an upper insulating layer, and a control electrode stacked sequentially; an element isolation insulating layer disposed on side faces of the plurality of stacked structures; and a source-drain region disposed on the semiconductor region and among the plurality of stacked structures. The element isolation insulating layer includes at least one of SiO2, SiN, and SiON, the upper insulating layer is an oxide containing at least one metal M selected from the group consisting of a rare earth metal, Y, Zr, and Hf, and Si, and respective lengths Lcharge, Ltop, and Lgate of the charge storage layer, the upper insulating layer, and the control electrode in a channel length direction satisfy the relation “Lcharge
摘要翻译：提供一种半导体器件，其中抑制源于上绝缘层和元件隔离绝缘层之间的界面的可靠性的劣化。半导体器件包括：半导体区域; 多个堆叠结构，其各自设置在所述半导体区域上，并且具有依次堆叠的隧道绝缘膜，电荷存储层，上绝缘层和控制电极; 设置在所述多个堆叠结构的侧面上的元件隔离绝缘层; 以及设置在半导体区域和多个堆叠结构中的源极 - 漏极区域。元件隔离绝缘层包括SiO 2，SiN和SiON中的至少一种，上绝缘层是含有选自稀土金属，Y，Zr和Hf中的至少一种金属M的氧化物，Si ，并且沟道长度方向上的电荷存储层，上绝缘层和控制电极的各自的长度Lcharge，Ltop和Lgate满足关系“Lcharge

14. 发明授权

US08058681B2 Nonvolatile semiconductor memory element, nonvolatile semiconductor memory, and method for operating nonvolatile semiconductor memory element 有权
标题翻译：非易失性半导体存储元件，非易失性半导体存储器以及用于操作非易失性半导体存储元件
公开(公告)号：US08058681B2
公开(公告)日：2011-11-15
申请号：US12405626
申请日：2009-03-17
申请人： Masao Shingu , Jun Fujiki , Naoki Yasuda , Koichi Muraoka
发明人： Masao Shingu , Jun Fujiki , Naoki Yasuda , Koichi Muraoka
IPC分类号： H01L29/792
CPC分类号： H01L29/7883 , G11C11/40 , G11C16/0408 , G11C16/0466 , G11C16/10 , G11C16/12 , G11C16/14 , G11C16/26 , H01L21/28282 , H01L27/11521 , H01L27/11556 , H01L27/11582 , H01L29/4234 , H01L29/495 , H01L29/4966 , H01L29/513 , H01L29/517 , H01L29/518 , H01L29/788 , H01L29/792
摘要： According to an aspect of the present invention, there is provided a nonvolatile semiconductor memory element including: a semiconductor substrate including: a source region; a drain region; and a channel region; a lower insulating film that is formed on the channel region; a charge storage film that is formed on the lower insulating film and that stores data; an upper insulating film that is formed on the charge storage film; and a control gate that is formed on the upper insulating film, wherein the upper insulating film includes: a first insulting film; and a second insulating film that is laminated with the first insulating film, and wherein the first insulating film is formed to have a trap level density larger than that of the second insulating film.
摘要翻译：根据本发明的一个方面，提供了一种非易失性半导体存储元件，包括：半导体衬底，包括：源极区; 漏区; 和通道区域; 形成在沟道区上的下绝缘膜; 电荷存储膜，形成在下绝缘膜上并存储数据; 形成在电荷存储膜上的上绝缘膜; 以及形成在所述上绝缘膜上的控制栅极，其中所述上绝缘膜包括：第一绝缘膜; 以及与所述第一绝缘膜层压的第二绝缘膜，并且其中所述第一绝缘膜形成为具有比所述第二绝缘膜的陷阱级密度大的陷阱级密度。

15. 发明授权

US08704290B2 Nonvolatile semiconductor memory element, nonvolatile semiconductor memory, and method for operating nonvolatile semiconductor memory element 有权
标题翻译：非易失性半导体存储元件，非易失性半导体存储器以及用于操作非易失性半导体存储元件的方法
公开(公告)号：US08704290B2
公开(公告)日：2014-04-22
申请号：US13619223
申请日：2012-09-14
申请人： Masao Shingu , Jun Fujiki , Naoki Yasuda , Koichi Muraoka
发明人： Masao Shingu , Jun Fujiki , Naoki Yasuda , Koichi Muraoka
IPC分类号： H01L29/66
CPC分类号： H01L29/7883 , G11C11/40 , G11C16/0408 , G11C16/0466 , G11C16/10 , G11C16/12 , G11C16/14 , G11C16/26 , H01L21/28282 , H01L27/11521 , H01L27/11556 , H01L27/11582 , H01L29/4234 , H01L29/495 , H01L29/4966 , H01L29/513 , H01L29/517 , H01L29/518 , H01L29/788 , H01L29/792
摘要： According to an aspect of the present invention, there is provided a nonvolatile semiconductor memory element including: a semiconductor substrate including: a source region; a drain region; and a channel region; a lower insulating film that is formed on the channel region; a charge storage film that is formed on the lower insulating film and that stores data; an upper insulating film that is formed on the charge storage film; and a control gate that is formed on the upper insulating film, wherein the upper insulating film includes: a first insulting film; and a second insulating film that is laminated with the first insulating film, and wherein the first insulating film is formed to have a trap level density larger than that of the second insulating film.
摘要翻译：根据本发明的一个方面，提供了一种非易失性半导体存储元件，包括：半导体衬底，包括：源极区; 漏区; 和通道区域; 形成在沟道区上的下绝缘膜; 电荷存储膜，形成在下绝缘膜上并存储数据; 形成在电荷存储膜上的上绝缘膜; 以及形成在所述上绝缘膜上的控制栅极，其中所述上绝缘膜包括：第一绝缘膜; 以及与所述第一绝缘膜层压的第二绝缘膜，并且其中所述第一绝缘膜形成为具有比所述第二绝缘膜的陷阱级密度大的陷阱级密度。

16. 发明申请

US20120032248A1 NONVOLATILE SEMICONDUCTOR MEMORY ELEMENT, NONVOLATILE SEMICONDUCTOR MEMORY, AND METHOD FOR OPERATING NONVOLATILE SEMICONDUCTOR MEMORY ELEMENT 有权
标题翻译：非易失性半导体存储器元件，非易失性半导体存储器以及用于操作非易失性半导体存储器元件的方法
公开(公告)号：US20120032248A1
公开(公告)日：2012-02-09
申请号：US13272821
申请日：2011-10-13
申请人： Masao SHINGU , Jun Fujiki , Naoki Yasuda , Koichi Muraoka
发明人： Masao SHINGU , Jun Fujiki , Naoki Yasuda , Koichi Muraoka
IPC分类号： H01L29/792 , H01L29/788
CPC分类号： H01L29/7883 , G11C11/40 , G11C16/0408 , G11C16/0466 , G11C16/10 , G11C16/12 , G11C16/14 , G11C16/26 , H01L21/28282 , H01L27/11521 , H01L27/11556 , H01L27/11582 , H01L29/4234 , H01L29/495 , H01L29/4966 , H01L29/513 , H01L29/517 , H01L29/518 , H01L29/788 , H01L29/792
摘要： According to an aspect of the present invention, there is provided a nonvolatile semiconductor memory element including: a semiconductor substrate including: a source region; a drain region; and a channel region; a lower insulating film that is formed on the channel region; a charge storage film that is formed on the lower insulating film and that stores data; an upper insulating film that is formed on the charge storage film; and a control gate that is formed on the upper insulating film, wherein the upper insulating film includes: a first insulting film; and a second insulating film that is laminated with the first insulating film, and wherein the first insulating film is formed to have a trap level density larger than that of the second insulating film.
摘要翻译：根据本发明的一个方面，提供了一种非易失性半导体存储元件，包括：半导体衬底，包括：源极区; 漏区; 和通道区域; 形成在沟道区上的下绝缘膜; 电荷存储膜，形成在下绝缘膜上并存储数据; 形成在电荷存储膜上的上绝缘膜; 以及形成在所述上绝缘膜上的控制栅极，其中所述上绝缘膜包括：第一绝缘膜; 以及与所述第一绝缘膜层压的第二绝缘膜，并且其中所述第一绝缘膜形成为具有比所述第二绝缘膜的陷阱级密度大的陷阱级密度。

17. 发明授权

US08294195B2 Nonvolatile semiconductor memory element, nonvolatile semiconductor memory, and method for operating nonvolatile semiconductor memory element 有权
标题翻译：非易失性半导体存储元件，非易失性半导体存储器以及用于操作非易失性半导体存储元件的方法
公开(公告)号：US08294195B2
公开(公告)日：2012-10-23
申请号：US13272821
申请日：2011-10-13
申请人： Masao Shingu , Jun Fujiki , Naoki Yasuda , Koichi Muraoka
发明人： Masao Shingu , Jun Fujiki , Naoki Yasuda , Koichi Muraoka
IPC分类号： H01L29/788
CPC分类号： H01L29/7883 , G11C11/40 , G11C16/0408 , G11C16/0466 , G11C16/10 , G11C16/12 , G11C16/14 , G11C16/26 , H01L21/28282 , H01L27/11521 , H01L27/11556 , H01L27/11582 , H01L29/4234 , H01L29/495 , H01L29/4966 , H01L29/513 , H01L29/517 , H01L29/518 , H01L29/788 , H01L29/792
摘要： According to an aspect of the present invention, there is provided a nonvolatile semiconductor memory element including: a semiconductor substrate including: a source region; a drain region; and a channel region; a lower insulating film that is formed on the channel region; a charge storage film that is formed on the lower insulating film and that stores data; an upper insulating film that is formed on the charge storage film; and a control gate that is formed on the upper insulating film, wherein the upper insulating film includes: a first insulting film; and a second insulating film that is laminated with the first insulating film, and wherein the first insulating film is formed to have a trap level density larger than that of the second insulating film.
摘要翻译：根据本发明的一个方面，提供了一种非易失性半导体存储元件，包括：半导体衬底，包括：源极区; 漏区; 和通道区域; 形成在沟道区上的下绝缘膜; 电荷存储膜，形成在下绝缘膜上并存储数据; 形成在电荷存储膜上的上绝缘膜; 以及形成在所述上绝缘膜上的控制栅极，其中所述上绝缘膜包括：第一绝缘膜; 以及与所述第一绝缘膜层压的第二绝缘膜，并且其中所述第一绝缘膜形成为具有比所述第二绝缘膜的陷阱级密度大的陷阱级密度。

18. 发明申请

US20100034023A1 NONVOLATILE SEMICONDUCTOR MEMORY ELEMENT, NONVOLATILE SEMICONDUCTOR MEMORY, AND METHOD FOR OPERATING NONVOLATILE SEMICONDUCTOR MEMORY ELEMENT 有权
标题翻译：非易失性半导体存储器元件，非易失性半导体存储器以及用于操作非易失性半导体存储器元件的方法
公开(公告)号：US20100034023A1
公开(公告)日：2010-02-11
申请号：US12405626
申请日：2009-03-17
申请人： Masao SHINGU , Jun Fujiki , Naoki Yasuda , Koichi Muraoka
发明人： Masao SHINGU , Jun Fujiki , Naoki Yasuda , Koichi Muraoka
IPC分类号： G11C16/04 , H01L29/792
CPC分类号： H01L29/7883 , G11C11/40 , G11C16/0408 , G11C16/0466 , G11C16/10 , G11C16/12 , G11C16/14 , G11C16/26 , H01L21/28282 , H01L27/11521 , H01L27/11556 , H01L27/11582 , H01L29/4234 , H01L29/495 , H01L29/4966 , H01L29/513 , H01L29/517 , H01L29/518 , H01L29/788 , H01L29/792
摘要： According to an aspect of the present invention, there is provided a nonvolatile semiconductor memory element including: a semiconductor substrate including: a source region; a drain region; and a channel region; a lower insulating film that is formed on the channel region; a charge storage film that is formed on the lower insulating film and that stores data; an upper insulating film that is formed on the charge storage film; and a control gate that is formed on the upper insulating film, wherein the upper insulating film includes: a first insulting film; and a second insulating film that is laminated with the first insulating film, and wherein the first insulating film is formed to have a trap level density larger than that of the second insulating film.
摘要翻译：根据本发明的一个方面，提供了一种非易失性半导体存储元件，包括：半导体衬底，包括：源极区; 漏区; 和通道区域; 形成在沟道区上的下绝缘膜; 电荷存储膜，形成在下绝缘膜上并存储数据; 形成在电荷存储膜上的上绝缘膜; 以及形成在所述上绝缘膜上的控制栅极，其中所述上绝缘膜包括：第一绝缘膜; 以及与所述第一绝缘膜层压的第二绝缘膜，并且其中所述第一绝缘膜形成为具有比所述第二绝缘膜的陷阱级密度大的陷阱级密度。

19. 发明申请

US20080121979A1 NONVOLATILE SEMICONDUCTOR MEMORY DEVICE AND METHOD FOR MANUFACTURING THE SAME 有权
标题翻译：非易失性半导体存储器件及其制造方法
公开(公告)号：US20080121979A1
公开(公告)日：2008-05-29
申请号：US11846251
申请日：2007-08-28
申请人： Yukie NISHIKAWA , Akira Takashima , Koichi Muraoka
发明人： Yukie NISHIKAWA , Akira Takashima , Koichi Muraoka
IPC分类号： H01L29/788 , H01L21/336
CPC分类号： H01L29/7881 , H01L27/115 , H01L27/11521 , H01L29/42336 , H01L29/513
摘要： A nonvolatile semiconductor memory device includes: a tunneling insulating film; a floating gate electrode; an inter-electrode insulating film, in which an interface facing the floating gate electrode and an interface facing a control gate electrode are defined as the first interface and the second interface, respectively; and a control gate electrode. The inter-electrode insulating film includes one or more first elements selected from rare earth elements, one or more second elements selected from Al, Ti, Zr, Hf, Ta, Mg, Ca, Sr and Ba, and oxygen. A composition ratio of the first element, which is defined as the number of atoms of the first element divided by that of the second element, is changed between the first interface and the second interface, and the composition ratio in the vicinity of the first interface is lower than that in the vicinity of the second interface.
摘要翻译：非易失性半导体存储器件包括：隧道绝缘膜; 浮栅电极; 分别将面对浮置栅极的界面和面对控制栅电极的界面分别定义为第一界面和第二界面的电极间绝缘膜; 和控制栅电极。电极间绝缘膜包括选自稀土元素，选自Al，Ti，Zr，Hf，Ta，Mg，Ca，Sr和Ba中的一种或多种第二元素和氧的一种或多种第一元素。被定义为第一元素的原子数除以第二元素的原子数的第一元素的组成比在第一界面和第二界面之间改变，并且第一界面附近的组成比低于第二界面附近的位置。

20. 发明授权

US07804128B2 Nonvolatile semiconductor memory device 有权
标题翻译：非易失性半导体存储器件
公开(公告)号：US07804128B2
公开(公告)日：2010-09-28
申请号：US12199036
申请日：2008-08-27
申请人： Keiko Ariyoshi , Akira Takashima , Shoko Kikuchi , Koichi Muraoka
发明人： Keiko Ariyoshi , Akira Takashima , Shoko Kikuchi , Koichi Muraoka
IPC分类号： H01L21/8247 , H01L29/788 , H01L29/792 , H01L27/115
CPC分类号： H01L29/7881 , H01L21/28273 , H01L21/28282 , H01L29/42324 , H01L29/4234 , H01L29/513 , H01L29/517
摘要： A nonvolatile semiconductor memory device according to an example of the present invention includes a semiconductor region, source/drain areas arranged separately in the semiconductor region, a tunnel insulating film arranged on a channel region between the source/drain areas, a floating gate electrode arranged on the tunnel insulating film, an inter-electrode insulating film arranged on the floating gate electrode, and a control gate electrode arranged on the inter-electrode insulating film. The inter-electrode insulating film includes La, Al and Si.
摘要翻译：根据本发明实施例的非易失性半导体存储器件包括半导体区域，在半导体区域中单独布置的源极/漏极区域，布置在源极/漏极区域之间的沟道区域上的隧道绝缘膜，布置成在隧道绝缘膜上，布置在浮栅电极上的电极间绝缘膜和布置在电极间绝缘膜上的控制栅电极。电极间绝缘膜包括La，Al和Si。

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