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11. 发明授权

US6064585A Semiconductor device and method for fabricating the same, memory core chip and memory peripheral circuit chip 有权
标题翻译：半导体器件及其制造方法，存储器芯片和存储器外围电路芯片
公开(公告)号：US6064585A
公开(公告)日：2000-05-16
申请号：US140968
申请日：1998-08-26
申请人： Toshiki Mori , Ichiro Nakao , Tsutomu Fujita , Reiji Segawa
发明人： Toshiki Mori , Ichiro Nakao , Tsutomu Fujita , Reiji Segawa
IPC分类号： G11C5/00 , G11C5/02 , G11C5/06
CPC分类号： G11C5/025 , G11C5/06 , H01L25/0655 , H01L25/0657 , H01L25/18 , H01L2224/48091 , H01L2225/06513 , H01L2924/01055 , H01L2924/3011
摘要： The semiconductor device of the invention includes a plurality of circuit blocks including a first circuit block and a second circuit block, a block parameter of the first circuit block being different from a block parameter of the second circuit block. In the semiconductor device, the first circuit block is formed on a first semiconductor chip, and the second circuit block is formed on a second semiconductor chip and is electrically connected with the first circuit block.
摘要翻译：本发明的半导体器件包括包括第一电路块和第二电路块的多个电路块，第一电路块的块参数不同于第二电路块的块参数。在半导体器件中，第一电路块形成在第一半导体芯片上，第二电路块形成在第二半导体芯片上并与第一电路块电连接。

12. 发明授权

US4947001A Process for producing halogenated sulfone 失效
标题翻译：卤代砜生产工艺
公开(公告)号：US4947001A
公开(公告)日：1990-08-07
申请号：US364154
申请日：1989-06-12
申请人： Takashi Onishi , Toshiki Mori , Shigeaki Suzuki , Michio Takigawa , Kazuo Yamamoto
发明人： Takashi Onishi , Toshiki Mori , Shigeaki Suzuki , Michio Takigawa , Kazuo Yamamoto
IPC分类号： C07C315/04 , C07C20060101 , C07C317/08 , C07C317/22 , C07C403/06 , C07C403/22
CPC分类号： C07C403/22 , C07C403/08 , C07C403/12 , C07C2101/16
摘要： The present invention provides a process for preparing halogenated sulfones by reacting a halogenating agent with a salt of a hydroxysulfone. The halogenated sulfones are useful as an intermediate for vitamin A or its carboxylic acid esters employed as medicines or feed additives.

13. 发明授权

US08788456B2 Video server and method for managing activity log 失效
标题翻译：视频服务器和管理活动日志的方法
公开(公告)号：US08788456B2
公开(公告)日：2014-07-22
申请号：US13356321
申请日：2012-01-23
申请人： Toshiki Mori , Hiroyuki Watanabe , Naoko Satoh , Shuichi Yamaguchi
发明人： Toshiki Mori , Hiroyuki Watanabe , Naoko Satoh , Shuichi Yamaguchi
IPC分类号： G06F17/30
CPC分类号： G06F17/30781 , G06F11/3476 , G06F11/3495 , H04N21/23113 , H04N21/2405
摘要： According to one embodiment, a video server includes a plurality of processing modules and a maintenance/management module. The processing modules output an activity log file to the maintenance/management module. The maintenance/management module includes a storing medium and a maintenance/management controller. The controller determines whether the storing medium has a free region for recording the activity log file in the storing medium. The controller deletes an oldest activity log file recorded in the storing medium to form a free region if the storing medium has no free region. The controller writes the activity log file in the formed free region.
摘要翻译：根据一个实施例，视频服务器包括多个处理模块和维护/管理模块。处理模块将一个活动日志文件输出到维护/管理模块。维护/管理模块包括存储介质和维护/管理控制器。控制器确定存储介质是否具有用于在存储介质中记录活动日志文件的空闲区域。如果存储介质没有空闲区域，则控制器删除记录在存储介质中的最旧的活动日志文件以形成自由区域。控制器将活动日志文件写入形成的自由区域。

14. 发明申请

US20130067275A1 VIDEO SERVER AND METHOD FOR CONTROLLING REBUILDING OF A DISK ARRAY 审中-公开
标题翻译：用于控制盘阵列重建的视频服务器和方法
公开(公告)号：US20130067275A1
公开(公告)日：2013-03-14
申请号：US13557965
申请日：2012-07-25
申请人： Hiroyuki Watanabe , Toshiki Mori , Naoko Satoh
发明人： Hiroyuki Watanabe , Toshiki Mori , Naoko Satoh
IPC分类号： G06F11/20 , G06F11/10
CPC分类号： G06F11/1092 , H04N21/23116
摘要： According to one embodiment, a video server includes an allocator. The allocator allocates resources for performing rebuilding. When processing which needs to be performed in real time is requested during the rebuilding, the allocator determines whether resources for performing the requested processing are available. When resources for performing the requested processing are available, the allocator allocates available resources to the requested processing. When resources for performing the requested processing are not available, the allocator deallocates resources allocated to the rebuilding to secure resources for performing the requested processing, and allocates the secured resources to the requested processing.
摘要翻译：根据一个实施例，视频服务器包括分配器。分配器分配用于执行重建的资源。当在重建期间请求需要实时执行的处理时，分配器确定用于执行所请求的处理的资源是否可用。当用于执行所请求的处理的资源可用时，分配器向所请求的处理分配可用资源。当用于执行所请求的处理的资源不可用时，分配器释放分配给重建的资源以保护资源以执行所请求的处理，并且将所保护的资源分配给所请求的处理。

15. 发明申请

US20120239615A1 VIDEO SERVER AND METHOD FOR MANAGING ACTIVITY LOG 失效
标题翻译：视频服务器和管理活动日志的方法
公开(公告)号：US20120239615A1
公开(公告)日：2012-09-20
申请号：US13356321
申请日：2012-01-23
申请人： Toshiki Mori , Hiroyuki Watanabe , Naoko Satoh , Shuichi Yamaguchi
发明人： Toshiki Mori , Hiroyuki Watanabe , Naoko Satoh , Shuichi Yamaguchi
IPC分类号： G06F7/00
CPC分类号： G06F17/30781 , G06F11/3476 , G06F11/3495 , H04N21/23113 , H04N21/2405
摘要： According to one embodiment, a video server includes a plurality of processing modules and a maintenance/management module. The processing modules output an activity log file to the maintenance/management module. The maintenance/management module includes a storing medium and a maintenance/management controller. The controller determines whether the storing medium has a free region for recording the activity log file in the storing medium. The controller deletes an oldest activity log file recorded in the storing medium to form a free region if the storing medium has no free region. The controller writes the activity log file in the formed free region.
摘要翻译：根据一个实施例，视频服务器包括多个处理模块和维护/管理模块。处理模块将一个活动日志文件输出到维护/管理模块。维护/管理模块包括存储介质和维护/管理控制器。控制器确定存储介质是否具有用于在存储介质中记录活动日志文件的空闲区域。如果存储介质没有空闲区域，则控制器删除记录在存储介质中的最旧的活动日志文件以形成自由区域。控制器将活动日志文件写入形成的自由区域。

16. 发明申请

US20110312191A1 SEMICONDUCTOR DEVICE MANUFACTURING METHOD 有权
标题翻译：半导体器件制造方法
公开(公告)号：US20110312191A1
公开(公告)日：2011-12-22
申请号：US13070740
申请日：2011-03-24
申请人： Yoshiyuki Ohkura , Toshiki Mori
发明人： Yoshiyuki Ohkura , Toshiki Mori
IPC分类号： H01L21/31
CPC分类号： H01L21/02126 , H01L21/02271 , H01L21/0234 , H01L21/02348 , H01L21/3105 , H01L21/76808 , H01L21/76825 , H01L21/76826
摘要： A semiconductor device manufacturing method includes forming an insulation film containing silicon, oxygen and carbon over a semiconductor substrate by chemical vapor deposition; making UV cure on the insulation film being heated at a temperature of 350° C. or below after the forming the insulation film; and making helium plasma processing on the insulation film after the UV cure.
摘要翻译：半导体器件制造方法包括通过化学气相沉积在半导体衬底上形成含有硅，氧和碳的绝缘膜; 在形成绝缘膜之后，在350℃以下的温度下对绝缘膜进行UV固化; 并在UV固化后对绝缘膜进行氦等离子体处理。

17. 发明申请

US20110170346A1 NON-VOLATILE SEMICONDUCTOR MEMORY DEVICE, SIGNAL PROCESSING SYSTEM, METHOD FOR CONTROLLING SIGNAL PROCESSING SYSTEM, AND METHOD FOR REPROGRAMMING NON-VOLATILE SEMICONDUCTOR MEMORY DEVICE 审中-公开
标题翻译：非挥发性半导体存储器件，信号处理系统，用于控制信号处理系统的方法和用于重现非易失性半导体存储器件的方法
公开(公告)号：US20110170346A1
公开(公告)日：2011-07-14
申请号：US13070276
申请日：2011-03-23
申请人： Hiroyasu NAGAI , Masahiro Toki , Toshiki Mori
发明人： Hiroyasu NAGAI , Masahiro Toki , Toshiki Mori
IPC分类号： G11C16/26
CPC分类号： G11C16/28 , G11C11/5628 , G11C16/26 , G11C16/349
摘要： A non-volatile semiconductor memory device includes a memory cell array including a data storage area and a reprogram information storage area, and a reprogram information holder circuit configured to store data read from the reprogram information storage area. A reference level switch circuit selects one from a plurality of read reference levels generated by a reference level generator circuit, based on an output of the reprogram information holder circuit. A read circuit reads memory cell data from the data storage area 104 based on the selected read reference level, and outputs the memory cell data. Therefore, a degradation in data hold capability due to reprogram operation is reduced or prevented. In addition, intended operation is achieved without being affected by interruption or resumption of power supply, a circuit size is reduced, and high-speed read operation is achieved.
摘要翻译：非挥发性半导体存储器件包括存储单元阵列，其包括数据存储区域和重新编程信息存储区域，以及重新编程信息保持器电路，被配置为存储从重新编程信息存储区域读取的数据。参考电平开关电路基于重新编程信息保持器电路的输出从参考电平发生器电路产生的多个读取参考电平中选择一个。读取电路基于所选择的读取参考电平从数据存储区域104读取存储单元数据，并输出存储单元数据。因此，由于重新编程操作引起的数据保持能力的降低被减少或防止。此外，在不受电源中断或恢复影响的情况下实现预期的操作，电路尺寸减小，并且实现高速读取操作。

18. 发明申请

US20100074596A1 VIDEO DATA PROCESSOR AND VIDEO DATA PROCESSING METHOD 审中-公开
标题翻译：视频数据处理器和视频数据处理方法
公开(公告)号：US20100074596A1
公开(公告)日：2010-03-25
申请号：US12548966
申请日：2009-08-27
申请人： Naoko SATOH , Yoshiro Osaki , Toshiki Mori , Kenji Kimiyama , Kiyoshi Yamaguchi , Masashi Shiratori , Yasuyuki Ushio
发明人： Naoko SATOH , Yoshiro Osaki , Toshiki Mori , Kenji Kimiyama , Kiyoshi Yamaguchi , Masashi Shiratori , Yasuyuki Ushio
IPC分类号： H04N7/26
CPC分类号： G11B20/10527 , G11B27/034 , G11B27/105 , G11B2020/10722 , G11B2020/10759 , H04N5/907 , H04N9/8227 , H04N21/4147 , H04N21/4184 , H04N21/4223 , H04N21/440263 , H04N21/443 , H04N21/458 , H04N21/47205
摘要： A video data processor and a video data processing method which uses hardware resources efficiently even when a plurality of processing occurs to video data are performed in parallel is provided. The video data read from a recording medium in playback processing, editing processing, duplication processing, and other process that may be accomplished upon video is outputted to either of two lines by distributor 171. The video data that is outputted is temporarily held by input buffer 172-1, and decoded by decoder 173-1, and outputted to frame buffer 174-1. Frame buffer 174-1 and 174-2 are divided into a plurality of holding areas and these holding areas are dynamically assigned according to processing of playback processing, editing processing, or other processing that may be accomplished upon video. Thereby, the holding areas in frame buffer 174-1 and 174-2 can be used efficiently.
摘要翻译：提供了并行执行即使对视频数据进行多次处理而有效地使用硬件资源的视频数据处理器和视频数据处理方法。在再现处理，编辑处理，复制处理以及视频中可以实现的其他处理中从记录介质读取的视频数据由分配器171输出到两行中。由输出缓冲器临时保存输出的视频数据 172-1，并由解码器173-1解码，并输出到帧缓冲器174-1。帧缓冲器174-1和174-2被划分为多个保持区域，并且这些保持区域是根据可以在视频上实现的回放处理，编辑处理或其他处理的处理来动态分配的。由此，可以有效地使用帧缓冲器174-1和174-2中的保持区域。

19. 发明申请

US20080008007A1 Semiconductor memory device, and read method and read circuit for the same 有权
标题翻译：半导体存储器件，以及读取方法和读取电路相同
公开(公告)号：US20080008007A1
公开(公告)日：2008-01-10
申请号：US11783799
申请日：2007-04-12
申请人： Toshiki Mori
发明人： Toshiki Mori
IPC分类号： G11C8/08 , G11C11/34 , G11C8/10
CPC分类号： G11C16/24 , G11C16/28
摘要： In a semiconductor memory device operative to discharge residual charge in a read bit line in a read cycle, the bit line is in the reset state at all times except during read operation. The reset state of a bit line is canceled when selected and connected to a read circuit for read, and information stored in a selected memory cell is read via the selected bit line. Upon completion of the read of the memory cell, the selected bit line is disconnected from the read circuit and reset to thereby complete discharge of residual charge in the read bit line prior to read operation in the next cycle. This ensures that during read determination operation in the next read cycle, the potential of a selected bit line will not vary with the bit line residual discharge in the previous read cycle.
摘要翻译：在可读取周期中对读取位线中剩余电荷进行放电的半导体存储器件中，除了读取操作之外，位线始终处于复位状态。当选择并且连接到读取电路进行读取时，位线的复位状态被取消，并且通过所选择的位线读取存储在所选存储单元中的信息。在完成存储单元的读取之后，所选择的位线与读取电路断开连接并重置，从而在下一个周期的读取操作之前完成读取位线中的剩余电荷的放电。这确保了在下一个读取周期的读取确定操作期间，所选位线的电位将不会随先前读取周期中的位线残留放电而变化。

20. 发明申请

US20070043984A1 Nonvolatile semiconductor memory device and signal processing system 审中-公开
标题翻译：非易失性半导体存储器件和信号处理系统
公开(公告)号：US20070043984A1
公开(公告)日：2007-02-22
申请号：US11410051
申请日：2006-04-25
申请人： Toshiki Mori , Seiji Yamahira
发明人： Toshiki Mori , Seiji Yamahira
IPC分类号： G11C29/00
CPC分类号： G11C16/0483 , G11C16/0408 , G11C16/06 , G11C16/3459
摘要： The nonvolatile semiconductor memory device includes: a first memory block having a first program level and a first read circuit; a second memory block having a second program level different from the first program level and a second read circuit of a scheme different from the first read circuit, the second memory block being formed on the same substrate as the first memory block; and a data output circuit for selecting either the first read circuit or the second read circuit and outputting data read via the selected read circuit externally.
摘要翻译：非易失性半导体存储器件包括：具有第一编程电平和第一读取电路的第一存储器块; 具有与第一编程电平不同的第二编程电平的第二存储器块和与第一读取电路不同的方案的第二读取电路，第二存储器块形成在与第一存储器块相同的衬底上; 以及数据输出电路，用于选择第一读取电路或第二读取电路，并且从外部输出经由所选择的读取电路读取的数据。

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