专利快速检索-快速检索全球专利，免费商用专利数据库-IPRDB

11. 发明授权

US08362815B2 Digital phase locked loop 有权
标题翻译：数字锁相环
公开(公告)号：US08362815B2
公开(公告)日：2013-01-29
申请号：US12978221
申请日：2010-12-23
申请人： Nenad Pavlovic , Jozef Reinerus Maria Bergervoet
发明人： Nenad Pavlovic , Jozef Reinerus Maria Bergervoet
IPC分类号： H03L7/06
CPC分类号： H03L7/18 , H03L7/081 , H03L7/0991
摘要： A digital phase locked loop (300) configured to receive a reference clock signal (302) and a channel control word (308), and to generate an output clock signal (304). The digital phase locked loop comprising an adjustable delay component (306) configured to: receive the reference clock signal (302), apply a time delay to the reference clock signal (302) in accordance with a time delay control signal (316); and provide a delayed reference clock signal (318). The digital phase locked loop further comprising a timing component (320) configured to process the delayed reference clock signal (318) and the output clock signal (304), and generate a first control signal (322) representative of the phase of the output clock signal (304); a reference accumulator (310) configured to receive the channel command word (308) and generate: a second control signal (312) representative of the phase of an intended output clock signal; and the time delay control signal (316) such that the delayed reference clock signal (318) is delayed by a period of time representative of a first portion of the phase of the intended output clock signal. The digital phase locked loop also comprising a controller (314) configured to process the first and second control signals (322, 312), and generate a DCO control signal (326) for setting the frequency of a digitally controlled oscillator (328) in accordance with the first and second control signals (322, 312); and a digitally controlled oscillator (328) configured to generate the output clock signal (304) in accordance with the DCO control signal (326).
摘要翻译：数字锁相环（300），被配置为接收参考时钟信号（302）和信道控制字（308），并产生输出时钟信号（304）。数字锁相环包括可调节延迟部件（306），其被配置为：接收参考时钟信号（302），根据时间延迟控制信号（316）对参考时钟信号（302）施加时间延迟; 并提供延迟的参考时钟信号（318）。数字锁相环还包括被配置为处理延迟的参考时钟信号（318）和输出时钟信号（304）的定时组件（320），并且产生表示输出时钟的相位的第一控制信号（322）信号（304）; 参考累加器（310），被配置为接收所述信道命令字（308）并产生：表示预期输出时钟信号的相位的第二控制信号（312）; 和时间延迟控制信号（316），使得延迟的参考时钟信号（318）被延迟表示期望输出时钟信号的相位的第一部分的时间段。数字锁相环还包括被配置为处理第一和第二控制信号（322,312）的控制器（314），并且产生用于根据数字控制振荡器（328）的频率设置的DCO控制信号（326）具有第一和第二控制信号（322,312）; 和配置成根据DCO控制信号（326）产生输出时钟信号（304）的数控振荡器（328）。

12. 发明授权

US09413407B2 Conversion system 有权
标题翻译：转换系统
公开(公告)号：US09413407B2
公开(公告)日：2016-08-09
申请号：US13178559
申请日：2011-07-08
申请人： Jan van Sinderen , Johannes Hubertus Antonius Brekelmans , Frank Harald Erich Ho Chung Leong , Nenad Pavlovic
发明人： Jan van Sinderen , Johannes Hubertus Antonius Brekelmans , Frank Harald Erich Ho Chung Leong , Nenad Pavlovic
IPC分类号： H03D3/22 , H04B1/30 , H03D7/16
CPC分类号： H04B1/30 , H03D7/16 , H03D7/165
摘要： The invention relates to frequency conversion systems, in particular for use as up-converters or down-converters in radiofrequency (RF) receivers or transmitters, exemplary embodiments including a radiofrequency receiver including an RF signal input; a mixing module including a first plurality of IF amplifiers each connected to the RF signal input via a switch; a multi-phase local oscillator signal generator configured to provide a switching signal to each switch; and a summing module configured to receive output signals from each of the IF amplifiers and to provide a second plurality of output IF signals from a weighted sum of the IF amplifier output signals, wherein the second plurality is different to the first plurality.
摘要翻译：本发明涉及频率转换系统，特别是用作射频（RF）接收机或发射机中的上转换器或下变频器，包括射频信号输入的射频接收机的示例性实施例; 混合模块，其包括经由开关连接到RF信号输入的第一多个IF放大器; 配置为向每个开关提供切换信号的多相本地振荡器信号发生器; 以及求和模块，被配置为从每个IF放大器接收输出信号，并且从IF放大器输出信号的加权和提供第二多个输出IF信号，其中第二多个不同于第一多个。

13. 发明授权

US08198949B2 Digital modulator 有权
标题翻译：数字调制器
公开(公告)号：US08198949B2
公开(公告)日：2012-06-12
申请号：US13001894
申请日：2009-07-01
申请人： Xin He , Jan Van Sinderen , Manuel Collados Asensio , Nenad Pavlovic
发明人： Xin He , Jan Van Sinderen , Manuel Collados Asensio , Nenad Pavlovic
IPC分类号： H03C3/00 , H04L27/00 , H04L27/04 , H04L27/12 , H04L27/20
CPC分类号： H03C5/00
摘要： The present application relates to a digital modulator comprising an output stage comprising a number of unit cell arrays, and a sampling stage. The present application relates also to a communication device comprising said digital modulator, a method for digitally modulating and a computer program product. More particularly, the digital modulator comprises an output stage comprising a number of unit cell arrays, wherein the output stage comprises at least one carrier frequency signal input terminal configured to receive a carrier frequency signal. The digital modulator comprises a sampling stage connectable to the output stage, wherein the sampling stage is configured to oversample at least one data input signal. The digital modulator comprises at least one sampling clock generating device configured to generate at least one sampling clock signal depending on the number of arranged unit cell arrays and the carrier frequency signal.
摘要翻译：本申请涉及一种数字调制器，其包括包括多个单元阵列的输出级和采样级。本申请还涉及包括所述数字调制器，数字调制方法和计算机程序产品的通信设备。更具体地，数字调制器包括包括多个单元阵列的输出级，其中输出级包括被配置为接收载波频率信号的至少一个载波频率信号输入端。数字调制器包括可连接到输出级的采样级，其中采样级被配置为对至少一个数据输入信号进行过采样。数字调制器包括至少一个采样时钟产生装置，其被配置为根据排列的单元阵列的数量和载波频率信号产生至少一个采样时钟信号。

14. 发明申请

US20120008717A1 CONVERSION SYSTEM 有权
标题翻译：转换系统
公开(公告)号：US20120008717A1
公开(公告)日：2012-01-12
申请号：US13178559
申请日：2011-07-08
申请人： Jan van Sinderen , Johannes Hubertus Antonius Brekelmans , Frank Harald Erich Ho Chung Leong , Nenad Pavlovic
发明人： Jan van Sinderen , Johannes Hubertus Antonius Brekelmans , Frank Harald Erich Ho Chung Leong , Nenad Pavlovic
IPC分类号： H04L25/49 , H04B1/10
CPC分类号： H04B1/30 , H03D7/16 , H03D7/165
摘要： The invention relates to frequency conversion systems, in particular for use as up-converters or down-converters in radiofrequency (RF) receivers or transmitters, exemplary embodiments including a radiofrequency receiver (1000) comprising: an RF signal input (1001); a mixing module (1002) comprising a first plurality of IF amplifiers (10041-3) each connected to the RF signal input (1001) via a switch (10031-3); a multi-phase local oscillator signal generator (1300) configured to provide a switching signal to each switch (10031-3); and a summing module (1005) configured to receive output signals from each of the IF amplifiers (10041-3) and to provide a second plurality of output IF signals from a weighted sum of the IF amplifier output signals, wherein the second plurality is different to the first plurality.
摘要翻译：本发明涉及频率转换系统，特别是用作射频（RF）接收机或发射机中的上转换器或下变频器，包括射频接收机（1000）的示例性实施例包括：RF信号输入（1001）; 混合模块（1002），包括经由开关（10031-3）连接到RF信号输入（1001）的第一多个IF放大器（10041-3）; 配置为向每个开关（10031-3）提供切换信号的多相本地振荡器信号发生器（1300）; 以及被配置为从每个IF放大器（10041-3）接收输出信号并从IF放大器输出信号的加权和提供第二多个输出IF信号的求和模块（1005），其中第二多个不同到第一个多个。

15. 发明申请

US20110291732A1 DIGITAL SIGNAL GENERATOR 有权
标题翻译：数字信号发生器
公开(公告)号：US20110291732A1
公开(公告)日：2011-12-01
申请号：US13116967
申请日：2011-05-26
申请人： Nenad Pavlovic , Johannes Hubertus Antonius Brekelmans , Jan van Sinderen
发明人： Nenad Pavlovic , Johannes Hubertus Antonius Brekelmans , Jan van Sinderen
IPC分类号： G06F1/04
CPC分类号： G06F1/025
摘要： The invention relates to a digital signal generator for providing one or more phases of a local oscillator signal for use in digital to analogue converters and harmonic rejection mixers. Embodiments disclosed include a local oscillator signal generator (200) for a mixer of a radiofrequency receiver, the signal generator (200) comprising a bit sequence generator (201) having a plurality of parallel output lines (203), a digital signal generator (202) having a serial output line (204) and a plurality of input lines connected to respective output lines (203) of the bit sequence generator (201) and a clock signal input line (205), wherein the digital signal generator (202) is configured to provide an output bit sequence on the serial output line (204) at a rate given by a clock signal provided on the clock signal input line (205) and a sequence given by a sequence of bits from the bit sequence generator (201) on the plurality of input lines (203).
摘要翻译：本发明涉及用于提供用于数模转换器和谐波抑制混频器的本地振荡器信号的一个或多个相位的数字信号发生器。所公开的实施例包括用于射频接收机的混频器的本地振荡器信号发生器（200），所述信号发生器（200）包括具有多个并行输出线（203）的位序发生器（201），数字信号发生器）和连接到位序发生器（201）的相应输出线（203）的多条输入线和时钟信号输入线（205），其中数字信号发生器（202）是被配置为以由在时钟信号输入线（205）上提供的时钟信号给出的速率和由位序列发生器（201）的位序列给出的序列在串行输出线（204）上提供输出比特序列，在多个输入线（203）上。

16. 发明授权

US09611553B2 Hydrogen and oxygen generator 有权
公开(公告)号：US09611553B2
公开(公告)日：2017-04-04
申请号：US13664551
申请日：2012-10-31
申请人： Dejan Pavlovic , Nenad Pavlovic
发明人： Dejan Pavlovic , Nenad Pavlovic
IPC分类号： C25C7/00 , C25C7/02 , C25C3/16 , C25C7/04 , C25B9/04 , C25B13/02 , C25B1/02 , C25B1/04 , C25B11/02 , C25B9/06
CPC分类号： C25B1/04 , C25B9/06 , C25B11/02 , Y02E60/366
摘要： A hydrogen generator for producing hydrogen and oxygen gases comprising a housing having an electrolyte reservoir and an electrolysis cell, an electrical power source; a plurality of axially spaced-apart alternating positive and negative electrode plates mounted concentrically and separated from each other by a peripheral sealing ring in the electrolysis chamber; a pair of opposite tabs formed on the perimeter of the plates with openings for receiving an electrode support rod therein, positive electrode plates connected to a positive electrode support rod and negative electrode plates connected to a negative electrode support rod for electrically connecting the positive and the negative electrode plates to the power source, and fluid conduits for conveying liquid electrolyte from the reservoir to the electrolysis cell and for conveying hydrogen and oxygen gases from the electrolysis chamber; the electrode plates comprise a titanium plate having a 1-3 micron platinum coating, said plates preferably having a circular shape with a pair of diametric tabs formed on the edge thereof, each tab having a central opening for receiving the electrode rod therein.

17. 发明申请

US20130202093A1 C-Arm X-Ray System and Method of Compensation for C-Arm Deformations and Oscillations 有权
标题翻译： C臂X射线系统和C臂变形和振荡补偿方法
公开(公告)号：US20130202093A1
公开(公告)日：2013-08-08
申请号：US13761970
申请日：2013-02-07
申请人： Michael Meyer , Nenad Pavlovic
发明人： Michael Meyer , Nenad Pavlovic
IPC分类号： H05G1/02
CPC分类号： H05G1/02 , A61B6/4441 , A61B6/4458 , A61B6/547 , A61B6/588
摘要： An x-ray system having a C-arm 1 and an associated method are provided. The x-ray system includes at least one adjustment unit for at least one component of the x-ray system that is actively connected to the C-arm. The at least one adjustment unit compensates for a spatial change in position of the component caused by deformation and/or oscillation of the C-arm.
摘要翻译：提供具有C臂1和相关方法的X射线系统。 x射线系统包括用于X射线系统的至少一个部件的至少一个调节单元，其主动地连接到C形臂。所述至少一个调整单元补偿由所述C形臂的变形和/或振荡引起的所述部件的位置的空间变化。

18. 发明申请

US20110164702A1 POLAR TRANSMITTER 有权
标题翻译：极性发射器
公开(公告)号：US20110164702A1
公开(公告)日：2011-07-07
申请号：US13062330
申请日：2009-08-24
申请人： Nenad Pavlovic , Manel Collados , Xin He , Jan Van Sinderen
发明人： Nenad Pavlovic , Manel Collados , Xin He , Jan Van Sinderen
IPC分类号： H04L27/00
CPC分类号： H04L27/361 , H04L27/2627 , H04L2027/0018 , H04L2027/0067
摘要： The present application relates to at least one digitally controlled oscillator and a data modulation device. More particularly, the digital polar transmitter comprises at least one digitally controlled oscillator configured to generate at least one frequency. The digital polar transmitter comprises a data modulation device, wherein the data modulation device comprises at least one data input terminal, at least one output terminal, and at least one frequency input terminal, wherein the output terminal is connected to the digitally controlled oscillator. The digital polar transmitter comprises a phase measuring device configured to measure phase information from the output signal of the data modulation device for every frequency sample. The digital polar transmitter comprises a phase error detecting device configured to detect a phase error at least depending on the measured phase information, wherein the phase error detecting device is configured to apply the detected phase error to the output signal of the data modulation device.
摘要翻译：本申请涉及至少一个数字控制振荡器和数据调制装置。更具体地，数字极化发射器包括被配置为产生至少一个频率的至少一个数字控制振荡器。数字极性发射机包括数据调制装置，其中数据调制装置包括至少一个数据输入端，至少一个输出端和至少一个频率输入端，其中输出端与数控振荡器相连。数字极性发射机包括相位测量装置，其被配置为针对每个频率样本从数据调制装置的输出信号测量相位信息。数字极性发射机包括相位误差检测装置，其被配置为至少根据所测量的相位信息检测相位误差，其中相位误差检测装置被配置为将检测到的相位误差应用于数据调制装置的输出信号。

19. 发明申请

US20060290433A1 Phase-switching dual modulus prescaler 有权
标题翻译：相位切换双模预分频器
公开(公告)号：US20060290433A1
公开(公告)日：2006-12-28
申请号：US10573733
申请日：2004-09-28
申请人： Dominicus Leenaerts , Nenad Pavlovic , Ketan Mistry
发明人： Dominicus Leenaerts , Nenad Pavlovic , Ketan Mistry
IPC分类号： H03L7/00
CPC分类号： H03K23/667 , H03K23/662 , H03L7/193
摘要： A phase-switching dual modulus prescaler having a dual modulus divider is provided. Said divider comprises a first and second divide-by-2 circuit (A;B), wherein said second divide-by-2 circuit (B) is coupled to the output of said first divide-by-2 circuit (A) and at least said second divide-by-two circuit (B) comprises a four phase output each separated by 90°. A phase selection unit (PSU) is provided for selecting one of the four phase outputs (Ip, In, Qp, Qn; INi, INni, INq, Innq) of the second divide-by-2 circuit (B). Moreover, a phase control unit is provided for providing control signal (C1, NC0; C2, NC2; C3, NC3) to the phase selection unit, wherein the phase selection unit (PSU) performs the selection of the four phase outputs (Ip, In, Qp, Qn; INi, INni, INq, Innq) according to the control signals (C0, NC0; C1, NC1; C2, NC2). Said phase selection unit (PSU) is implemented based on direct logic. The implementation of the phase selection unit based on direct logic enables a higher speed and saves area on the chip.
摘要翻译：提供了具有双模数分频器的相位切换双模预分频器。所述分频器包括第一和第二除以2电路（A; B），其中所述第二分频电路（B）耦合到所述第一分频电路（A）的输出端，并且在至少所述第二分频电路（B）包括每相分开90°的四相输出。提供一个相位选择单元（PSU），用于选择四个相位输出中的一个（I SUB，P，I，N，N，Q，（B）的第二分频电路（IN），INn，INq，Innq）。此外，提供相位控制单元，用于向相位选择单元提供控制信号（C 1，NC 0; C 2，NC 2; C 3，NC 3），其中相位选择单元（PSU）执行四相输出（I p>，，n，;;;;;;;;;;;;;;;;，，，，，，，，，，，，，，，，，，，，，，， Innq）根据控制信号（C 0，NC 0; C 1，NC 1; C 2，NC 2）。所述相位选择单元（PSU）是基于直接逻辑实现的。基于直接逻辑的相位选择单元的实现能够实现更高的速度并节省芯片上的面积。

20. 发明授权

US08638174B2 Digital signal generator 有权
标题翻译：数字信号发生器
公开(公告)号：US08638174B2
公开(公告)日：2014-01-28
申请号：US13116967
申请日：2011-05-26
申请人： Nenad Pavlovic , Johannes Hubertus Antonius Brekelmans , Jan van Sinderen
发明人： Nenad Pavlovic , Johannes Hubertus Antonius Brekelmans , Jan van Sinderen
IPC分类号： H03B27/00 , G06F1/04 , H04B1/10 , H04B1/16
CPC分类号： G06F1/025
摘要： The invention relates to a digital signal generator for providing one or more phases of a local oscillator signal for use in digital to analogue converters and harmonic rejection mixers. Embodiments disclosed include a local oscillator signal generator (200) for a mixer of a radiofrequency receiver, the signal generator (200) comprising a bit sequence generator (201) having a plurality of parallel output lines (203), a digital signal generator (202) having a serial output line (204) and a plurality of input lines connected to respective output lines (203) of the bit sequence generator (201) and a clock signal input line (205), wherein the digital signal generator (202) is configured to provide an output bit sequence on the serial output line (204) at a rate given by a clock signal provided on the clock signal input line (205) and a sequence given by a sequence of bits from the bit sequence generator (201) on the plurality of input lines (203).
摘要翻译：本发明涉及用于提供用于数模转换器和谐波抑制混频器的本地振荡器信号的一个或多个相位的数字信号发生器。所公开的实施例包括用于射频接收机的混频器的本地振荡器信号发生器（200），所述信号发生器（200）包括具有多个并行输出线（203）的位序发生器（201），数字信号发生器）和连接到位序发生器（201）的相应输出线（203）的多条输入线和时钟信号输入线（205），其中数字信号发生器（202）是被配置为以由在时钟信号输入线（205）上提供的时钟信号给出的速率和由位序列发生器（201）的位序列给出的序列在串行输出线（204）上提供输出比特序列，在多个输入线（203）上。

你已经成功收藏专利！

检索式保存成功!

IPRDB

热门服务

关于我们

友情链接

联系方式