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11. 发明授权

US5629858A CMOS transistor network to gate level model extractor for simulation, verification and test generation 失效
标题翻译： CMOS晶体管网络到门级模型提取器进行仿真，验证和测试生成
公开(公告)号：US5629858A
公开(公告)日：1997-05-13
申请号：US406283
申请日：1995-03-17
申请人： Sandip Kundu , Andreas Kuehlmann , Arvind Srinivasan
发明人： Sandip Kundu , Andreas Kuehlmann , Arvind Srinivasan
IPC分类号： G01R31/3183 , G06F17/50
CPC分类号： G01R31/318357 , G06F17/5022
摘要： A technique for extracting a gate level logic model from transistor networks has been described. The resultant logic model can be technology dependent or technology independent, depending on control parameters and environment of the program. It handles all CMOS logic families including static, precharge, pass CMOS switching network and self-resetting families. The output gate level model can be used in variety of applications including but not limited to logic simulation, verification, test generation, debug, diagnosis, etc.
摘要翻译：已经描述了从晶体管网络提取门级逻辑模型的技术。结果逻辑模型可以依赖于技术或与技术无关，具体取决于程序的控制参数和环境。它处理所有CMOS逻辑系列，包括静态，预充电，通过CMOS开关网络和自复位系列。输出门级模型可用于各种应用，包括但不限于逻辑仿真，验证，测试生成，调试，诊断等。

12. 发明授权

US08913613B2 Method and system for classification and management of inter-blade network traffic in a blade server 有权
标题翻译：刀片服务器中刀片间网络流量的分类和管理方法和系统
公开(公告)号：US08913613B2
公开(公告)日：2014-12-16
申请号：US13028593
申请日：2011-02-16
申请人： Arvind Srinivasan , Marcelino M. Dignum
发明人： Arvind Srinivasan , Marcelino M. Dignum
IPC分类号： H04L12/28 , H04L12/18 , H04L12/761 , H04L12/851
CPC分类号： H04L12/18 , H04L45/16 , H04L47/2483
摘要： A system and method for classifying a multicast packet, involving receiving, at a classification engine, the multicast packet sent from a packet source; determining, based on a source address of the multicast packet, a Direct Memory Access (DMA) filter vector; determining, based on a destination address of the multicast packet, a DMA target vector, where the DMA target vector includes a listing of DMA channels which are available to transfer the multicast packet; determining a DMA final vector based on the DMA filter vector and the DMA target vector; and sending the multicast packet according to the DMA final vector.
摘要翻译：一种用于对组播分组进行分类的系统和方法，包括在分类引擎处接收从分组源发送的多播分组; 基于多播分组的源地址确定直接存储器访问（DMA）滤波器向量; 基于所述多播分组的目的地地址确定DMA目标向量，其中所述DMA目标向量包括可用于传送所述多播分组的DMA通道的列表; 基于DMA滤波器向量和DMA目标矢量确定DMA最终向量; 并根据DMA最终向量发送组播数据包。

13. 发明申请

US20120207158A1 METHOD AND SYSTEM FOR CLASSIFICATION AND MANAGEMENT OF INTER-BLADE NETWORK TRAFFIC IN A BLADE SERVER 有权
标题翻译：刀片服务器内部刀片网络流量分类与管理的方法与系统
公开(公告)号：US20120207158A1
公开(公告)日：2012-08-16
申请号：US13028593
申请日：2011-02-16
申请人： Arvind Srinivasan , Marcelino M. Dignum
发明人： Arvind Srinivasan , Marcelino M. Dignum
IPC分类号： H04L12/56
CPC分类号： H04L12/18 , H04L45/16 , H04L47/2483
摘要： A system and method for classifying a multicast packet, involving receiving, at a classification engine, the multicast packet sent from a packet source; determining, based on a source address of the multicast packet, a Direct Memory Access (DMA) filter vector; determining, based on a destination address of the multicast packet, a DMA target vector, where the DMA target vector includes a listing of DMA channels which are available to transfer the multicast packet; determining a DMA final vector based on the DMA filter vector and the DMA target vector; and sending the multicast packet according to the DMA final vector.
摘要翻译：一种用于对组播分组进行分类的系统和方法，包括在分类引擎处接收从分组源发送的多播分组; 基于多播分组的源地址确定直接存储器访问（DMA）滤波器向量; 基于所述多播分组的目的地地址确定DMA目标向量，其中所述DMA目标向量包括可用于传送所述多播分组的DMA通道的列表; 基于DMA滤波器向量和DMA目标矢量确定DMA最终向量; 并根据DMA最终向量发送组播数据包。

14. 发明申请

US20120207039A1 METHOD AND SYSTEM FOR VALIDATING NETWORK TRAFFIC CLASSIFICATION IN A BLADE SERVER 有权
标题翻译：用于在刀片服务器中验证网络流量分类的方法和系统
公开(公告)号：US20120207039A1
公开(公告)日：2012-08-16
申请号：US13028513
申请日：2011-02-16
申请人： Arvind Srinivasan , Marcelino M. Dignum
发明人： Arvind Srinivasan , Marcelino M. Dignum
IPC分类号： H04J1/16
CPC分类号： H04L43/50 , H04L47/2441
摘要： A system and method for validating network traffic routing within a blade chassis, involving generating a first packet for sending to a first packet receiver by a first route; inserting a first session identifier into a payload of the first packet, where the first session identifier identifies a first session of the first packet receiver; sending the first packet to a packet classifier; sending a first copy packet to a first expect queue, where the first copy packet is a duplicate of the first packet; receiving the first packet by the packet classifier; classifying the first packet by the packet classifier to obtain a first classified packet; extracting the first session identifier from the first classified packet to obtain a first extracted session identifier; and determining whether the first extracted session identifier matches the first session identifier.
摘要翻译：一种用于验证刀片机箱内的网络流量路由的系统和方法，包括生成用于通过第一路由发送到第一分组接收机的第一分组; 将第一会话标识符插入到所述第一分组的有效载荷中，其中所述第一会话标识符识别所述第一分组接收机的第一会话; 将第一分组发送到分组分类器; 将第一复制分组发送到第一期望队列，其中所述第一复制分组是所述第一分组的副本; 由分组分类器接收第一分组; 通过分组分类器对第一分组进行分类以获得第一分类分组; 从第一分类分组提取第一会话标识符以获得第一提取的会话标识符; 以及确定所述第一提取的会话标识符是否与所述第一会话标识符匹配。

15. 发明授权

US08176304B2 Mechanism for performing function level reset in an I/O device 有权
标题翻译：在I / O设备中执行功能级别复位的机制
公开(公告)号：US08176304B2
公开(公告)日：2012-05-08
申请号：US12256250
申请日：2008-10-22
申请人： Rahoul Puri , Arvind Srinivasan , Louise Y. Yeung , Marcelino M. Dignum , John E. Watkins
发明人： Rahoul Puri , Arvind Srinivasan , Louise Y. Yeung , Marcelino M. Dignum , John E. Watkins
IPC分类号： G06F9/00 , G06F15/177 , G06F1/24 , G06F3/00 , G06F13/00
CPC分类号： G06F13/385
摘要： An I/O device having function level reset functionality includes a host interface that may include a master reset unit, a plurality of client interfaces, each corresponding to one or more functions, and a plurality of hardware resources. Each hardware resource may be associated with a respective function. In response to receiving a reset request to reset a specific function, the master reset unit may provide to each client interface, a request signal corresponding to the reset request, and a signal identifying the specific function. Each client interface having an association with the specific function may initiate a reset operation of the associated hardware resources, and also provide a client reset done signal for the specific function to the master reset unit in response to completion of the reset operations of the hardware resources. The master reset unit provides a reset done signal for the specific function to the host interface.
摘要翻译：具有功能级复位功能的I / O设备包括主机接口，其可以包括主复位单元，多个客户端接口，每个对应于一个或多个功能，以及多个硬件资源。每个硬件资源可以与相应的功能相关联。响应于接收到重置特定功能的复位请求，主复位单元可以向每个客户端接口提供对应于重置请求的请求信号，以及标识特定功能的信号。具有与特定功能的关联的每个客户端接口可以启动相关联的硬件资源的复位操作，并且响应于硬件资源的复位操作的完成，向主复位单元提供用于特定功能的客户端重置完成信号。主复位单元为主机接口提供特定功能的复位完成信号。

16. 发明申请

US20120004044A1 CONSTANT VELOCITY JOINT WITH QUICK CONNECTOR AND METHOD 有权
标题翻译：具有快速连接器和方法的恒定速度接头
公开(公告)号：US20120004044A1
公开(公告)日：2012-01-05
申请号：US13170547
申请日：2011-06-28
申请人： Jonathan D. Conger , Arvind Srinivasan , Richard L. Seidel
发明人： Jonathan D. Conger , Arvind Srinivasan , Richard L. Seidel
IPC分类号： F16D3/24
CPC分类号： F16D3/223 , F16D1/116 , F16D3/227 , F16D2003/22323
摘要： A shaft assembly that includes a propshaft member and a constant velocity joint. The constant velocity joint has an outer race, which is coupled for rotation with the propshaft member, an inner race, a plurality of bearing balls disposed between the outer and inner races to transmit rotary power therebetween, a shaft member coupled for rotation with the inner race, and a boot assembly that is sealingly engaged to the outer race and the shaft member. The shaft member defines a coupling portion that extends from the boot assembly. A method for coupling a shaft member to a driveline component is also provided.
摘要翻译：一种轴组件，包括一个主轴构件和一个恒速接头。等速万向节具有外座圈，该外座圈与传动轴构件，内座圈，多个轴承球联接以旋转，该轴承球设置在外座圈和内座圈之间，以在其间传递旋转动力;轴构件，其联接成与内圈座圈和密封地接合到外圈和轴构件的靴子组件。轴构件限定从靴组件延伸的联接部分。还提供了一种用于将轴构件耦合到传动系构件的方法。

17. 发明申请

US20110289242A1 MANAGING INTERRUPTS IN A VIRTUALIZED INPUT/OUTPUT DEVICE SUPPORTING MULTIPLE HOSTS AND FUNCTIONS 有权
标题翻译：在支持多个主机和功能的虚拟化输入/输出设备中管理中断
公开(公告)号：US20110289242A1
公开(公告)日：2011-11-24
申请号：US12784631
申请日：2010-05-21
申请人： Arvind Srinivasan , Marcelino M. Dignum
发明人： Arvind Srinivasan , Marcelino M. Dignum
IPC分类号： G06F13/28 , G06F13/24
CPC分类号： G06F13/102 , G06F11/0745 , G06F11/0763 , G06F13/24
摘要： Methods and apparatus are provided for managing interrupts within a virtualizable communication device. Through virtualization, one port of the device may be able to support multiple hosts (e.g., computers) and multiple functions operating on each host. Any number of interrupt resources may be allocated to the supported functions, and may include receive/transmit DMAs, receive/transmit mailboxes, errors, and so on. Resources may migrate from one function to another, such as when a function requests additional resources. Each function's set of allocated resources is isolated from other functions' resources so that their interrupts may be managed and reported in a non-blocking manner. If an interrupt cannot be immediately reported to a destination host/function, the interrupt may be delayed, retried, cancelled or otherwise handled in a way that avoids blocking interrupts to other hosts and functions.
摘要翻译：提供了用于管理可虚拟化通信设备内的中断的方法和装置。通过虚拟化，设备的一个端口可能能够支持在每个主机上操作的多个主机（例如，计算机）和多个功能。可以将任何数量的中断资源分配给所支持的功能，并且可以包括接收/发送DMA，接收/发送邮箱，错误等。资源可以从一个功能迁移到另一个功能，例如当一个函数请求额外的资源时。每个功能的分配资源集与其他功能的资源隔离，以便它们的中断可以以非阻塞的方式进行管理和报告。如果中断无法立即报告给目标主机/功能，则中断可能会以避免中断其他主机和功能的方式延迟，重试，取消或以其他方式处理。

18. 发明申请

US20110191518A1 VIRTUALIZATION OF AN INPUT/OUTPUT DEVICE FOR SUPPORTING MULTIPLE HOSTS AND FUNCTIONS 有权
标题翻译：用于支持多个主机和功能的输入/输出设备的虚拟化
公开(公告)号：US20110191518A1
公开(公告)日：2011-08-04
申请号：US12697940
申请日：2010-02-01
申请人： Arvind Srinivasan
发明人： Arvind Srinivasan
IPC分类号： G06F13/36 , G06F5/00 , G06F13/28
CPC分类号： G06F5/00 , G06F13/28 , G06F13/36
摘要： Methods and apparatus are provided for simultaneously supporting multiple hosts with a single communication port; each host may host multiple functions. The input/output device comprises multiple buffers; each buffer stores packets for one host, but can be dynamically reallocated to a different host. Multiple buffers may simultaneously support the same host and all of its functions. After a packet is received and classified, it is distributed to buffer ingress managers. Within a set of ingress managers serving one buffer, each manager corresponds to one function of the buffer's corresponding host, and is programmed with criteria for identifying packets desired by that function. One copy of the packet is stored in a buffer if at least one of the buffer's ingress managers accepts it, along with control information for processing the packet upon egress from the buffer. Egress managers for each buffer extract packets and transfer them to destination host/functions.
摘要翻译：提供了用于同时支持具有单个通信端口的多个主机的方法和装置; 每个主机可以承载多个功能。输入/输出设备包括多个缓冲器; 每个缓冲区存储一个主机的数据包，但可以动态地重新分配给不同的主机。多个缓冲器可以同时支持相同的主机及其所有功能。收到分组后，分发给缓冲区入口管理员。在一个服务于一个缓冲区的入口管理器集合中，每个管理器对应于缓冲器相应主机的一个功能，并且用标识符来标识该功能所需的包。如果缓冲器的入口管理器中的至少一个入口管理器接收到该数据包的一个副本以及用于在从缓冲器出口处理数据包的控制信息的情况下，存储该数据包的一个副本。每个缓冲区的出口管理器将提取数据包并将其传输到目标主机/函数。

19. 发明申请

US20110191506A1 VIRTUALIZATION OF AN INPUT/OUTPUT DEVICE FOR SUPPORTING MULTIPLE HOSTS AND FUNCTIONS 有权
标题翻译：用于支持多个主机和功能的输入/输出设备的虚拟化
公开(公告)号：US20110191506A1
公开(公告)日：2011-08-04
申请号：US12697953
申请日：2010-02-01
申请人： Arvind Srinivasan
发明人： Arvind Srinivasan
IPC分类号： G06F3/00 , G06F13/28
CPC分类号： G06F3/00 , G06F13/28
摘要： Methods and apparatus are provided for simultaneously supporting multiple hosts with a single communication port; each host may host multiple functions. The input/output device comprises multiple buffers; each buffer stores packets for one host, but can be dynamically reallocated to a different host. Multiple buffers may simultaneously support the same host and all of its functions. After a packet is received and classified, it is stored in at least one buffer, along with control information for processing the packet upon egress from the buffer. Egress managers for each buffer extract packets and transfer them to destination host/functions, by speculatively moving the packets forward even while DMA engines perform their processing to facilitate their transfer.
摘要翻译：提供了用于同时支持具有单个通信端口的多个主机的方法和装置; 每个主机可以承载多个功能。输入/输出设备包括多个缓冲器; 每个缓冲区存储一个主机的数据包，但可以动态地重新分配给不同的主机。多个缓冲器可以同时支持相同的主机及其所有功能。在分组被接收和分类之后，它被存储在至少一个缓冲器中，以及用于在从缓冲器出口处理分组时的控制信息。每个缓冲区的出口管理器提取数据包并将其传送到目标主机/函数，即使在DMA引擎执行其处理以促进其传输时，推测性地移动数据包。

20. 发明申请

US20110134915A1 APPARATUS AND METHOD FOR MANAGING PACKET CLASSIFICATION TABLES 有权
标题翻译：用于管理分组分类表的装置和方法
公开(公告)号：US20110134915A1
公开(公告)日：2011-06-09
申请号：US12633926
申请日：2009-12-09
申请人： Arvind Srinivasan
发明人： Arvind Srinivasan
IPC分类号： H04L12/56
CPC分类号： G06F13/28 , H04L69/22
摘要： Methods and apparatus are provided for managing classification of packets within a multi-function input/output device, and for allowing the device's classification tables to be cleared in a non-blocking manner. The input/output device conveys multiple communication connections corresponding to multiple physical and/or virtual PCIe (Peripheral Component Interconnect Express) functions bound to software images executing on hosts. The device comprises gate logic configured to indicate statuses of the functions or the DMA engines bound to the functions. When the gate logic indicates a particular destination function is valid, the packet is transferred normally after being classified. A portion of the logic corresponding to a given function is reprogrammed to indicate the function is invalid when that function is reinitialized (e.g., FLR or Function Level Reset). The function's entries in packet classification tables are cleared afterward. When the logic indicates a function is invalid, packets destined for that function are dropped.
摘要翻译：提供了用于管理多功能输入/输出设备内的分组分类的方法和装置，并且允许以非阻塞的方式清除设备的分类表。输入/输出设备传送对应于绑定到在主机上执行的软件映像的多个物理和/或虚拟PCIe（外围组件互连Express）功能的多个通信连接。该设备包括门逻辑，其被配置为指示功能的状态或绑定到功能的DMA引擎。当门逻辑指示特定目的地功能有效时，分组被正常传送。对应于给定功能的逻辑的一部分被重新编程，以指示当该功能被重新初始化（例如，FLR或功能电平复位）时该功能无效。分组表中的功能条目将被清除。当逻辑指示功能无效时，发往该功能的数据包将被丢弃。

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