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    • 11. 发明授权
    • Bus architecture for digital communications
    • 数字通信总线结构
    • US4955020A
    • 1990-09-04
    • US374086
    • 1989-06-29
    • William H. StoneWilliam E. Boyer
    • William H. StoneWilliam E. Boyer
    • H04J3/06H04L7/08H04L12/40
    • H04L7/08H04J3/0688H04L12/40H04J3/0697
    • In a digital communications system comprising a plurality of modules plugged into slots, the backplane provides a private five-conductor data bus for each module slot so that data from the modules are transmitted over separate busses. Each of the data busses is split into separately driven branches extending to the right and to the left of its corresponding module, so that the drivers are located at the ends of the branches rather than connected to an intermediate point on a bus. Pairs of slots are connected through the backplane so that, instead of having one module in each slot driving a five conductor data bus, the system can alternatively have a double-bandwidth module in every other slot driving a ten-conductor data bus made up of two five-conductor busses. Clock and synchronization signals provided by control modules are conducted to device modules over separate conductors on the backplane. The synchronization signals are encoded to represent the time within each message frame, thereby permitting synchronization within a time as short as twenty microseconds in a two millisecond frame. Reset signals for the individual modules are appended to the synchronization signals. Coordinated switch-over between two redundant control modules is effected by three voting lines controlled respectively by each control module and by all of the device modules ORed together.
    • 在包括插入到插槽中的多个模块的数字通信系统中,背板为每个模块插槽提供专用的五导体数据总线,以便来自模块的数据在单独的总线上传输。 每个数据总线被分割成分别驱动的分支,其延伸到其对应模块的右侧和左侧,使得驱动器位于分支的端部,而不是连接到总线上的中间点。 成对的插槽通过背板连接,这样,代替在每个插槽中有一个模块驱动五导体数据总线,系统可以替代地在每隔一个时隙中具有双带宽模块,驱动由10个数据总线组成的十芯数据总线 两根五导体总线。 由控制模块提供的时钟和同步信号通过背板上的不同导体传送到设备模块。 编码同步信号以表示每个消息帧内的时间,从而允许在两毫秒帧内短达二十微秒的时间内进行同步。 将各个模块的复位信号附加到同步信号。 两个冗余控制模块之间的协调切换由分别由每个控制模块和所有设备模块控制在一起的三个投票线实现。