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    • 12. 发明申请
    • ENCODING METHOD, DECODING METHOD, ENCODER, DECODER, PROGRAM, AND RECORDING MEDIUM
    • 编码方法,解码方法,编码器,解码器,程序和记录介质
    • US20130317814A1
    • 2013-11-28
    • US13984773
    • 2012-02-08
    • Takehiro MoriyaNoboru HaradaYutaka KamamotoYusuke HiwasakiMasahiro Fukui
    • Takehiro MoriyaNoboru HaradaYutaka KamamotoYusuke HiwasakiMasahiro Fukui
    • G10L19/12
    • G10L19/12G10L19/18H03M5/06
    • In encoding, the number of bits to be assigned to codes corresponding to noise or a pulse sequence obtained according to prediction analysis applied to time series signals included in a predetermined time interval is switched according to whether an index that indicates a level of periodicity and/or stationarity of input time series signals satisfies a condition that indicates high periodicity and/or high stationarity or a condition that indicates low periodicity and/or low stationarity, to acquire the codes corresponding to the noise and the pulse sequence. In decoding, a decoding mode for codes corresponding to noise or a pulse sequence included in codes corresponding to a predetermined time interval is switched according to the same criterion as that described above to decode the codes corresponding to the noise or the pulse sequence to acquire noise or a pulse sequence corresponding to the predetermined time interval.
    • 在编码中,根据应用于预定时间间隔中包含的时间序列信号的根据预测分析而获得的分配给噪声的代码的位数或按照预测分析获得的脉冲序列,根据指示周期性和/ 或者输入时间序列信号的平稳性满足指示高周期性和/或高平稳性的条件或表示低周期性和/或低平稳性的条件,以获取与噪声和脉冲序列相对应的代码。 在解码中,根据与上述相同的标准来切换对应于噪声的代码的解码模式或包括在与预定时间间隔相对应的代码中的脉冲序列,以对与噪声或脉冲序列相对应的代码进行解码以获取噪声 或对应于预定时间间隔的脉冲序列。
    • 14. 发明申请
    • ENCODING METHOD, DECODING METHOD, ENCODER, DECODER, PROGRAM, AND RECORDING MEDIUM
    • 编码方法,解码方法,编码器,解码器,程序和记录介质
    • US20140019145A1
    • 2014-01-16
    • US14007844
    • 2012-03-26
    • Takehiro MoriyaNoboru HaradaYutaka KamamotoYusuke HiwasakiMasahiro Fukui
    • Takehiro MoriyaNoboru HaradaYutaka KamamotoYusuke HiwasakiMasahiro Fukui
    • G10L19/005
    • In encoding, a frequency-domain sample sequence derived from an acoustic signal is divided by a weighted envelope and is then divided by a gain, the result obtained is quantized, and each sample is variable-length encoded. The error between the sample before quantization and the sample after quantization is quantized with information saved in this variable-length encoding. This quantization is performed under a rule that specifies, according to the number of saved bits, samples whose errors are to be quantized. In decoding, variable-length codes in an input sequence of codes are decoded to obtain a frequency-domain sample sequence; an error signal is further decoded under a rule that depends on the number of bits of the variable-length codes; and from the obtained sample sequence, the original sample sequence is obtained according to supplementary information.
    • 在编码中,将从声信号导出的频域采样序列除以加权包络,然后将其除以增益,对所获得的结果进行量化,并且对每个采样进行可变长度编码。 在量化之前的样本与量化后的样本之间的误差用保存在该可变长度编码中的信息进行量化。 该量化是根据规定的,根据保存的比特数来指定其量化的错误的样本。 在解码中,对输入的代码序列中的可变长度代码进行解码以获得频域样本序列; 在取决于可变长度代码的位数的规则下进一步解码错误信号; 从获得的样本序列中,根据补充信息获得原始样本序列。
    • 17. 发明授权
    • Apparatus and method for synthesizing module
    • 用于合成模块的装置和方法
    • US06209119B1
    • 2001-03-27
    • US09057477
    • 1998-04-09
    • Masahiro Fukui
    • Masahiro Fukui
    • G06F1750
    • G06F17/5045G06F17/5068
    • A functional-level processing unit converts a data path diagram into logic circuit data. A logic-level processing unit specifies cells in a data path circuit based on the logic circuit data. A synthesis processing unit uses geometrical functions of the cells which have been parameterized by delays thereof, thereby synthesizing a layout module for the data path circuit based on the logic circuit data used to specify the cells and on a floorplan for the module. The synthesis processing unit also obtains a geometrical function parameterized by delay for the layout module. By synthesizing a layout module using the geometrical functions of the cells, which have been parameterized by the delays thereof, the geometry of the layout module can be optimized with high accuracy. In addition, by generating a geometrical function for the layout module, it becomes easier to establish a linkage to the upper process of design.
    • 功能级处理单元将数据路径图转换为逻辑电路数据。 逻辑电平处理单元基于逻辑电路数据指定数据路径电路中的单元。 合成处理单元使用已经被其延迟参数化的单元的几何函数,从而基于用于指定单元的逻辑电路数据和模块的平面布局图合成用于数据路径电路的布局模块。 合成处理单元还获得布局模块的延迟参数化的几何函数。 通过使用由其延迟参数化的单元的几何功能来合成布局模块,可以高精度地优化布局模块的几何形状。 另外,通过为布局模块生成几何函数,建立与上层设计过程的链接变得更加容易。