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11. 发明授权

US07368763B2 Semiconductor device and manufacturing method thereof 失效
标题翻译：半导体装置及其制造方法
公开(公告)号：US07368763B2
公开(公告)日：2008-05-06
申请号：US11072279
申请日：2005-03-07
申请人： Makoto Miura , Katsuya Oda , Katsuyoshi Washio
发明人： Makoto Miura , Katsuya Oda , Katsuyoshi Washio
IPC分类号： H01L31/00 , H01L29/788
CPC分类号： H01L21/0262 , H01L21/02381 , H01L21/0243 , H01L21/02433 , H01L21/02447 , H01L21/0245 , H01L21/02502 , H01L21/02505 , H01L21/02529 , H01L33/12
摘要： A high quality silicon carbide (SiC) layer being substantially lower in threading dislocation density than a prior layer is formed on silicon (Si) substrate. A semiconductor device is fabricated in such a way that a semiconductor buffer layer containing Si in part and being higher in defect density than a Si substrate is formed on the Si substrate on the upper portion of which are formed a plurality of pairs of facets being mirror-symmetrical to the surface orientation of a semiconductor substrate, further on the top of the layer a SiC layer is sequentially formed.
摘要翻译：在硅（Si）衬底上形成了高于先有层的穿透位错密度较低的高质量碳化硅（SiC）层。以这样的方式制造半导体器件，即在Si衬底上形成有部分地Si密度高于Si衬底的半导体缓冲层，其半导体缓冲层的缺陷密度高于Si衬底，其上部形成有成对的多对面与半导体衬底的表面取向对称，此外在层的顶部依次形成SiC层。

12. 发明授权

US07095043B2 Semiconductor device, semiconductor circuit module and manufacturing method of the same 失效
标题翻译：半导体器件，半导体电路模块及其制造方法
公开(公告)号：US07095043B2
公开(公告)日：2006-08-22
申请号：US10790190
申请日：2004-03-02
申请人： Katsuya Oda , Nobuyuki Sugii , Makoto Miura , Isao Suzumura , Katsuyoshi Washio
发明人： Katsuya Oda , Nobuyuki Sugii , Makoto Miura , Isao Suzumura , Katsuyoshi Washio
IPC分类号： H01L29/06 , H01L31/0328
CPC分类号： H01L29/66068 , H01L21/823807 , H01L27/0922 , H01L29/1054 , H01L29/1608
摘要： An (SiGe)C layer having a stoichiometric ratio of about 1:1 is locally formed on an Si layer, a large forbidden band width semiconductor device is prepared inside the layered structure thereof and an Si semiconductor integrated circuit is formed in the regions not formed with the layered structure, whereby high frequency high power operation of the device is enabled by the large forbidden band width semiconductor device and high performance is attained by hybridization of the Si integrated circuit.
摘要翻译：在Si层上局部地形成化学计量比为约1:1的An（SiGe）C层，在其层叠结构内制备大的禁带宽半导体器件，并且在未形成的区域中形成Si半导体集成电路具有分层结构，由此通过大的禁带宽半导体器件能够实现器件的高频高功率操作，并且通过Si集成电路的杂交获得高性能。

13. 发明授权

US06995054B2 Method of manufacturing a semiconductor device 失效
标题翻译：制造半导体器件的方法
公开(公告)号：US06995054B2
公开(公告)日：2006-02-07
申请号：US10738544
申请日：2003-12-18
申请人： Katsuya Oda , Katsuyoshi Washio
发明人： Katsuya Oda , Katsuyoshi Washio
IPC分类号： H01L21/336
CPC分类号： B82Y10/00 , H01L21/823807 , H01L21/8249 , H01L27/0623 , H01L27/0922 , H01L29/66439 , H01L29/7378 , H01L29/7782
摘要： A semiconductor device having an MODFET and at least one other device formed on one identical semiconductor substrate, in which an intrinsic region for the MODFET is formed by selective growth in a groove formed on a semiconductor substrate having an insulation film on the side wall of the groove, and single-crystal silicon at the bottom of the groove, is disclosed. The step between the MODFET and the at least one other device mounted together on one identical substrate can be thereby decreased, and each of the devices can be reduced in the size and integrated to a high degree, and the interconnection length can be shortened to reduce power consumption.
摘要翻译：一种具有MODFET和至少一个其它器件的半导体器件，其形成在一个相同的半导体衬底上，其中用于MODFET的本征区域通过在形成于半导体衬底上的沟槽中的选择性生长形成，该半导体衬底上具有绝缘膜凹槽和沟槽底部的单晶硅。因此，可以减少在一个相同的基板上安装在一起的MODFET与至少一个其他装置之间的台阶，并且可以将各个装置的尺寸减小到高度集成，并且可以缩短互连长度以减少能量消耗。

14. 发明授权

US06724019B2 Multi-layered, single crystal field effect transistor 有权
标题翻译：多层单晶场效应晶体管
公开(公告)号：US06724019B2
公开(公告)日：2004-04-20
申请号：US09824225
申请日：2001-04-03
申请人： Katsuya Oda , Katsuyoshi Washio
发明人： Katsuya Oda , Katsuyoshi Washio
IPC分类号： H01L310328
CPC分类号： B82Y10/00 , H01L21/823807 , H01L21/8249 , H01L27/0623 , H01L27/0922 , H01L29/66439 , H01L29/7378 , H01L29/7782
摘要： A semiconductor device having an MODFET and at least one other device formed on one identical semiconductor substrate, in which an intrinsic region for the MODFET is formed by selective growth in a groove formed on a semiconductor substrate having an insulation film on the side wall of the groove, and single-crystal silicon at the bottom of the groove, is disclosed. The step between the MODFET and the at least one other device mounted together on one identical substrate can be thereby decreased, and each of the devices can be reduced in the size and integrated to a high degree, and the interconnection length can be shortened to reduce power consumption.
摘要翻译：一种具有MODFET和至少一个其它器件的半导体器件，其形成在一个相同的半导体衬底上，其中用于MODFET的本征区域通过在形成于半导体衬底上的沟槽中的选择性生长来形成，该半导体衬底在其侧壁上具有绝缘膜凹槽和沟槽底部的单晶硅。因此，可以减少在一个相同的基板上安装在一起的MODFET与至少一个其他装置之间的台阶，并且可以将各个装置的尺寸减小到高度集成，并且可以缩短互连长度以减少能量消耗。

15. 发明授权

US06667489B2 Heterojunction bipolar transistor and method for production thereof 有权
标题翻译：异质结双极晶体管及其制造方法
公开(公告)号：US06667489B2
公开(公告)日：2003-12-23
申请号：US10299837
申请日：2002-11-20
申请人： Isao Suzumura , Katsuya Oda , Katsuyoshi Washio
发明人： Isao Suzumura , Katsuya Oda , Katsuyoshi Washio
IPC分类号： H01L2906
CPC分类号： H01L29/66242 , H01L29/7378
摘要： A high-speed heterojunction bipolar transistor in a large injection of electrons from the emitter and a method for production thereof. In a typical example of the SiGeC heterojunction bipolar transistor, the collector has a layer of n-type single-crystal Si and a layer of n-type single-crystal SiGe, the base is a layer of heavily doped p-type single-crystal SiGeC, and the emitter is a layer of n-type single-crystal Si. At the heterointerface between the layer of n-type single-crystal SiGe and the layer of p-type single-crystal SiGeC, the bandgap of the p-type single-crystal SiGeC is larger than that of the layer of n-type single-crystal SiGe. Even though the effective neutral base expands due to an increase in electrons injected from the emitter, no energy barrier occurs in the conduction band at the heterointerface between the layer of n-type single-crystal SiGe and the layer of p-type single-crystal SiGeC. Thus, the diffusion of electrons is not inhibited and it is possible to realize high-speed heterojunction bipolar transistors even in the high injection state.
摘要翻译：从发射极大量注入电子的高速异质结双极晶体管及其制造方法。在SiGeC异质结双极晶体管的典型实例中，集电体具有n型单晶Si层和n型单晶SiGe层，基极是重掺杂p型单晶层 SiGeC，发射极是n型单晶Si层。在n型单晶SiGe层和p型单晶SiGeC层之间的异质界面处，p型单晶SiGeC的带隙大于n型单晶SiGeC层的带隙，水晶SiGe。即使有效的中性碱基由于从发射体注入的电子的增加而扩大，在n型单晶SiGe层与p型单晶层之间的异质界面的导带中也不发生能量势垒 SiGeC。因此，电子的扩散不被抑制，即使在高注入状态下也可以实现高速异质结双极晶体管。

16. 发明授权

US5962880A Heterojunction bipolar transistor 失效
标题翻译：异质结双极晶体管
公开(公告)号：US5962880A
公开(公告)日：1999-10-05
申请号：US892673
申请日：1997-07-14
申请人： Katsuya Oda , Eiji Ohue , Takahiro Onai , Katsuyoshi Washio
发明人： Katsuya Oda , Eiji Ohue , Takahiro Onai , Katsuyoshi Washio
IPC分类号： H01L21/331 , H01L29/10 , H01L29/737
CPC分类号： H01L29/66242 , H01L29/1004 , H01L29/7378
摘要： A self-aligned bipolar transistor which has a small base resistance and small emitter-base and collector-base capacitances and is operable at high speed is disclosed. This bipolar transistor is characterized in that a low concentration collector region made of single crystal Si--Ge is self-alignedly formed between an intrinsic base of single crystal Si--Ge and an intrinsic base, and that an extrinsic base electrode and an intrinsic base are connected only through a doped external base. With this arrangement, an energy barrier is not established at the collector base interface owing to the formation of the low concentration region of single crystal Si--Ge, so that the transit time of the carriers charged from the emitter is shortened. The connection between the intrinsic base and the extrinsic base electrode via the doped external base results in the reduction of the base resistance. In addition, the self-aligned formation of the emitter-base-collector leads to the reduction in capacitance between the emitter and the base and also between the collector and the base. Accordingly, a high-speed bipolar transistor can be realized and thus, circuits using the transistor are operable at high speed.
摘要翻译：公开了具有小的基极电阻和小的发射极基极和集电极基极电容并且可高速操作的自对准双极晶体管。该双极型晶体管的特征在于，由单晶Si-Ge构成的低浓度集电极区域在单晶Si-Ge的本征基极和本征基极之间自对准地形成，而外部基极电极和固有基极为仅通过掺杂的外部基极连接。通过这种布置，由于形成单晶Si-Ge的低浓度区域，在集电极基极界面处没有形成能量势垒，从而缩短了从发射极充电的载流子的渡越时间。通过掺杂的外部基极的本征基极和外部基极之间的连接导致基极电阻的降低。此外，发射极 - 基极集电体的自对准形成导致发射极和基极之间以及集电极和基极之间的电容减小。因此，可以实现高速双极晶体管，因此，使用晶体管的电路可以高速工作。

17. 发明授权

US09041080B2 Semiconductor optical element 有权
标题翻译：半导体光学元件
公开(公告)号：US09041080B2
公开(公告)日：2015-05-26
申请号：US14376662
申请日：2012-08-02
申请人： Kazuki Tani , Shinichi Saito , Katsuya Oda
发明人： Kazuki Tani , Shinichi Saito , Katsuya Oda
IPC分类号： H01L29/00 , H01S5/32
CPC分类号： H01S5/3223 , H01L33/34 , H01L33/38 , H01S5/0206 , H01S5/021 , H01S5/0424 , H01S5/1228 , H01S5/125 , H01S5/2272
摘要： To provide a light-emitting element where electrons are efficiently injected into a Ge light emission layer and light can be efficiently emitted, the light-emitting element has a barrier layer 3 which is formed on an insulating film 2, worked in a size in which quantum confinement effect manifests and made of monocrystalline Si, a p-type diffused layer electrode 5 and an n-type diffused layer electrode 6 respectively provided at both ends of the barrier layer 3, and a monocrystalline Ge light emission part 13 provided on the barrier layer 3 between the electrodes 5, 6. At least a part of current that flows between the electrodes 5, 6 flows in the barrier layer 3 in a horizontal direction with respect to a substrate 1.
摘要翻译：为了提供一种发光元件，其中电子被有效地注入到Ge发光层中并且可以有效地发射光，发光元件具有形成在绝缘膜2上的阻挡层3，该阻挡层3以量子限制效应表现为单晶Si，分别设置在阻挡层3的两端的p型扩散层电极5和n型扩散层电极6以及设置在势垒层3上的单晶Ge发光部13 在电极5,6之间流动的电流的至少一部分在阻挡层3中相对于基板1在水平方向上流动。

18. 发明申请

US20140355636A1 SEMICONDUCTOR OPTICAL ELEMENT 有权
标题翻译：半导体光学元件
公开(公告)号：US20140355636A1
公开(公告)日：2014-12-04
申请号：US14364074
申请日：2011-12-12
申请人： Tadashi Okumura , Shinichi Saito , Kazuki Tani , Etsuko Nomoto , Katsuya Oda
发明人： Tadashi Okumura , Shinichi Saito , Kazuki Tani , Etsuko Nomoto , Katsuya Oda
IPC分类号： H01S5/32 , H01L31/0352 , H01L31/028
CPC分类号： H01L33/34 , H01L31/035272 , H01L31/103 , H01L33/44 , H01S5/021 , H01S5/2214 , H01S5/3211 , H01S5/3219 , H01S5/3223 , H01L2924/01032 , H01L2924/10252
摘要： In order to provide a highly reliable silicon-germanium semiconductor optical element of high luminous efficiency or of low power consumption that can reduce or prevent the occurrence of dislocations or crystal defects on the interface between a light emitting layer or a light absorption layer and a cladding layer, in a silicon-germanium semiconductor optical element, a germanium protective layer 11 of non-light emission is disposed between a germanium light emitting layer or the light absorption layer 10 and a cladding layer 12 disposed above a substrate. The germanium protective layer 11 has the electrical conductivity different from electrical conductivity of the germanium light emitting layer or the light absorption layer 10.
摘要翻译：为了提供高发光效率或低功耗的高可靠性硅锗半导体光学元件，可以减少或防止在发光层或光吸收层与包层之间的界面上发生位错或晶体缺陷在硅锗半导体光学元件中，在锗发光层或光吸收层10和设置在基板上方的包覆层12之间设置非发光锗保护层11。锗保护层11具有与锗发光层或光吸收层10的电导率不同的导电性。

19. 发明授权

US08294213B2 Semiconductor photodiode device and manufacturing method thereof 有权
标题翻译：半导体光电二极管装置及其制造方法
公开(公告)号：US08294213B2
公开(公告)日：2012-10-23
申请号：US12838445
申请日：2010-07-17
申请人： Makoto Miura , Shinichi Saito , Youngkun Lee , Katsuya Oda
发明人： Makoto Miura , Shinichi Saito , Youngkun Lee , Katsuya Oda
IPC分类号： H01L21/00 , H01L21/331 , H01L27/12
CPC分类号： H01L31/03921 , H01L21/02381 , H01L21/0245 , H01L21/02505 , H01L21/02532 , H01L21/02576 , H01L21/0262 , H01L21/02639 , H01L21/02647 , H01L31/028 , H01L31/103 , H01L31/1808 , Y02E10/547
摘要： A semiconductor photodiode device includes a semiconductor substrate, a first buffer layer containing a material different from that of the semiconductor substrate in a portion thereof, a first semiconductor layer formed above the buffer layer and having a lattice constant different from that of the semiconductor substrate, a second buffer layer formed above the first semiconductor layer and containing an element identical with that of the first semiconductor layer in a portion thereof, and a second semiconductor layer formed above the buffer layer in which a portion of the first semiconductor layer is formed of a plurality of island shape portions each surrounded with an insulating film, and the second buffer layer allows adjacent islands of the first semiconductor layer to coalesce with each other and is in contact with the insulating film.
摘要翻译：半导体光电二极管装置包括半导体衬底，第一缓冲层，其部分含有不同于半导体衬底的材料;第一半导体层，形成在缓冲层上方，具有不同于半导体衬底的晶格常数; 第二缓冲层，形成在第一半导体层的上方，并且在其一部分中含有与第一半导体层相同的元件;以及第二半导体层，形成在缓冲层的上方，第一半导体层的一部分由多个岛状部分，各自被绝缘膜包围，第二缓冲层允许第一半导体层的相邻岛状物彼此聚结并与绝缘膜接触。

20. 发明申请

US20080095540A1 Optical transmission device and optical transmission system 审中-公开
标题翻译：光传输装置及光传输系统
公开(公告)号：US20080095540A1
公开(公告)日：2008-04-24
申请号：US10598503
申请日：2005-06-02
申请人： Katsuya Oda , Hitomaro Tohgoh , Yoshiyasu Sato , Hiroaki Asano
发明人： Katsuya Oda , Hitomaro Tohgoh , Yoshiyasu Sato , Hiroaki Asano
IPC分类号： H04B10/04 , H04B10/00
CPC分类号： H04B10/2575
摘要： An object of the invention is to clear up factors in deterioration due to optical reflection and to provide an optical transmission apparatus and an optical transmission system in which a superior optical transmission characteristic can be obtained for analog signals even if a reflection phenomenon occurs in an optical transmission line. There are provided a frequency converter (3) for converting the frequency band of a to-be-transmitted electric signal into a predetermined frequency band higher that this frequency band, and a semiconductor laser (4) serving as an electro-optic converter for performing electro-optic conversion upon the frequency-converted electric signal.
摘要翻译：本发明的目的是清除由于光反射引起的劣化的因素，并且提供一种光传输装置和光传输系统，其中即使在光学器件中发生反射现象也可以获得模拟信号的优异的光传输特性传输线。提供了一种变频器（3），用于将待发射电信号的频带转换成该频带高的预定频带，以及用作电光转换器的半导体激光器（4），用于执行经变频电信号的电光转换。

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