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    • 19. 发明授权
    • Designing and fabrication of a semiconductor device
    • 设计和制造半导体器件
    • US07424688B2
    • 2008-09-09
    • US11333212
    • 2006-01-18
    • Naoki IdaniToshiyuki KarasawaRyota Nanjo
    • Naoki IdaniToshiyuki KarasawaRyota Nanjo
    • G06F17/50
    • G06F17/5068H01L21/31053
    • Designing method of an electronic device subjected to a chemical mechanical polishing process in a fabrication process thereof is conducted according to the steps of: dividing a substrate surface into first sub-regions; optimizing a coverage ratio of hard-to-polish regions in the first sub-regions to fall in a first predetermined range corresponding to the first sub-regions; dividing the substrate surface into second sub-regions different from the first sub-regions; and optimizing a coverage ratio of the hard-to-polish regions in the second sub-regions to fall in a second predetermined range corresponding to the second sub-regions, wherein patterns having a shorter edge of 5 μm or less are excluded from the optimization.
    • 根据以下步骤进行在其制造工艺中进行化学机械抛光工艺的电子器件的设计方法:将衬底表面分成第一子区; 优化所述第一子区域中的硬抛光区域的覆盖率落在对应于所述第一子区域的第一预定范围内; 将基板表面分成与第一子区域不同的第二子区域; 并且优化所述第二子区域中的所述硬抛光区域的覆盖率落入对应于所述第二子区域的第二预定范围中,其中具有5μm或更小边缘的边缘的图案被从所述优化中排除 。