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    • 17. 发明申请
    • Thin film transistor array panel and liquid crystal display
    • 薄膜晶体管阵列面板和液晶显示器
    • US20070171184A1
    • 2007-07-26
    • US11657421
    • 2007-01-23
    • Eun-Hee HanHee-Seop KimJun-Young LeeJun-Woo LeeSung-Wook Kang
    • Eun-Hee HanHee-Seop KimJun-Young LeeJun-Woo LeeSung-Wook Kang
    • G09G3/36
    • G09G3/3648G09G2320/02
    • A thin film transistor array panel is disclosed. The thin film transistor array panel includes a gate line formed on a substrate, a gate insulating layer formed on the gate line, a semiconductor layer formed on the gate insulating layer, a data line and a drain electrode formed on the semiconductor layer, a passivation layer formed on the data line and the drain electrode and including a contact hole, and a pixel electrode formed on the passivation layer and connected to the drain electrode through the contact hole. The data line intersects the pixel electrode, and the pixel electrode includes an opening corresponding to a portion of the data line. The opening has a horizontal width that is wider or narrower than the horizontal width of the data line. Thereby, parasitic capacitance that occurs between the data line and the pixel electrode is reduced to improve image quality.
    • 公开了薄膜晶体管阵列面板。 薄膜晶体管阵列面板包括形成在基板上的栅极线,形成在栅极线上的栅极绝缘层,形成在栅极绝缘层上的半导体层,形成在半导体层上的数据线和漏电极,钝化层 形成在数据线和漏电极上并且包括接触孔的像素电极以及形成在钝化层上并通过接触孔连接到漏电极的像素电极。 数据线与像素电极相交,像素电极包括对应于数据线的一部分的开口。 开口具有比数据线的水平宽度更宽或更窄的水平宽度。 从而,减少了在数据线和像素电极之间发生的寄生电容,以提高图像质量。