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11. 发明授权

US06518674B2 Temporary attach article and method for temporary attach of devices to a substrate 失效
标题翻译：将设备临时附接到基板的临时附着物品和方法
公开(公告)号：US06518674B2
公开(公告)日：2003-02-11
申请号：US09805596
申请日：2001-03-13
申请人： Mario J. Interrante , Thomas E. Lombardi , Frank L. Pompeo , William E. Sablinski
发明人： Mario J. Interrante , Thomas E. Lombardi , Frank L. Pompeo , William E. Sablinski
IPC分类号： H01L2348
CPC分类号： H01L24/81 , H01L24/11 , H01L2224/13099 , H01L2224/13111 , H01L2224/16 , H01L2224/16235 , H01L2224/81193 , H01L2224/81801 , H01L2924/01006 , H01L2924/01013 , H01L2924/01029 , H01L2924/01033 , H01L2924/01042 , H01L2924/01049 , H01L2924/0105 , H01L2924/01079 , H01L2924/01082 , H01L2924/01322 , H01L2924/014 , H01L2924/09701 , H01L2924/14 , H01L2924/15787 , H01L2924/19041 , H05K1/113 , H05K3/3436 , H05K3/3463 , H05K2201/10992 , H05K2203/162 , H05K2203/176 , Y02P70/613 , H01L2924/00
摘要： A temporary attach article of a first component to a second component which includes a first component having a first volume of a fusible material; a second component having a second volume of fusible material; and the first and second components being joined together through the first and second volumes of fusible material, wherein the first volume of fusible material has a melting point higher than a melting point of the second volume of fusible material so that the first and second components may be joined together without melting of the first volume of fusible material and wherein the second volume of fusible material is 5 to 20% of the first volume of fusible material. Also disclosed is a method for temporary attach of devices to an electronic substrate.
摘要翻译：将第一部件临时附接到第二部件，其包括具有第一容积的可熔材料的第一部件; 具有第二容积的可熔材料的第二部件; 并且所述第一和第二部件通过所述第一和第二体积的可熔材料连接在一起，其中所述第一容积的可熔材料的熔点高于所述第二容积的可熔材料的熔点，使得所述第一和第二部件可以在不熔化第一体积的可熔材料的情况下连接在一起，并且其中第二体积的可熔材料是第一体积的可熔材料的5至20％。还公开了一种用于将设备临时附接到电子基板的方法。

12. 发明授权

US06376054B1 Surface metallization structure for multiple chip test and burn-in 失效
标题翻译：表面金属化结构，用于多芯片测试和老化
公开(公告)号：US06376054B1
公开(公告)日：2002-04-23
申请号：US09249985
申请日：1999-02-10
申请人： Scott I. Langenthal , Thomas E. Lombardi , Richard Francis Indyk , John Ulrich Knickerbocker , Srinivasa S. N. Reddy , Richard A. Shelleman , Rao V. Vallabhaneni , Donald Rene Wall
发明人： Scott I. Langenthal , Thomas E. Lombardi , Richard Francis Indyk , John Ulrich Knickerbocker , Srinivasa S. N. Reddy , Richard A. Shelleman , Rao V. Vallabhaneni , Donald Rene Wall
IPC分类号： B32B300
CPC分类号： G01R1/0466 , G01R1/0408 , Y10T428/24917 , Y10T428/24926
摘要： A cost-effective surface metallization structure of a TCA carrier is produced by using a high-grit conducting paste to fill TSM vias in the TSM of the TCA carrier. This concept can be applied to alumina substrates with refractory metal conductors or to LCGC substrates with more noble metal conductors.
摘要翻译：通过使用高粒度导电膏来填充TCA载体的TSM中的TSM通孔，制造了TCA载体的经济有效的表面金属化结构。该概念可以应用于具有难熔金属导体的氧化铝衬底或具有更贵贵金属导体的LCGC衬底。

13. 发明授权

US5643818A Removal of residues from metallic insert used in manufacture of multi-layer ceramic substrate with cavity for microelectronic chip 失效
标题翻译：从用于微电子芯片空腔的多层陶瓷基板制造中使用的金属插件中除去残留物
公开(公告)号：US5643818A
公开(公告)日：1997-07-01
申请号：US642238
申请日：1996-05-02
申请人： Krishna G. Sachdev , Thomas E. Lombardi , Vincent P. Peterson
发明人： Krishna G. Sachdev , Thomas E. Lombardi , Vincent P. Peterson
IPC分类号： H01L21/48 , H01L21/70
CPC分类号： H01L21/4857 , H01L21/4864 , H01L2924/15153 , H01L2924/1517
摘要： After a metallic insert has been used precisely to define a cavity for a microelectronic chip in a laminated, multi-sheet, predominantly ceramic substrate having metallic features, any green sheet and metal-polymer composite paste residues are removed from the metallic insert by immersing the metallic insert in an ultrasonically agitated bath containing a first solvent having a relatively high boiling point for about five to fifteen minutes, replacing the first solvent with a second solvent having a relatively low boiling point, and drying the metallic insert in hot air or hot nitrogen to remove the second solvent. Preferably, the first solvent is an alkoxy alcohol, such as 1-methoxy-2-propanol or 3-methoxy-1-butanol, or a hydroxy ester, such as ethyl lactate, and the second solvent is a lower alkyl alcohol, such as isopropanol. Alternatively, the first solvent may be a ketone or an alkyl ester. The metallic insert is rinsed in the second solvent, preferably in an ultrasonically agitated bath, to replace the first solvent with the second solvent before the metallic insert is dried to remove the first solvent.
摘要翻译：在金属插入件被精确地用于在具有金属特征的层压，多片，主要为陶瓷的基底中限定用于微电子芯片的空腔的情况下，通过将任何生片和金属 - 聚合物复合糊料残留物从金属插入物中浸渍金属插入物在包含具有较高沸点的第一溶剂的超声波搅拌浴中约5至15分钟，用具有相对低沸点的第二溶剂代替第一溶剂，并在热空气或热氮中干燥金属插入物以除去第二溶剂。优选地，第一溶剂是烷氧基醇，例如1-甲氧基-2-丙醇或3-甲氧基-1-丁醇，或羟基酯如乳酸乙酯，第二溶剂是低级烷基醇，例如异丙醇或者，第一溶剂可以是酮或烷基酯。金属插入物在第二溶剂中，优选在超声波搅拌浴中漂洗，以在将金属插入物干燥以除去第一溶剂之前用第二溶剂替换第一溶剂。

14. 发明授权

US09059240B2 Fixture for shaping a laminate substrate 有权
标题翻译：用于成型层压基板的夹具
公开(公告)号：US09059240B2
公开(公告)日：2015-06-16
申请号：US13488693
申请日：2012-06-05
申请人： Edmund D. Blackshear , Thomas E. Lombardi , Donald A. Merte , Steven P. Ostrander , Thomas Weiss , Jiantao Zheng
发明人： Edmund D. Blackshear , Thomas E. Lombardi , Donald A. Merte , Steven P. Ostrander , Thomas Weiss , Jiantao Zheng
IPC分类号： B29C53/18 , H01L23/00
CPC分类号： H01L24/75 , H01L23/562 , H01L24/81 , H01L2224/16 , H01L2224/75983 , H01L2224/75987 , H01L2224/81024 , H01L2224/81075 , H01L2224/81191 , H01L2224/81192 , H01L2224/8121 , H01L2224/81815 , H01L2224/81912 , H01L2224/83192 , H01L2924/10253 , H01L2924/3511 , H01L2924/00 , H01L2924/00014
摘要： A fixture for shaping a laminate substrate includes a trap ring, a base plate and a center button. The base plate includes a recess adapted to receive the laminate substrate. The center button is disposed in an opening in the base plate. The center button may be adjusted to shape the laminate substrate.
摘要翻译：用于成型层压基板的固定装置包括捕获环，基板和中心按钮。基板包括适于接收层压基板的凹部。中心按钮设置在基板的开口中。可以调节中心按钮以使层压基板成形。

15. 发明授权

US08367543B2 Structure and method to improve current-carrying capabilities of C4 joints 有权
标题翻译：提高C4接头承载能力的结构和方法
公开(公告)号：US08367543B2
公开(公告)日：2013-02-05
申请号：US11308396
申请日：2006-03-21
申请人： Mukta Ghate Farooq , Jasvir Singh Jaspal , William Francis Landers , Thomas E. Lombardi , Hai Pham Longworth , H. Bernhard Pogge , Roger A. Quon
发明人： Mukta Ghate Farooq , Jasvir Singh Jaspal , William Francis Landers , Thomas E. Lombardi , Hai Pham Longworth , H. Bernhard Pogge , Roger A. Quon
IPC分类号： H01L21/44 , H01L23/48 , H01L23/52 , H01L29/40
CPC分类号： H01L24/05 , H01L23/291 , H01L23/293 , H01L23/3192 , H01L24/03 , H01L24/11 , H01L24/13 , H01L2224/05001 , H01L2224/05022 , H01L2224/05026 , H01L2224/05147 , H01L2224/05166 , H01L2224/05171 , H01L2224/05572 , H01L2224/05647 , H01L2224/05655 , H01L2224/13099 , H01L2224/13111 , H01L2924/0001 , H01L2924/01013 , H01L2924/01015 , H01L2924/01022 , H01L2924/01024 , H01L2924/01027 , H01L2924/01029 , H01L2924/0103 , H01L2924/01033 , H01L2924/01047 , H01L2924/01051 , H01L2924/01073 , H01L2924/01074 , H01L2924/01082 , H01L2924/014 , H01L2924/04941 , H01L2924/04953 , H01L2924/14 , H01L2924/00014
摘要： A system and method comprises depositing a dielectric layer on a substrate and depositing a metal layer on the dielectric layer. The system and method further includes depositing a high temperature diffusion barrier metal cap on the metal layer. The system and method further includes depositing a second dielectric layer on the high temperature diffusion barrier metal cap and the first dielectric layer, and etching a via into the second dielectric layer, such that the high temperature diffusion barrier metal cap is exposed. The system and method further includes depositing an under bump metallurgy in the via, and forming a C4 ball on the under bump metallurgy layer.
摘要翻译：一种系统和方法包括在基底上沉积电介质层并在介电层上沉积金属层。该系统和方法还包括在金属层上沉积高温扩散阻挡金属帽。该系统和方法还包括在高温扩散阻挡金属帽和第一电介质层上沉积第二电介质层，并将通孔蚀刻到第二电介质层中，使得暴露高温扩散阻挡金属帽。该系统和方法还包括在通孔中沉积凸块下的冶金，并在凸块下金属层上形成C4球。

16. 发明授权

US08129230B2 Underfill method and chip package 有权
标题翻译：底部填充法和芯片封装
公开(公告)号：US08129230B2
公开(公告)日：2012-03-06
申请号：US12538965
申请日：2009-08-11
申请人： Michael A. Gaynes , Rajneesh Kumar , Thomas E. Lombardi , Steve Ostrander
发明人： Michael A. Gaynes , Rajneesh Kumar , Thomas E. Lombardi , Steve Ostrander
IPC分类号： H01L21/00
CPC分类号： H01L21/563 , H01L23/562 , H01L24/32 , H01L2224/16225 , H01L2224/32225 , H01L2224/73203 , H01L2224/73204 , H01L2924/01019 , H01L2924/09701 , H01L2924/00 , H01L2924/3512
摘要： A method of fabricating a chip package is provided. The chip package includes a laminate, a chip and conductive elements interposed between the chip and the laminate by which signals are transmitted among the chip and the laminate. The method includes dispensing a first underfill in a space defined between opposing faces of the chip and the laminate and dispensing a second underfill at least at a portion of an edge of the chip, the second underfill including a high aspect ratio material.
摘要翻译：提供一种制造芯片封装的方法。芯片封装包括层叠体，芯片和介于芯片和层压体之间的导电元件，信号在芯片和层压体之间传输。该方法包括将第一底部填充物分配到在芯片的相对面和层压体之间限定的空间中，并且至少在芯片边缘的一部分处分配第二底部填充物，第二底部填充物包括高纵横比材料。

17. 发明申请

US20110037181A1 UNDERFILL METHOD AND CHIP PACKAGE 有权
标题翻译： UNDERFILL方法和芯片包
公开(公告)号：US20110037181A1
公开(公告)日：2011-02-17
申请号：US12538965
申请日：2009-08-11
申请人： Michael A. Gaynes , Rajneesh Kumar , Thomas E. Lombardi , Steve Ostrander
发明人： Michael A. Gaynes , Rajneesh Kumar , Thomas E. Lombardi , Steve Ostrander
IPC分类号： H01L23/28 , H01L21/56
CPC分类号： H01L21/563 , H01L23/562 , H01L24/32 , H01L2224/16225 , H01L2224/32225 , H01L2224/73203 , H01L2224/73204 , H01L2924/01019 , H01L2924/09701 , H01L2924/00 , H01L2924/3512
摘要： A method of fabricating a chip package is provided. The chip package includes a laminate, a chip and conductive elements interposed between the chip and the laminate by which signals are transmitted among the chip and the laminate. The method includes dispensing a first underfill in a space defined between opposing faces of the chip and the laminate and dispensing a second underfill at least at a portion of an edge of the chip, the second underfill including a high aspect ratio material.
摘要翻译：提供一种制造芯片封装的方法。芯片封装包括层叠体，芯片和介于芯片和层压体之间的导电元件，信号在芯片和层压体之间传输。该方法包括将第一底部填充物分配到在芯片的相对面和层压体之间限定的空间中，并且至少在芯片边缘的一部分处分配第二底部填充物，第二底部填充物包括高纵横比材料。

18. 发明授权

US5489465A Edge seal technology for low dielectric/porous substrate processing 失效
标题翻译：用于低介电/多孔基材加工的边缘密封技术
公开(公告)号：US5489465A
公开(公告)日：1996-02-06
申请号：US254327
申请日：1994-06-03
申请人： Govindarajan Natarajan , Takeshi Takamori , Katharine G. Frase , Thomas E. Lombardi , Robert A. Rita
发明人： Govindarajan Natarajan , Takeshi Takamori , Katharine G. Frase , Thomas E. Lombardi , Robert A. Rita
IPC分类号： B32B18/00 , H01L23/12
CPC分类号： B32B18/00 , C04B2237/12 , C04B2237/341 , C04B2237/343 , C04B2237/366 , C04B2237/68 , Y10T428/24322 , Y10T428/24917 , Y10T428/24926 , Y10T428/26
摘要： A sealed composite ceramic structure is formed by first forming a plurality of composite green sheets. Each of the green sheets is a composite structure comprising a central portion of partially densifiable material and an outer portion of fully densifiable material. Next, top and bottom green sheets of fully densifiable material are formed. The greensheets are then stacked to form a laminated structure in the following order: the bottom green sheet, the plurality of composite green sheets, and the top green sheet. The substrate laminate is sintered to form the sealed structure having a porous central portion. The composite structure has particular application to ceramic substrates for mounting semiconductor devices requiring low dielectric constant substrates, but the structure also has applications in fluid processing using porous laminated structures. In both applications, the creation of a porous ceramic body with solid, sealed edges and/or external surfaces hold significant advantages.
摘要翻译：通过首先形成多个复合生片形成密封复合陶瓷结构体。每片生坯是由部分致密材料的中心部分和完全致密材料的外部组成的复合结构。接下来，形成完全致密材料的顶部和底部生片。然后按以下顺序堆放毛坯以形成层压结构：底部生片，多个复合生片和顶生片。将基板层压体烧结以形成具有多孔中心部分的密封结构。该复合结构特别适用于要求低介电常数衬底的半导体器件的陶瓷衬底，但该结构也可用于使用多孔层压结构的流体处理中。在这两种应用中，创建具有固体，密封边缘和/或外部表面的多孔陶瓷体具有显着的优点。

19. 发明申请

US20130323345A1 FIXTURE FOR SHAPING A LAMINATE SUBSTRATE 有权
标题翻译：用于形成层压基板的形状
公开(公告)号：US20130323345A1
公开(公告)日：2013-12-05
申请号：US13488693
申请日：2012-06-05
申请人： Edmund D. Blackshear , Thomas E. Lombardi , Donald A. Merte , Steven P. Ostrander , Thomas Weiss , Jiantao Zheng
发明人： Edmund D. Blackshear , Thomas E. Lombardi , Donald A. Merte , Steven P. Ostrander , Thomas Weiss , Jiantao Zheng
IPC分类号： B29C53/18
CPC分类号： H01L24/75 , H01L23/562 , H01L24/81 , H01L2224/16 , H01L2224/75983 , H01L2224/75987 , H01L2224/81024 , H01L2224/81075 , H01L2224/81191 , H01L2224/81192 , H01L2224/8121 , H01L2224/81815 , H01L2224/81912 , H01L2224/83192 , H01L2924/10253 , H01L2924/3511 , H01L2924/00 , H01L2924/00014
摘要： A fixture for shaping a laminate substrate includes a trap ring, a base plate and a center button. The base plate includes a recess adapted to receive the laminate substrate. The center button is disposed in an opening in the base plate. The center button may be adjusted to shape the laminate substrate.
摘要翻译：用于成型层压基板的固定装置包括捕获环，基板和中心按钮。基板包括适于接收层压基板的凹部。中心按钮设置在基板的开口中。可以调节中心按钮以使层压基板成形。

20. 发明申请

US20130320069A1 METHOD FOR SHAPING A LAMINATE SUBSTRATE 有权
标题翻译：形成层压基板的方法
公开(公告)号：US20130320069A1
公开(公告)日：2013-12-05
申请号：US13488678
申请日：2012-06-05
申请人： Edmund Blackshear , Thomas E. Lombardi , Donald A. Merte , Steven P. Ostrander , Thomas Weiss , Jiantao Zheng
发明人： Edmund Blackshear , Thomas E. Lombardi , Donald A. Merte , Steven P. Ostrander , Thomas Weiss , Jiantao Zheng
IPC分类号： B23K31/12
CPC分类号： H01L23/562 , H01L21/67333 , H01L22/12 , H01L22/20 , H01L24/81 , H01L2224/16225 , H01L2224/81024 , H01L2224/8121 , H01L2224/81815 , H01L2224/81908 , H01L2924/3511 , Y02P80/30
摘要： A method for shaping a laminate substrate includes characterizing the laminate substrate for warpage characteristics. The laminate substrate is placed into a fixture with a correction to shape the laminate substrate based on the warpage characteristics. The laminate substrate is fluxed. A chip is placed onto the laminate substrate. The fixture is placed into a reflow furnace to join the chip and the laminate substrate. The fixture is removed from the reflow furnace. A warpage measurement is performed on the joined chip and laminate substrate. The correction may be modified if shorts are observed at the chip site.
摘要翻译：用于成型层叠基板的方法包括表征层压基板的翘曲特性。基于翘曲特性，将层压基板放置在具有校正以校正层压基板的固定装置中。层压基板被熔化。将芯片放置在层压基板上。将夹具放入回流炉中以连接芯片和层压基板。夹具从回流炉中取出。在接合的芯片和层叠基板上进行翘曲测量。如果在芯片位置观察到短路，则可以修改校正。

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