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11. 发明申请

US20100161719A1 JAVA Enterprise Resource Management System and Method 审中-公开
标题翻译： JAVA企业资源管理系统与方法
公开(公告)号：US20100161719A1
公开(公告)日：2010-06-24
申请号：US12347032
申请日：2008-12-31
申请人： Johney Tsai , David Strong , Chi Lin
发明人： Johney Tsai , David Strong , Chi Lin
IPC分类号： G06F15/16
CPC分类号： G06F9/544 , G06F11/3419 , G06F11/3466 , G06F2201/86 , G06F2201/865 , G06F2201/87
摘要： A Java enterprise resource management (JERM) system and method are provided that allow both timing metrics and call metrics to be monitored and gathered in real-time, and which can cause appropriate actions to be taken in real-time. The JERM system provides a level of granularity with respect to the monitoring of methods triggered during a transaction that is equivalent to or better than that which is currently provided in the aforementioned known call-analysis resource management systems. In addition, the JERM system also provides information associated with the timing of hops that occur between servers, and between and within applications, during a transaction. Because all of this information is obtained in real-time, the JERM system is able to respond in real-time to cause resources to be scaled in or scaled out in a way that provides improved efficiency and productivity, and that enables the enterprise to quickly recover from resource failures.
摘要翻译：提供了Java企业资源管理（JERM）系统和方法，其允许实时监视和收集时间度量和呼叫度量，并且可以实时地采取适当的动作。 JERM系统提供关于在事务期间触发的方法的监视的粒度级别，其等于或优于当前在前述的已知呼叫分析资源管理系统中提供的方法。此外，JERM系统还提供与在事务期间在服务器之间以及在应用程序之间和之间发生的跳时间的相关信息。由于所有这些信息都是实时获取的，所以JERM系统能够实时响应，以提高效率和生产率的方式扩展或扩展资源，并使企业能够快速从资源故障中恢复。

12. 发明申请

US20100161715A1 JAVA ENTERPRISE RESOURCE MANAGEMENT SYSTEM AND METHOD 审中-公开
标题翻译： JAVA企业资源管理系统与方法
公开(公告)号：US20100161715A1
公开(公告)日：2010-06-24
申请号：US12340844
申请日：2008-12-22
申请人： Johney Tsai , David Strong , Chi Lin
发明人： Johney Tsai , David Strong , Chi Lin
IPC分类号： G06F15/16
CPC分类号： G06F9/544 , G06F11/3419 , G06F11/3466 , G06F2201/86 , G06F2201/865 , G06F2201/87
摘要： A Java enterprise resource management (JERM) system and method are provided that allow both timing metrics and call metrics to be monitored and gathered in real-time, and which can cause appropriate actions to be taken in real-time. The JERM system provides a level of granularity with respect to the monitoring of methods triggered during a transaction that is equivalent to or better than that which is currently provided in the aforementioned known call-analysis resource management systems. In addition, the JERM system also provides information associated with the timing of hops that occur between servers, and between and within applications, during a transaction. Because all of this information is obtained in real-time, the JERM system is able to respond in real-time to cause resources to be scaled in or scaled out in a way that provides improved efficiency and productivity, and that enables the enterprise to quickly recover from resource failures.
摘要翻译：提供了Java企业资源管理（JERM）系统和方法，其允许实时监视和收集时间度量和呼叫度量，并且可以实时地采取适当的动作。 JERM系统提供关于在事务期间触发的方法的监视的粒度级别，其等于或优于当前在前述的已知呼叫分析资源管理系统中提供的方法。此外，JERM系统还提供与在事务期间在服务器之间以及在应用程序之间和之间发生的跳时间的相关信息。由于所有这些信息都是实时获取的，所以JERM系统能够实时响应，以提高效率和生产率的方式扩展或扩展资源，并使企业能够快速从资源故障中恢复。

13. 发明授权

US11126436B1 Compilation and execution of parallel code fragments 有权
公开(公告)号：US11126436B1
公开(公告)日：2021-09-21
申请号：US17062699
申请日：2020-10-05
申请人： Matthew Miller , David Strong , Anthony Matyok
发明人： Matthew Miller , David Strong , Anthony Matyok
IPC分类号： G06F9/30 , G06F9/38 , G06F9/445
摘要： Systems and methods for executing compiled code having parallel code fragments is provided. One method includes storing executable code having a plurality of parallel code fragments, each of the plurality of parallel code fragments representing alternative executable paths through a code stream. The method further includes determining a code level supported by a processor executable at a computing system, the processor executable supporting a hosted computing environment. The method also includes translating the executable code into machine-readable code executable by a processor of the computing system. Translating the executable code includes selecting a code fragment from among the plurality of parallel code fragments for execution based on the code level supported by the processor executable. The method includes executing the machine-readable code within the hosted computing environment.

14. 发明授权

US11237809B1 Feature set selection using parallel code fragments in executable code 有权
公开(公告)号：US11237809B1
公开(公告)日：2022-02-01
申请号：US17062722
申请日：2020-10-05
申请人： Matthew Miller , David Strong , Anthony Matyok
发明人： Matthew Miller , David Strong , Anthony Matyok
IPC分类号： G06F8/41 , G06F21/62
摘要： Systems and methods for executing compiled code having parallel code fragments is provided. One method includes storing executable code having a plurality of parallel code fragments, each of the plurality of parallel code fragments representing alternative executable paths through a code stream. The method includes translating the executable code into machine-readable code executable by a processor of the computing system. Translating the executable code includes selecting a code fragment from among the plurality of parallel code fragments for execution to select features for inclusion in execution at a time of execution. The method includes executing the machine-readable code within the hosted computing environment.

15. 发明授权

US11442714B2 Parallel code fragments in executable code 有权
公开(公告)号：US11442714B2
公开(公告)日：2022-09-13
申请号：US17062678
申请日：2020-10-05
申请人： Matthew Miller , David Strong , Anthony Matyok
发明人： Matthew Miller , David Strong , Anthony Matyok
IPC分类号： G06F9/44 , G06F8/41
摘要： Systems and methods for executing compiled code having parallel code fragments is provided. One method includes storing executable code having a plurality of parallel code fragments, each of the plurality of parallel code fragments representing alternative executable paths through a code stream. The method further includes determining a code level supported by a processor executable at a computing system, the processor executable supporting a hosted computing environment. The method also includes translating the executable code into machine-readable code executable by a processor of the computing system. Translating the executable code includes selecting a code fragment from among the plurality of parallel code fragments for execution based on the code level supported by the processor executable. The method includes executing the machine-readable code within the hosted computing environment.

16. 发明申请

US20220284093A1 SYSTEM AND METHOD FOR RESPONSIVE PROCESS SECURITY CLASSIFICATION AND OPTIMIZATION 有权
公开(公告)号：US20220284093A1
公开(公告)日：2022-09-08
申请号：US17194501
申请日：2021-03-08
申请人： Andrew Ward Beale , David Strong
发明人： Andrew Ward Beale , David Strong
IPC分类号： G06F21/55 , G06F21/54 , G06F21/60 , G06F21/79 , G06F9/38 , G06F9/30
摘要： A system and method for the storage within one or more virtual execution context registers private code representative of processes or other information requiring an enhanced degree of security. The storage of the private code can be performed as a function of the type of code or in response to one or more markers embedded within the code. The time-variant nature of the virtual execution context registers affords a high degree of inherent security for the private code data stored within.

17. 发明申请

US20220283817A1 SYSTEM AND METHOD FOR THE CREATION AND PROVISION OF EXECUTION VIRTUAL CONTEXT INFORMATION 有权
公开(公告)号：US20220283817A1
公开(公告)日：2022-09-08
申请号：US17194523
申请日：2021-03-08
申请人： Andrew Ward Beale , David Strong
发明人： Andrew Ward Beale , David Strong
IPC分类号： G06F9/38 , G06F9/30 , G06F9/455 , G06F13/16
摘要： A system and method for virtual processor customization based upon the particular workload placed upon the virtual processor by one or more execution contexts within a given program or process. The customization serves to optimize the virtual processor architecture based upon a determination as to the size and/or type or virtual execution registers optimally suited for supporting a given execution context. This results in a time-variant processor architecture comprised of a virtual processor base and a virtual execution context.

18. 发明授权

US09760291B2 Secure migratable architecture having high availability 有权
公开(公告)号：US09760291B2
公开(公告)日：2017-09-12
申请号：US15048154
申请日：2016-02-19
申请人： Andrew Ward Beale , David Strong
发明人： Andrew Ward Beale , David Strong
IPC分类号： G06F1/24 , G06F3/06 , H04L29/06 , H04L12/24 , G06F9/445 , G06F9/455 , G06F9/50 , G06F12/02 , G06F12/14 , G06F12/08 , G06F9/44
CPC分类号： G06F3/061 , G06F3/0617 , G06F3/062 , G06F3/0631 , G06F3/0637 , G06F3/0644 , G06F3/0647 , G06F3/0656 , G06F3/0659 , G06F3/0664 , G06F3/067 , G06F3/0673 , G06F8/65 , G06F9/4401 , G06F9/455 , G06F9/45558 , G06F9/5016 , G06F12/0223 , G06F12/08 , G06F12/1458 , G06F12/1483 , G06F2009/4557 , G06F2009/45583 , G06F2212/1004 , G06F2212/1016 , G06F2212/1032 , G06F2212/1052 , G06F2212/151 , H04L41/0843 , H04L41/28 , H04L63/20
摘要： Systems and methods are disclosed that ensure high availability of such an architecture hosted on commodity platforms. One method includes initializing, by an operating system, execution of a process by the programmable circuit, the process including a firmware environment representing a virtual computing system, the process further including one or more workloads to be executed within the process. The method also includes allocating a portion of the memory for use by the process, the portion of memory including a plurality of memory segments, and generating a plurality of area descriptors associated with the plurality of memory segments, each of the area descriptors defining a location and length of a corresponding memory segment. The method includes quiescing execution of the process and capturing contents of the portion of memory and the plurality of area descriptors associated with the process.

19. 发明申请

US20170024128A1 SECURE MIGRATABLE ARCHITECTURE HAVING IMPROVED PERFORMANCE FEATURES 有权
标题翻译：具有改进的性能特征的安全可移植的架构
公开(公告)号：US20170024128A1
公开(公告)日：2017-01-26
申请号：US15048169
申请日：2016-02-19
申请人： Andrew Ward Beale , David Strong
发明人： Andrew Ward Beale , David Strong
IPC分类号： G06F3/06 , G06F9/455 , G06F12/08
CPC分类号： G06F3/061 , G06F3/0617 , G06F3/062 , G06F3/0631 , G06F3/0637 , G06F3/0644 , G06F3/0647 , G06F3/0656 , G06F3/0659 , G06F3/0664 , G06F3/067 , G06F3/0673 , G06F8/65 , G06F9/4401 , G06F9/455 , G06F9/45558 , G06F9/5016 , G06F12/0223 , G06F12/08 , G06F12/1458 , G06F12/1483 , G06F2009/4557 , G06F2009/45583 , G06F2212/1004 , G06F2212/1016 , G06F2212/1032 , G06F2212/1052 , G06F2212/151 , H04L41/0843 , H04L41/28 , H04L63/20
摘要： Methods and systems for implementing a secure migratable architecture having improved performance features over existing virtualization systems are disclosed. One method includes allocating a portion of a memory for use by a process, the process including a firmware environment representing a virtual computing system having a second computing architecture different from a first computing architecture of a computing system on which the process is executed. The method includes associating area descriptors with each of a plurality of memory areas within the portion of the memory used by the process, and receiving a request within the firmware environment to store data within a first memory area of the plurality of memory areas, the first memory area defined by a first area descriptor of the area descriptors, the request being associated with a plurality of memory addresses within the first memory area. The method includes, in response to the request, performing a check on a tag associated with the first memory area and stored in the first area descriptor. The method further includes, upon completion of the check, storing the data within the first memory area without performing a separate tag check for each of the plurality of memory addresses within the first memory area.
摘要翻译：公开了用于实现具有比现有虚拟化系统更好的性能特征的安全可迁移架构的方法和系统。一种方法包括分配存储器的一部分以供过程使用，该过程包括表示虚拟计算系统的固件环境，该虚拟计算系统具有与执行该过程的计算系统的第一计算架构不同的第二计算架构。该方法包括将区域描述符与进程使用的存储器部分内的多个存储区域中的每一个相关联，以及在固件环境内接收在多个存储区域的第一存储区域内存储数据的请求，第一存储器区域由区域描述符的第一区域描述符定义，该请求与第一存储器区域内的多个存储器地址相关联。该方法响应于该请求，对与第一存储器区域相关联并存储在第一区域描述符中的标签进行检查。该方法还包括在完成检查之后，将数据存储在第一存储器区域内，而不对第一存储器区域内的多个存储器地址中的每一个进行单独的标签检查。

20. 发明授权

US11663010B2 System and method for securely debugging across multiple execution contexts 有权
公开(公告)号：US11663010B2
公开(公告)日：2023-05-30
申请号：US17194511
申请日：2021-03-08
申请人： Andrew Ward Beale , David Strong
发明人： Andrew Ward Beale , David Strong
IPC分类号： G06F9/30 , G06F11/22 , G06F11/26
CPC分类号： G06F9/30181 , G06F11/2236 , G06F11/26
摘要： A system and method for a virtual processor base/virtual execution context arrangement. The disclosed arrangement utilizes chiplets comprising core logic and defined instruction sets. The chiplets are adapted to operate in conjunction with one or more active execution contexts to enable the execution of particular processes. In particular, the defined instruction sets includes a instructions for processor debugging. The system and method support the compartmentalization of such debugging instructions so as to provide enhanced processor and process security.

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