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11. 发明申请

US20090183849A1 FULL-FIELD SOLDER COVERAGE 有权
标题翻译：全场焊接覆盖
公开(公告)号：US20090183849A1
公开(公告)日：2009-07-23
申请号：US12018421
申请日：2008-01-23
申请人： Russell A. Budd , John P. Karidis , Mark D. Schultz
发明人： Russell A. Budd , John P. Karidis , Mark D. Schultz
IPC分类号： B22D27/15 , B67D5/00 , B22D23/00
CPC分类号： H05K3/3457 , B23K1/0016 , B23K3/0638 , H05K2203/0113 , H05K2203/0126 , H05K2203/0338
摘要： A system, apparatus, and method, are provided to deposit conductive bonding material into cavities in a mold. A fill head is placed in substantial contact with a mold that includes cavities. The fill head includes a sealing member that substantially encompasses an entire area to be filled with conductive bonding material. The conductive bonding material is forced out of the fill head toward the mold. The conductive bonding material is provided into at least one cavity of the cavities contemporaneous with the at least one cavity being in proximity to the fill head.
摘要翻译：提供一种系统，装置和方法，以将导电接合材料沉积在模具中的空腔中。填充头被放置成与包括空腔的模具基本接触。填充头包括密封构件，其基本上包围要填充有导电接合材料的整个区域。导电接合材料被迫从模具顶端朝向模具。导电接合材料设置在与填充头附近的至少一个空腔同时的空腔的至少一个空腔中。

12. 发明授权

US07408780B2 Compliant thermal interface structure utilizing spring elements with fins 有权
标题翻译：符合热接口结构，利用带翅片的弹簧元件
公开(公告)号：US07408780B2
公开(公告)日：2008-08-05
申请号：US11151843
申请日：2005-06-14
申请人： John P. Karidis , Mark D. Schultz , Bucknell C. Webb
发明人： John P. Karidis , Mark D. Schultz , Bucknell C. Webb
IPC分类号： H05K7/20 , F28F7/00
CPC分类号： H01L23/433 , H01L2924/0002 , H01L2924/00
摘要： A structure for cooling an electronic device is disclosed. The structure includes a top layer disposed over the electronic device. The structure further includes a plurality of spring elements disposed between the top layer and the electronic device, wherein at least one of the spring elements comprises a spring portion and a fin portion. At least one of the spring elements provides a heat path from the electronic device and provides mechanical compliance. In another embodiment, the structure further includes a heat-conducting layer disposed over the electronic device, wherein the fin portion of each of at least one of the spring elements is coupled to the heat-conducting layer.
摘要翻译：公开了一种用于冷却电子设备的结构。该结构包括设置在电子设备上的顶层。该结构还包括设置在顶层和电子设备之间的多个弹簧元件，其中弹簧元件中的至少一个包括弹簧部分和翅片部分。至少一个弹簧元件提供来自电子设备的热路径并且提供机械顺应性。在另一个实施例中，该结构还包括设置在电子设备上的导热层，其中至少一个弹簧元件中的每一个的翅片部分耦合到导热层。

13. 发明授权

US5543787A Keyboard with translating sections 失效
标题翻译：键盘与翻译部分
公开(公告)号：US5543787A
公开(公告)日：1996-08-06
申请号：US216984
申请日：1994-03-23
申请人： John P. Karidis , Michael P. Goldowsky , Gerard McVicker
发明人： John P. Karidis , Michael P. Goldowsky , Gerard McVicker
IPC分类号： G06F3/02 , G06F1/16 , H01H13/84 , H03K17/94
CPC分类号： G06F1/1616 , G06F1/1624 , G06F1/1666 , H01H13/84 , H01H2223/05 , H01H2223/052
摘要： A keyboard assembly for a computer with movable keyboard pallets. The pallets are movable relative to each other between a compact stowing position and an extended operational position. A movement mechanism moves at least one of the pallets in a lateral direction relative to the other pallet and then towards the other pallet in a direction orthogonal to the lateral direction. The movement mechanism can be connected to the cover of the computer to automatically control movement of the pallets based upon position of the cover relative to a base of the computer. Thus, the pallets can be automatically moved from the compact stowing position, when the cover is closed, to the extended operational position when the cover is opened. Upon moving the cover from the open position to the closed position, the pallets are automatically moved from the extended operational position to the compact stowing position.
摘要翻译：用于具有可移动键盘托盘的计算机的键盘组件。托盘可以在紧凑的收起位置和延伸的操作位置之间相对于彼此移动。移动机构相对于另一个托盘在横向方向上移动至少一个托盘，然后沿与横向方向正交的方向朝着另一个托盘移动。移动机构可以连接到计算机的盖子，以基于盖子相对于计算机基座的位置来自动控制托盘的移动。因此，当盖打开时，托盘可以从盖子关闭时的紧凑的收起位置自动移动到延伸的操作位置。在将盖从打开位置移动到关闭位置时，托盘自动地从延伸的操作位置移动到紧凑的收起位置。

14. 发明授权

US5391036A Magnetic transfer device 失效
标题翻译：磁转移装置
公开(公告)号：US5391036A
公开(公告)日：1995-02-21
申请号：US31520
申请日：1993-03-15
申请人： Tibor L. Bauer , William A. Cavaliere , David K. Green , John P. Karidis , David C. Linnell
发明人： Tibor L. Bauer , William A. Cavaliere , David K. Green , John P. Karidis , David C. Linnell
IPC分类号： B65G47/90 , B28D5/00 , H01L21/677 , H01L21/687 , H05K13/02 , B25J15/06
CPC分类号： B28D5/0082 , H01L21/68707
摘要： A transfer device especially suitable for transferring a minute electronic component part from a first location and position to a second location and position, the component part having critical facet sides of high integrity and at least one non-critical side, is disclosed. The transfer device comprises a non-destructive engaging means, a control means, and a decoupling means, whereby the integrity of the essential facet sides of the component part is maintained.
摘要翻译：公开了一种特别适用于将微小电子部件从第一位置和位置传送到第二位置和位置的传送装置，所述部件具有高完整性和至少一个非关键侧的关键面侧。传送装置包括非破坏性接合装置，控制装置和解耦装置，从而保持部件的主要侧面的完整性。

15. 发明授权

US4995744A Impact printer actuator using magnet and electromagnetic coil and method of manufacture 失效
标题翻译：使用磁铁和电磁线圈的冲击式打印机执行机构及制造方法
公开(公告)号：US4995744A
公开(公告)日：1991-02-26
申请号：US285203
申请日：1988-12-16
申请人： Michael P. Goldowsky , Teiji Hisano , John P. Karidis , Hiromi Shibuya , Osamu Ueda
发明人： Michael P. Goldowsky , Teiji Hisano , John P. Karidis , Hiromi Shibuya , Osamu Ueda
IPC分类号： B41J2/28 , B41J9/38 , H01F7/14
CPC分类号： B41J9/38 , H01F7/14 , Y10T29/49075
摘要： A print actuator for a dot matrix printer has a stator with a frame, at least two ferromagnetic poles and at least one permanent magnet; and at least one electromagnetic coil surrounding the magnet. The magnet can generally hold an armature in a home position by its magnetic flux until the coil is energized at which point the magnetic flux of the magnet is neutralized by the magnetic flux of the coil and the armature is substantially released of influence from the magnet's hold.

16. 发明授权

US08407410B2 Wear-leveling and bad block management of limited lifetime memory devices 有权
标题翻译：有限寿命内存设备的磨损均衡和坏块管理
公开(公告)号：US08407410B2
公开(公告)日：2013-03-26
申请号：US13445172
申请日：2012-04-12
申请人： Bulent Abali , John P. Karidis , Luis A. Lastras-Montano
发明人： Bulent Abali , John P. Karidis , Luis A. Lastras-Montano
IPC分类号： G06F12/00
CPC分类号： G06F12/0246 , G06F2212/7211 , G11C16/349 , G11C16/3495 , G11C29/76 , G11C29/82
摘要： Performing wear-leveling and bad block management of limited lifetime memory devices. A method for performing wear-leveling in a memory includes receiving logical memory addresses and applying a randomizing function to the logical memory addresses to generate intermediate addresses within a range of intermediate addresses. The intermediate addresses are mapped into physical addresses of a memory using an algebraic mapping. The physical addresses are within a range of physical addresses that include at least one more location than the range of intermediate addresses. The physical addresses are output for use in accessing the memory. The mapping between the intermediate addresses and the physical addresses is periodically shifted. In addition, contents of bad blocks are replaced with redundantly encoded redirection addresses.
摘要翻译：执行有限寿命内存设备的磨损均衡和坏块管理。用于在存储器中执行磨损均衡的方法包括接收逻辑存储器地址并将随机化功能应用于逻辑存储器地址以在中间地址的范围内生成中间地址。使用代数映射将中间地址映射到存储器的物理地址。物理地址在物理地址的范围内，其包括比中间地址的范围至少一个以上的位置。输出物理地址用于访问存储器。中间地址和物理地址之间的映射周期性地移位。此外，坏块的内容被替换为冗余编码的重定向地址。

17. 发明申请

US20130011993A1 PLANAR PHASE- CHANGE MEMORY CELL WITH PARALLEL ELECTRICAL PATHS 有权
标题翻译：平面相变记忆电池与并联电气
公开(公告)号：US20130011993A1
公开(公告)日：2013-01-10
申请号：US13619493
申请日：2012-09-14
申请人： Michele M. Franceschini , John P. Karidis
发明人： Michele M. Franceschini , John P. Karidis
IPC分类号： H01L21/02
CPC分类号： G11C8/10 , G11C11/5678 , G11C13/0004 , G11C13/0069 , G11C2013/0083 , H01L27/2463 , H01L45/06 , H01L45/1226 , H01L45/144 , H01L45/1675
摘要： A method of manufacturing a phase change memory cell on a substrate. The method includes: etching a first trench in the substrate; depositing a first conductor layer in the first trench; depositing a first insulator layer over the first conductor layer in the first trench; etching a second trench in the substrate at an angle to the first trench; depositing a second insulator layer in the second trench; depositing a second conductor layer over the second insulator layer in the second trench; and depositing phase change material. The deposited phase change material is in contact with the first conductor layer and the second conductor layer.
摘要翻译：一种在衬底上制造相变存储单元的方法。该方法包括：蚀刻衬底中的第一沟槽; 在第一沟槽中沉积第一导体层; 在所述第一沟槽中的所述第一导体层上沉积第一绝缘体层; 以与第一沟槽成一定角度蚀刻衬底中的第二沟槽; 在所述第二沟槽中沉积第二绝缘体层; 在所述第二沟槽中的所述第二绝缘体层上沉积第二导体层; 并沉积相变材料。沉积的相变材料与第一导体层和第二导体层接触。

18. 发明授权

US08255613B2 Wear-leveling and bad block management of limited lifetime memory devices 有权
标题翻译：有限寿命内存设备的磨损均衡和坏块管理
公开(公告)号：US08255613B2
公开(公告)日：2012-08-28
申请号：US12433220
申请日：2009-04-30
申请人： Bulent Abali , John P. Karidis , Luis A. Lastras-Montano
发明人： Bulent Abali , John P. Karidis , Luis A. Lastras-Montano
IPC分类号： G06F12/00
CPC分类号： G06F12/0246 , G06F2212/7211 , G11C16/349 , G11C16/3495 , G11C29/76 , G11C29/82
摘要： Performing wear-leveling and bad block management of limited lifetime memory devices. A method for performing wear-leveling in a memory includes receiving logical memory addresses and applying a randomizing function to the logical memory addresses to generate intermediate addresses within a range of intermediate addresses. The intermediate addresses are mapped into physical addresses of a memory using an algebraic mapping. The physical addresses are within a range of physical addresses that include at least one more location than the range of intermediate addresses. The physical addresses are output for use in accessing the memory. The mapping between the intermediate addresses and the physical addresses is periodically shifted. In addition, contents of bad blocks are replaced with redundantly encoded redirection addresses.
摘要翻译：执行有限寿命内存设备的磨损均衡和坏块管理。用于在存储器中执行磨损均衡的方法包括接收逻辑存储器地址并将随机化功能应用于逻辑存储器地址以在中间地址的范围内生成中间地址。使用代数映射将中间地址映射到存储器的物理地址。物理地址在物理地址的范围内，其包括比中间地址的范围至少一个以上的位置。输出物理地址用于访问存储器。中间地址和物理地址之间的映射周期性地移位。此外，坏块的内容被替换为冗余编码的重定向地址。

19. 发明申请

US20110252215A1 COMPUTER MEMORY WITH DYNAMIC CELL DENSITY 审中-公开
标题翻译：具有动态细胞密度的计算机存储器
公开(公告)号：US20110252215A1
公开(公告)日：2011-10-13
申请号：US12757738
申请日：2010-04-09
申请人： Michele M. Franceschini , John P. Karidis , Luis A. Lastras-Montano , Moinuddin Qureshi
发明人： Michele M. Franceschini , John P. Karidis , Luis A. Lastras-Montano , Moinuddin Qureshi
IPC分类号： G06F12/02
CPC分类号： G11C11/5628 , G06F12/0238 , G11C11/5678 , G11C13/0004 , G11C2211/5641 , Y02D10/13
摘要： A computer memory with dynamic cell density including a method that obtains a target size for a first memory region. The first memory region includes first memory units operating at a first density. The first memory units are includes in a memory in a memory system. The memory is operable at the first density and a second density. The method also includes: determining that a current size of the first memory region is not within a threshold of the target size and that the first memory region is smaller than the target size; identifying a second memory unit currently operating at the second density in a second memory region, the second memory unit included in the memory; and dynamically reassigning, during normal system operation, the second memory unit into the first memory region, the second memory unit operating at the first density after being reassigned to the first memory region.
摘要翻译：一种具有动态单元密度的计算机存储器，包括获得第一存储器区域的目标尺寸的方法。第一存储器区域包括以第一密度操作的第一存储器单元。第一存储器单元包括在存储器系统的存储器中。存储器可在第一密度和第二密度下操作。所述方法还包括：确定所述第一存储器区域的当前大小不在所述目标大小的阈值内，并且所述第一存储器区域小于所述目标大小; 识别当前在第二存储器区域以第二密度操作的第二存储器单元，所述第二存储器单元包括在存储器中; 以及在正常系统操作期间将所述第二存储器单元动态地重新分配到所述第一存储器区域中，所述第二存储器单元在被重新分配给所述第一存储器区域之后以所述第一密度操作。

20. 发明授权

US08023345B2 Iteratively writing contents to memory locations using a statistical model 有权
标题翻译：使用统计模型迭代地将内容写入内存位置
公开(公告)号：US08023345B2
公开(公告)日：2011-09-20
申请号：US12391693
申请日：2009-02-24
申请人： Matthew J. Breitwisch , Roger W. Cheek , Stefanie R. Chiras , Ibrahim M. Elfadel , Michele M. Franceschini , John P. Karidis , Luis A. Lastras-Montano , Thomas Mittelholzer , Mayank Sharma
发明人： Matthew J. Breitwisch , Roger W. Cheek , Stefanie R. Chiras , Ibrahim M. Elfadel , Michele M. Franceschini , John P. Karidis , Luis A. Lastras-Montano , Thomas Mittelholzer , Mayank Sharma
IPC分类号： G11C29/00 , G11C7/00
CPC分类号： G11C29/02 , G11C13/0004 , G11C13/0064 , G11C13/0069 , G11C29/021 , G11C29/028 , G11C2013/0092
摘要： Systems, methods, and devices for iteratively writing contents to memory locations are provided. A statistical model is used to determine a sequence of pulses to write desired contents to a memory location. The contents can be expressed as a resistance value in a range to store one or more bits in a memory cell. For phase change memory, an adaptive reset pulse and one or more annealing pulses are selected based on a desired resistance range. Reading the resistance value of the memory cell can provide feedback to determine adjustments in an overall pulse application strategy. The statistical model and a look up table can be used to select and modify pulses. Adaptively updating the statistical model and look up table may reduce the number of looping iterations to shift the resistance value of the memory cell into the desired resistance range.
摘要翻译：提供了用于向内存位置迭代地写入内容的系统，方法和设备。统计模型用于确定将所需内容写入存储器位置的脉冲序列。内容可以表示为在存储单元中存储一个或多个位的范围内的电阻值。对于相变存储器，基于期望的电阻范围来选择自适应复位脉冲和一个或多个退火脉冲。读取存储器单元的电阻值可提供反馈以确定整体脉冲应用策略中的调整。统计模型和查询表可用于选择和修改脉冲。自适应地更新统计模型和查找表可以减少循环迭代的次数以将存储器单元的电阻值移动到期望的电阻范围。

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