会员体验
专利管家(专利管理)
工作空间(专利管理)
风险监控(情报监控)
数据分析(专利分析)
侵权分析(诉讼无效)
联系我们
交流群
官方交流:
QQ群: 891211   
微信请扫码    >>>
现在联系顾问~
热词
    • 11. 发明授权
    • Field emission display with antireflective layer
    • 具有抗反射层的场发射显示
    • US08237346B2
    • 2012-08-07
    • US13275877
    • 2011-10-18
    • Yuji EgiJiro NishidaTakeshi Nishi
    • Yuji EgiJiro NishidaTakeshi Nishi
    • H01J1/62H01J5/16
    • H01J11/12H01J11/44H01J31/123H01J2211/442H01J2211/444H01J2329/892
    • It is an object of the present invention to provide a PDP and an FED with excellent visibility and a high level of reliability that each have an antireflective function by which reflection of external light can be reduced. A plurality of adjacent pyramidal-shaped projections and an antireflective layer equipped with a covering film that covers the projections are provided. The reflection of light is prevented by the index of refraction of incident light from external being changed by a pyramid, which is a physical shape, projecting out toward an external side (atmosphere side) of a substrate that is to be used as a display screen as well as by the covering film used to cover the projections being formed of a material that has a higher index of refraction than the index of refraction of the pyramidal projection.
    • 本发明的目的是提供具有优异的可见性和高水平的可靠性的PDP和FED,每个具有可以减少外部光的反射的抗反射功能。 设置有多个相邻的金字塔形突起和设置有覆盖突起的覆盖膜的抗反射层。 光的反射被来自外部的入射光的折射率由作为物理形状的金字塔的折射率来防止,该金字塔朝向要用作显示屏的基板的外侧(气氛侧)突出 以及用于覆盖突起的覆盖膜由具有比金字塔形突起的折射率更高的折射率的材料形成。
    • 12. 发明申请
    • THIN FILM TRANSISTOR AND MANUFACTURING METHOD THEREOF
    • 薄膜晶体管及其制造方法
    • US20100096637A1
    • 2010-04-22
    • US12423829
    • 2009-04-15
    • Shunpei YamazakiYuji EgiShinya SasagawaMotomu Kurata
    • Shunpei YamazakiYuji EgiShinya SasagawaMotomu Kurata
    • H01L29/786H01L21/336
    • H01L27/1288H01L27/1214H01L29/04H01L29/41733H01L29/78696
    • Off current of a thin film transistor is reduced, and on current of the thin film transistor is increased, and variation in electric characteristics is reduced. As a structure of semiconductor layers which form a channel formation region of a thin film transistor, a first semiconductor layer including a plurality of crystalline regions is provided on a gate insulating layer side; a second semiconductor layer having an amorphous structure is provided on a source region and drain region side; an insulating layer with a thickness small enough to allow carrier travel is provided between the first semiconductor layer and the second semiconductor layer. The first semiconductor layer is in contact with the gate insulating layer. The second semiconductor layer is provided on an opposite side to a face of the first semiconductor layer which is in contact with the gate insulating layer.
    • 薄膜晶体管的截止电流减小,薄膜晶体管的导通电流增大,电特性的变化也降低。 作为形成薄膜晶体管的沟道形成区域的半导体层的结构,在栅极绝缘层侧设置包括多个结晶区域的第一半导体层, 在源区和漏区侧设置具有非晶结构的第二半导体层; 在第一半导体层和第二半导体层之间设置具有足够小以允许载流子行进的厚度的绝缘层。 第一半导体层与栅极绝缘层接触。 第二半导体层设置在与栅极绝缘层接触的与第一半导体层的面相反的一侧。
    • 17. 发明授权
    • Thin film transistor and manufacturing method thereof
    • 薄膜晶体管及其制造方法
    • US08525170B2
    • 2013-09-03
    • US12423829
    • 2009-04-15
    • Shunpei YamazakiYuji EgiShinya SasagawaMotomu Kurata
    • Shunpei YamazakiYuji EgiShinya SasagawaMotomu Kurata
    • H01L29/04
    • H01L27/1288H01L27/1214H01L29/04H01L29/41733H01L29/78696
    • Off current of a thin film transistor is reduced, and on current of the thin film transistor is increased, and variation in electric characteristics is reduced. As a structure of semiconductor layers which form a channel formation region of a thin film transistor, a first semiconductor layer including a plurality of crystalline regions is provided on a gate insulating layer side; a second semiconductor layer having an amorphous structure is provided on a source region and drain region side; an insulating layer with a thickness small enough to allow carrier travel is provided between the first semiconductor layer and the second semiconductor layer. The first semiconductor layer is in contact with the gate insulating layer. The second semiconductor layer is provided on an opposite side to a face of the first semiconductor layer which is in contact with the gate insulating layer.
    • 薄膜晶体管的截止电流减小,薄膜晶体管的导通电流增大,电特性的变化也降低。 作为形成薄膜晶体管的沟道形成区域的半导体层的结构,在栅极绝缘层侧设置包括多个结晶区域的第一半导体层, 在源区和漏区侧设置具有非晶结构的第二半导体层; 在第一半导体层和第二半导体层之间设置具有足够小以允许载流子行进的厚度的绝缘层。 第一半导体层与栅极绝缘层接触。 第二半导体层设置在与栅极绝缘层接触的与第一半导体层的面相反的一侧。
    • 19. 发明授权
    • Display device with stacked polarizers
    • 具有堆叠偏振器的显示装置
    • US08405800B2
    • 2013-03-26
    • US11669408
    • 2007-01-31
    • Tetsuji IshitaniTakeshi NishiYuji Egi
    • Tetsuji IshitaniTakeshi NishiYuji Egi
    • G02F1/1335
    • G02F1/133528G02F2001/133531H01L51/5281H01L2251/5323
    • An object of the present invention is to provide a display device having a high contrast ratio by a simple and easy method. Another object of the present invention is to manufacture such a display device having a high contrast ratio at low cost. The present invention relates to a display device including a first substrate; a second substrate; a layer including a display element, wherein the layer including the display element is interposed between the first substrate and the second substrate; and stacked polarizers on the outer side of the first substrate or the second substrate. The stacked polarizers are arranged to be in a parallel Nicols state and the wavelength distributions of the extinction coefficients of the stacked polarizers are different from each other.
    • 本发明的目的是提供一种通过简单且容易的方法具有高对比度的显示装置。 本发明的另一个目的是以低成本制造具有高对比度的显示装置。 本发明涉及包括第一基板的显示装置; 第二基板; 包括显示元件的层,其中包括所述显示元件的层插入在所述第一基板和所述第二基板之间; 以及在第一基板或第二基板的外侧上的堆叠的偏振器。 堆叠的偏振器被布置成处于平行的尼科尔(Nicols)状态,并且堆叠的偏振器的消光系数的波长分布彼此不同。