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    • 11. 发明授权
    • Loop filter integration in phase-locked loops
    • 环路滤波器集成在锁相环路中
    • US07091759B2
    • 2006-08-15
    • US10858444
    • 2004-06-01
    • Tirdad SowlatiEdward Youssoufian
    • Tirdad SowlatiEdward Youssoufian
    • H03L7/197
    • H03L7/0893H03L7/093H03L7/18H03L2207/12
    • A phase-locked loop and method of operation are disclosed. One embodiment includes providing a phase-locked loop, comprising a charge pump system comprising a first charge pump and a second charge pump, the charge pump system configured to provide control signals, a dual path filter, the dual path filter consisting of passive components that are configured to provide summation of control signals, wherein the dual path filter includes a first node coupled between a first charge pump and a first capacitor, wherein the dual path filter includes a second node coupled to a second charge pump through a first resistor, wherein the second node is connected to the first capacitor, and a voltage source coupled to the second node through a second resistor.
    • 公开了锁相环和操作方法。 一个实施例包括提供锁相环,包括电荷泵系统,其包括第一电荷泵和第二电荷泵,所述电荷泵系统被配置为提供控制信号双路径滤波器,所述双路径滤波器由无源部件组成, 被配置为提供控制信号的求和,其中所述双路径滤波器包括耦合在第一电荷泵和第一电容器之间的第一节点,其中所述双路径滤波器包括通过第一电阻器耦合到第二电荷泵的第二节点,其中 所述第二节点连接到所述第一电容器,以及通过第二电阻器耦合到所述第二节点的电压源。
    • 12. 发明授权
    • Wideband resistive input mixer with noise-cancelled impedance
    • 具有噪声消除阻抗的宽带电阻输入混频器
    • US08041327B2
    • 2011-10-18
    • US12136880
    • 2008-06-11
    • Edward Youssoufian
    • Edward Youssoufian
    • H04B1/10
    • H03D7/1441H03D7/1466H03D7/165H03D2200/0088H04B1/30
    • A radio frequency (RF) mixing circuit including a quadrature mixer that receives non-overlapping in-phase and quadrature local oscillator (LO) signals, and a plurality of low noise amplifiers (LNAs) operatively connected to the quadrature mixer, the plurality of LNAs presenting an input impedance at a baseband. A first voltage at an input node of the quadrature mixer is equal to a second voltage across the impedance up-converted to a frequency of a LO signal received by the quadrature mixer. The second voltage across the LNA input impedance includes a frequency of an input signal of the quadrature mixer down-converted by a frequency of the in-phase and quadrature LO signals and filtered by the impedance. The quadrature mixer down-converts an input signal by a frequency of the in-phase and quadrature LO signals and transfers the noise cancelled impedance to a RF to achieve a noise cancelled match.
    • 包括接收非重叠同相和正交本地振荡器(LO)信号的正交混频器的射频(RF)混合电路和可操作地连接到正交混频器的多个低噪声放大器(LNA),所述多个LNA 在基带处呈现输入阻抗。 在正交混频器的输入节点处的第一电压等于跨越阻抗的第二电压上变频到由正交混频器接收的LO信号的频率。 LNA输入阻抗上的第二电压包括正交混频器的输入信号的频率,其被同相和正交LO信号的频率下变频并被阻抗滤波。 正交混频器将输入信号按同相和正交LO信号的频率进行下变频,并将噪声抵消的阻抗传送到RF以实现噪声消除匹配。
    • 13. 发明授权
    • Noise-shaped blocker-reject amplifier
    • 噪声形阻抑制放大器
    • US07619472B1
    • 2009-11-17
    • US12132834
    • 2008-06-04
    • Ahmet TekinHassan ElwanEdward Youssoufian
    • Ahmet TekinHassan ElwanEdward Youssoufian
    • H03F3/45
    • H03F3/45475H03F2200/336H03F2203/45134H03F2203/45136H03F2203/45138H03F2203/45521H03F2203/45526H03F2203/45591H03H11/1291H03H11/32H03H11/525
    • A fully differential amplifier that amplifies and filters a signal band of a communications channel, the signal band including a desired signal and at least one blocker signal of an adjacent communications channel, the fully differential amplifier includes a fully differential operational amplifier (op-amp) with a common mode feedback, the fully differential operational amplifier amplifying the desired signal, a variable input resistance connected to an input of the fully differential op-amp, and an asymmetric floating frequency dependent negative resistance (AFFDNR) filter connected to the fully differential op-amp between the input and an output of the fully differential op-amp. A plurality of inputs of the fully differential op-amp may be virtually grounded to reduce swings in a voltage. The AFFDNR filter filters the at least one blocker signal and includes a plurality of resistors that implement a high order filtering of the at least one blocker signal.
    • 一种全差分放大器,其对通信信道的信号频带进行放大和滤波,所述信号频带包括期望信号和至少一个相邻通信信道的阻塞信号,全差分放大器包括全差分运算放大器(运算放大器) 具有共模反馈,全差分运算放大器放大所需信号,连接到全差分运算放大器的输入的可变输入电阻,以及连接到全差分运算放大器的非对称浮动频率相关负电阻(AFFDNR)滤波器 在全差分运算放大器的输入和输出之间。 全差分运算放大器的多个输入可以实际上接地以减少电压中的摆动。 AFFDNR滤波器对至少一个阻塞信号进行滤波,并且包括实现至少一个阻塞信号的高阶滤波的多个电阻器。
    • 14. 发明授权
    • Noise shaped n th order filter
    • 噪声形n级滤波器
    • US07525372B2
    • 2009-04-28
    • US11683651
    • 2007-03-08
    • Hassan ElwanAmr FahimAly IsmailEdward Youssoufian
    • Hassan ElwanAmr FahimAly IsmailEdward Youssoufian
    • H03B1/00H03K5/00
    • H03H11/04
    • A low noise nth order filter, system, and method includes a plurality of nested general immittance converters (GICs) operatively connected to one another in successive GIC stages; and a capacitor operatively connected to each of the GICs, wherein a first successive GIC stage begins at a first node located in between a previous GIC stage and a corresponding capacitor operatively connected to the previous GIC stage. A second successive GIC stage begins at a second node located in between the first node and the first successive GIC stage. The filter may further comprise a resistor operatively connected to at least one successive GIC stage, wherein the resistor is preferably located in between the first node and the first successive GIC stage.
    • 低噪声第n阶滤波器,系统和方法包括在连续GIC阶段中可操作地彼此连接的多个嵌套通用导纳转换器(GIC); 以及可操作地连接到每个GIC的电容器,其中第一连续GIC级开始于位于先前GIC级与可操作地连接到先前GIC级的对应电容器之间的第一节点处。 第二个连续的GIC阶段从位于第一节点和第一连续GIC阶段之间的第二节点开始。 滤波器还可以包括可操作地连接到至少一个连续GIC级的电阻器,其中电阻优选地位于第一节点和第一连续GIC级之间。
    • 15. 发明申请
    • NOISE SHAPED NTH ORDER FILTER
    • 噪音形状的第N个订单过滤器
    • US20080220737A1
    • 2008-09-11
    • US11683651
    • 2007-03-08
    • Hassan ElwanAmr FahimAly IsmailEdward Youssoufian
    • Hassan ElwanAmr FahimAly IsmailEdward Youssoufian
    • H04B1/10
    • H03H11/04
    • A low noise nth order filter, system, and method includes a plurality of nested general immittance converters (GICs) operatively connected to one another in successive GIC stages; and a capacitor operatively connected to each of the GICs, wherein a first successive GIC stage begins at a first node located in between a previous GIC stage and a corresponding capacitor operatively connected to the previous GIC stage. A second successive GIC stage begins at a second node located in between the first node and the first successive GIC stage. The filter may further comprise a resistor operatively connected to at least one successive GIC stage, wherein the resistor is preferably located in between the first node and the first successive GIC stage.
    • 低噪声第n阶滤波器,系统和方法包括在连续GIC阶段中可操作地彼此连接的多个嵌套通用导纳转换器(GIC); 以及可操作地连接到每个GIC的电容器,其中第一连续GIC级开始于位于先前GIC级与可操作地连接到先前GIC级的对应电容器之间的第一节点处。 第二个连续的GIC阶段从位于第一节点和第一连续GIC阶段之间的第二节点开始。 滤波器还可以包括可操作地连接到至少一个连续GIC级的电阻器,其中电阻优选地位于第一节点和第一连续GIC级之间。
    • 17. 发明申请
    • dB-linear analog variable gain amplifier (VGA) realization system and method
    • dB线性模拟可变增益放大器(VGA)实现系统和方法
    • US20070296490A1
    • 2007-12-27
    • US11472138
    • 2006-06-21
    • Hassan ElwanAmr FahimAly IsmailEdward Youssoufian
    • Hassan ElwanAmr FahimAly IsmailEdward Youssoufian
    • H03G3/20
    • H03G7/06H03G1/0088H03G3/001H03G3/3047
    • A dB-linear variable gain amplifier, a method for creation, and a system includes an amplifier; a pair of resistor arrays operatively connected to the amplifier, wherein each resistor array comprises MOS transistor resistive switches; a differential ramp-generator circuit operatively connected to the pair of resistor arrays; and voltage control lines generated by the differential ramp-generator circuit, wherein the voltage control lines are operatively connected to each of the MOS transistor resistive switches in the pair of resistor arrays. The number of the voltage control lines that are operatively connected to the each of the MOS transistor resistive switches is equal to the number of resistors in a particular resistor array. The differential ramp-generator circuit is preferably operable to take an automatic gain control voltage and generate a series of differential ramp voltages and apply the series of differential ramp voltages to one of the MOS transistor resistive switches.
    • 一个dB线性可变增益放大器,一种创建方法和一个系统,包括放大器; 一对可操作地连接到放大器的电阻器阵列,其中每个电阻器阵列包括MOS晶体管电阻开关; 差分斜坡发生器电路,可操作地连接到所述一对电阻器阵列; 以及由差分斜坡发生器电路产生的电压控制线,其中电压控制线可操作地连接到该对电阻器阵列中的每个MOS晶体管电阻开关。 可操作地连接到每个MOS晶体管电阻开关的电压控制线的数量等于特定电阻器阵列中的电阻器的数量。 差分斜坡发生器电路优选地可操作以获取自动增益控制电压并产生一系列差分斜坡电压,并将一系列差分斜坡电压施加到MOS晶体管电阻开关之一。
    • 18. 发明申请
    • Low power highly linear RF downconverter
    • 低功率高线性RF下变频器
    • US20070218857A1
    • 2007-09-20
    • US11378558
    • 2006-03-17
    • Aly IsmailEdward YoussoufianHassan ElwanFrank Carr
    • Aly IsmailEdward YoussoufianHassan ElwanFrank Carr
    • H04B1/26
    • H03D7/161
    • A technique for downconverting a RF signal comprises an antenna adapted to receive an RF signal; a transconductance amplifier connected to the antenna and adapted to amplify the RF signal; a passive mixer connected to the transconductance amplifier and adapted for current domain mixing of electrical current transferred from the transconductance amplifier; and a load impedance connected to the passive mixer. The load impedance may comprise a parallel combination of a frequency dependent negative resistance component, a capacitor, and a resistor. The load impedance may comprise a pair of complex poles, a pair of imaginary zeros, and a real pole. Voltages at an input and an output of the passive mixer are related such that the input voltage of the passive mixer is an upconverted version of the output voltage of the passive mixer, wherein the input voltage of the passive mixer is at an output of the transconductance amplifier.
    • 用于下变频RF信号的技术包括适于接收RF信号的天线; 连接到天线并适于放大RF信号的跨导放大器; 连接到跨导放大器的无源混频器,适用于从跨导放大器传输的电流的电流域混合; 以及连接到无源混频器的负载阻抗。 负载阻抗可以包括频率依赖负电阻分量,电容器和电阻器的并联组合。 负载阻抗可以包括一对复极点,一对假想零点和实数极点。 无源混频器的输入和输出端的电压与无源混频器的输入电压是无源混频器的输出电压的上变频版本相关,其中无源混频器的输入电压处于跨导输出端 放大器
    • 19. 发明授权
    • Capacitive tuning network for low gain digitally controlled oscillator
    • 用于低增益数字控制振荡器的电容调谐网络
    • US07212073B2
    • 2007-05-01
    • US11049560
    • 2005-02-02
    • Edward YoussoufianAly M. Ismail
    • Edward YoussoufianAly M. Ismail
    • H03L7/099
    • H03L7/0991
    • According to one exemplary embodiment, a digitally controlled oscillator includes a capacitive tuning network, where the capacitive tuning network controls a frequency of an output signal of the digitally controlled oscillator. The capacitive tuning network includes a switched capacitor array, where a change of a first capacitance of the switched capacitor array causes the capacitive tuning network to change by a second capacitance, and where the first capacitance is larger than the second capacitance. According to this exemplary embodiment, the capacitive tuning network further includes a first capacitor coupled in parallel with the switched capacitor array. The first capacitor has a third capacitance, which is larger than the first capacitance. The capacitive tuning network further includes a second capacitor coupled in series with the first capacitor and the switched capacitor array. The second capacitor can have a fourth capacitance, where the third capacitance is larger than the fourth capacitance.
    • 根据一个示例性实施例,数字控制振荡器包括电容调谐网络,其中电容调谐网络控制数字控制振荡器的输出信号的频率。 电容调谐网络包括开关电容器阵列,其中开关电容器阵列的第一电容的改变使得电容调谐网络改变第二电容,并且其中第一电容大于第二电容。 根据该示例性实施例,电容调谐网络还包括与开关电容器阵列并联耦合的第一电容器。 第一电容器具有比第一电容大的第三电容。 电容调谐网络还包括与第一电容器和开关电容器阵列串联耦合的第二电容器。 第二电容器可以具有第四电容,其中第三电容大于第四电容。
    • 20. 发明授权
    • Phase-locked loop based controller for adjusting an adaptive continuous-time filter
    • 基于锁相环的控制器,用于调整自适应连续时间滤波器
    • US08135365B2
    • 2012-03-13
    • US12960183
    • 2010-12-03
    • Edward YoussoufianDavid YatesAly M. IsmailGeoffrey Hatcher
    • Edward YoussoufianDavid YatesAly M. IsmailGeoffrey Hatcher
    • H04B1/10
    • H03H21/0012H03H11/1291H03H2210/021H03H2210/043H03J2200/10
    • A direct conversion radio-frequency (RF) receiver includes a controller and an adaptive continuous-time filter. The adaptive continuous-time filter receives a multiple-bit control signal generated by the controller to adjust a characteristic of the continuous-time filter. The controller generates the multiple-bit control signal in response to process variation in the semiconductor material used to implement the controller and the adaptive continuous-time filter. A method for tuning an adaptive continuous-time filter comprises determining a RC time constant, converting the RC time constant to a digital word, comparing a select bit of the digital word to a respective bit of a predetermined reference word to generate a control bit, applying the control bit to an adjustable element to modify the RC time constant, repeating the determining, converting, comparing and applying steps until the control bits generate an output word and providing the output word to the adaptive continuous-time filter.
    • 直接转换射频(RF)接收机包括控制器和自适应连续时间滤波器。 自适应连续时间滤波器接收由控制器产生的多位控制信号,以调整连续时间滤波器的特性。 响应于用于实现控制器和自适应连续时间滤波器的半导体材料中的工艺变化,控制器产生多位控制信号。 一种用于调整自适应连续时间滤波器的方法包括:确定RC时间常数,将RC时间常数转换为数字字,将数字字的选择位与预定参考字的相应位进行比较以产生控制位, 将控制位应用到可调元件以修改RC时间常数,重复确定,转换,比较和应用步骤,直到控制位产生输出字并将输出字提供给自适应连续时间滤波器。