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    • 12. 发明授权
    • Method and apparatus for the alignment of a femoral knee prosthesis
    • 用于股骨膝关节假体对准的方法和装置
    • US5601566A
    • 1997-02-11
    • US199069
    • 1994-02-22
    • Mark N. DanceMark WardDavid T. Pollock
    • Mark N. DanceMark WardDavid T. Pollock
    • A61F2/38A61B17/15A61B17/56A61B17/58
    • A61B17/155A61B17/154
    • Method and apparatus for determining the direction of the mechanical axis of the femur of a patient in relation to the corresponding knee of the patient in connection with resecting the distal femur for the reception of a femoral knee prothesis include at least partially suspending the patient's leg to locate the knee at a suspended position wherein external forces on the knee, such as the weight of the leg, are balanced and the knee remains essentially stationary at the suspended position, applying a force to the femur at a predetermined location relative to the mechanical axis of the femur, directing the applied force in a direction such that the knee remains undeflected from the suspended position while the force is applied to the femur in that direction, and employing that direction of the applied force to indicate the direction of the mechanical axis of the femur.
    • 用于确定患者的股骨的机械轴线方向和装置相对于患者的相应膝关节切除用于接收股骨膝关节假体的远端股骨的方向和装置包括至少部分地将患者腿部悬挂在 将膝盖定位在悬挂位置,其中膝盖上的外力(例如腿部的重量)是平衡的,并且膝盖基本上在悬挂位置处保持静止,在相对于机械轴线的预定位置向股骨施加力 的股骨的方向,使得施加的力沿着使得膝盖保持未被偏离悬挂位置的方向,同时在该方向上施加力到股骨,并且使用施加的力的方向来指示机械轴的方向 股骨。
    • 17. 发明申请
    • Method for sram bitmap verification
    • sram位图验证方法
    • US20070083834A1
    • 2007-04-12
    • US11246880
    • 2005-10-07
    • David PriceJayashree Kalpathy-CramerMark Ward
    • David PriceJayashree Kalpathy-CramerMark Ward
    • G06F17/50G06F9/45
    • G11C29/04G11C11/41G11C29/56008G11C2029/1806
    • A method for verifying that a physical location of a memory matches a design logical representation, without having to use a focused ion beam to physically damage a memory location. The method provides that either a temporary or permanent circuit “defect” is intentionally created in the physical layout. Then, the new electrical schematic is extracted from the modified physical layout. Subsequently, if the design “defect” which was created is temporary, the new electrical schematic is simulated, the logical address of the “defect” is determined, and the extracted logical address is compared to the expected address to verify the logical to physical correlation. Alternatively, if the design “defect” which was created is permanent, after the new electrical schematic is extracted from the modified physical layout, the product is fabricated and the known design “defect” location is used to correlate to the electrically-tested defect logical location.
    • 用于验证存储器的物理位置与设计逻辑表示相匹配的方法,而不必使用聚焦离子束物理地损坏存储器位置。 该方法提供在物理布局中有意创建临时或永久电路“缺陷”。 然后,从修改的物理布局中提取新的电气原理图。 随后,如果创建的设计“缺陷”是临时的,则模拟新的电气原理图,确定“缺陷”的逻辑地址,并将提取的逻辑地址与预期地址进行比较以验证逻辑与物理相关 。 或者,如果所创建的设计“缺陷”是永久的,则在从修改的物理布局提取新的电气原理图之后,制造产品,并且使用已知的设计“缺陷”位置与电测试的缺陷逻辑 位置。