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11. 发明授权

US06842082B2 Programmable voltage-controlled oscillator with self-calibration feature 有权
标题翻译：具有自校准功能的可编程压控振荡器
公开(公告)号：US06842082B2
公开(公告)日：2005-01-11
申请号：US10452091
申请日：2003-05-30
申请人： Mehmet Ali Tan
发明人： Mehmet Ali Tan
IPC分类号： H03B1/00 , H03K3/03 , H03L7/087 , H03L7/099 , H03B5/04 , H03B5/24 , H03L1/00
CPC分类号： H03K3/0315 , H03L7/087 , H03L7/0998
摘要： A programmable voltage-controlled oscillator includes a ring oscillator having a number of selectable delay stages, and a resistor value detection circuit configurable for coupling to an external resistor. The resistor value detection circuit includes at least one internal resistor and is operative to generate, based at least in part on a value of the external resistor, an output signal indicative of a value of the internal resistor. The output signal is utilizable in controlling an oscillation frequency of the ring oscillator based at least in part on selection of one or more of the selectable delay stages. The voltage-controlled oscillator may be utilized in a phase-locked loop of clock recovery circuit in an integrated circuit, and in numerous other applications.
摘要翻译：可编程压控振荡器包括具有多个可选延迟级的环形振荡器和可配置为耦合到外部电阻器的电阻值检测电路。电阻值检测电路包括至少一个内部电阻器，并且可操作以至少部分地基于外部电阻器的值产生表示内部电阻器的值的输出信号。输出信号可用于至少部分地基于选择一个或多个可选延迟级来控制环形振荡器的振荡频率。压控振荡器可以用于集成电路中的时钟恢复电路的锁相环以及许多其它应用中。

12. 发明授权

US06812797B1 Phase-locked loop with loop select signal based switching between frequency detection and phase detection 有权
标题翻译：锁相环采用环路选择信号进行频率检测和相位检测之间切换
公开(公告)号：US06812797B1
公开(公告)日：2004-11-02
申请号：US10452657
申请日：2003-05-30
申请人： Geert Adolf De Veirman , Mehmet Ali Tan , Xinyu Chen
发明人： Geert Adolf De Veirman , Mehmet Ali Tan , Xinyu Chen
IPC分类号： H03L7087
CPC分类号： H03L7/113 , H03L7/087 , H03L7/0891 , H03L7/14
摘要： A phase-locked loop (PLL) includes at least first and second loops, and loop selection circuitry coupled to the first and second loops, the loop selection circuitry being responsive to at least one loop select signal to control transition from an operating mode of one of the first and second loops to an operating mode of the other of the first and second loops. In an illustrative embodiment, the PLL comprises a dual-loop PLL with the first and second loops corresponding to respective frequency and phase loops, and the loop selection circuitry is configured such that the loop select signal as applied to a control input of a current-generating component of the first loop represents a delayed and inverted version of the loop select signal as applied to a control input of a current-generating component of the second loop.
摘要翻译：锁相环（PLL）包括至少第一和第二环路以及耦合到第一和第二环路的环路选择电路，环路选择电路响应于至少一个环路选择信号以控制从一个操作模式的转换的所述第一和第二回路中的另一个的操作模式。在说明性实施例中，PLL包括双回路PLL，其中第一和第二回路对应于相应的频率和相位回路，并且环路选择电路被配置为使得环路选择信号被施加到电流 - 第一循环的生成部件表示应用于第二回路的电流产生部件的控制输入的循环选择信号的延迟和反转版本。

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