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11. 发明授权

US08786441B2 Radio frequency identification tag 失效
标题翻译：射频识别标签
公开(公告)号：US08786441B2
公开(公告)日：2014-07-22
申请号：US13307023
申请日：2011-11-30
申请人： Yong Suk Yang , In-Kyu You , Jae Bon Koo
发明人： Yong Suk Yang , In-Kyu You , Jae Bon Koo
IPC分类号： G08B13/14 , G01R27/26 , G06K19/07 , G06K19/077 , G06K17/00 , G08B13/24
CPC分类号： G06K19/0723 , G06K17/0029 , G06K19/0725 , G06K19/07773 , G06K19/07788 , G08B13/2434
摘要： Provided is a radio frequency identification (RFID) tag. The RFID tags includes: a conductive layer and a conductive line disposed above and below an insulation layer, respectively; an antenna connected to one end of the conductive line; a resistor connected to the other end of the conductive line; a first conductive plate connected to the conductive line and constituting a first capacitor in conjunction with the conductive layer and the insulation layer; and a first sensing device connected between the conductive line and the conductive layer and having an impedance changed according to a sensing of a first target material.
摘要翻译：提供了射频识别（RFID）标签。 RFID标签包括：分别设置在绝缘层上方和下方的导电层和导电线; 连接到导线的一端的天线; 连接到所述导线的另一端的电阻器; 连接到所述导电线并与所述导电层和所述绝缘层一起构成第一电容器的第一导电板; 以及连接在导电线和导电层之间并具有根据第一目标材料的感测而改变的阻抗的第一感测装置。

12. 发明授权

US08378421B2 Method of manufacturing thin film transistor and thin film transistor substrate 有权
标题翻译：制造薄膜晶体管和薄膜晶体管基板的方法
公开(公告)号：US08378421B2
公开(公告)日：2013-02-19
申请号：US13350037
申请日：2012-01-13
申请人： Jae Bon Koo , In-Kyu You , Seongdeok Ahn , Kyoung Ik Cho
发明人： Jae Bon Koo , In-Kyu You , Seongdeok Ahn , Kyoung Ik Cho
IPC分类号： H01L27/12
CPC分类号： H01L29/78603 , H01L27/1266 , H01L29/66757 , H01L29/78618
摘要： A thin film transistor substrate. The thin film transistor substrate includes a substrate, an adhesive layer on the substrate, and a semiconductor layer having a first doped region, a second doped region and a channel region on the adhesive layer. The thin film transistor substrate further includes a first dielectric layer on the semiconductor layer, a gate electrode overlapping the channel region, a second dielectric layer on the first dielectric layer and the gate electrode, a source electrode disposed on the second insulating layer, and a drain electrode spaced apart from the source electrode on the source electrode. The channel region is disposed between the first doped region and the second doped region, and has a transmittance higher than those of the first doped region and the second doped region.
摘要翻译：薄膜晶体管基板。薄膜晶体管衬底包括衬底，衬底上的粘合剂层，以及在粘合剂层上具有第一掺杂区域，第二掺杂区域和沟道区域的半导体层。薄膜晶体管基板还包括半导体层上的第一介电层，与沟道区重叠的栅极电极，第一介电层上的第二电介质层和栅极电极，设置在第二绝缘层上的源电极和漏电极与源电极上的源电极间隔开。沟道区域设置在第一掺杂区域和第二掺杂区域之间，并且具有高于第一掺杂区域和第二掺杂区域的透射率的透射率。

13. 发明申请

US20110204334A1 ORGANIC THIN FILM TRANSISTOR AND METHOD OF FORMING THE SAME 有权
标题翻译：有机薄膜晶体管及其形成方法
公开(公告)号：US20110204334A1
公开(公告)日：2011-08-25
申请号：US12858868
申请日：2010-08-18
申请人： Kang Dae KIM , In-Kyu You , Jae Bon Koo , Yong Suk Yang , Seung Youl Kang
发明人： Kang Dae KIM , In-Kyu You , Jae Bon Koo , Yong Suk Yang , Seung Youl Kang
IPC分类号： H01L51/10 , H01L51/40
CPC分类号： H01L51/0545 , H01L51/105
摘要： Provided are an organic thin film transistor and a method of forming the same. The method comprises forming a gate electrode on a substrate, forming a gate dielectric, which covers the gate electrode and includes a recess region at an upper portion, on the substrate, forming a source electrode and a drain electrode in the recess region, and forming an organic semiconductor layer between the source electrode and the drain electrode in the recess region.
摘要翻译：提供一种有机薄膜晶体管及其形成方法。该方法包括在衬底上形成栅电极，形成覆盖栅电极并在衬底上包括上部的凹陷区的栅极电介质，在凹陷区域中形成源电极和漏电极，并形成在凹陷区域中的源电极和漏电极之间的有机半导体层。

14. 发明申请

US20100108996A1 COMPOSITION FOR ORGANIC THIN FILM TRANSISTOR, ORGANIC THIN FILM TRANSISTOR FORMED BY USING THE SAME, AND METHOD FOR FORMING THE ORGANIC FILM TRANSISTOR 失效
标题翻译：有机薄膜晶体管的组成，使用其形成的有机薄膜晶体管和形成有机薄膜晶体管的方法
公开(公告)号：US20100108996A1
公开(公告)日：2010-05-06
申请号：US12542226
申请日：2009-08-17
申请人： Yong-Young NOH , Jae Bon Koo , In-Kyu You , Kang-Jun Baeg , Dong-Yu Kim
发明人： Yong-Young NOH , Jae Bon Koo , In-Kyu You , Kang-Jun Baeg , Dong-Yu Kim
IPC分类号： H01L29/12 , H01L21/47 , H01L29/786 , H01B1/12
CPC分类号： H01L51/0558 , C08F8/30 , C08F2810/20 , H01L51/004 , H01L51/0541 , H01L51/0545 , C08F220/30 , C08F220/14
摘要： Provided are a composition for organic thin film transistors including a material including an anthracenyl group and a cross-linker including a maleimide group, an organic thin film transistor formed by using the composition, and a method for manufacturing the same.
摘要翻译：提供了一种有机薄膜晶体管的组合物及其制造方法，该组合物包括含有蒽基的材料和包含马来酰亚胺基团的交联剂，使用该组合物形成的有机薄膜晶体管。

15. 发明授权

US08344366B2 Organic thin film transistor and method of forming the same 有权
标题翻译：有机薄膜晶体管及其形成方法
公开(公告)号：US08344366B2
公开(公告)日：2013-01-01
申请号：US12858868
申请日：2010-08-18
申请人： Kang Dae Kim , In-Kyu You , Jae Bon Koo , Yong Suk Yang , Seung Youl Kang
发明人： Kang Dae Kim , In-Kyu You , Jae Bon Koo , Yong Suk Yang , Seung Youl Kang
IPC分类号： H01L51/10
CPC分类号： H01L51/0545 , H01L51/105
摘要： Provided are an organic thin film transistor and a method of forming the same. The method comprises forming a gate electrode on a substrate, forming a gate dielectric, which covers the gate electrode and includes a recess region at an upper portion, on the substrate, forming a source electrode and a drain electrode in the recess region, and forming an organic semiconductor layer between the source electrode and the drain electrode in the recess region.
摘要翻译：提供一种有机薄膜晶体管及其形成方法。该方法包括在衬底上形成栅电极，形成覆盖栅电极并在衬底上包括上部的凹陷区的栅极电介质，在凹陷区域中形成源电极和漏电极，并形成在凹陷区域中的源电极和漏电极之间的有机半导体层。

16. 发明授权

US08278138B2 Resistive memory device and method of fabricating the same 有权
标题翻译：电阻式存储器件及其制造方法
公开(公告)号：US08278138B2
公开(公告)日：2012-10-02
申请号：US12915495
申请日：2010-10-29
申请人： Yong Suk Yang , In-Kyu You , Jae Bon Koo , Soon Won Jung , Kang Dae Kim , Yong-Young Noh
发明人： Yong Suk Yang , In-Kyu You , Jae Bon Koo , Soon Won Jung , Kang Dae Kim , Yong-Young Noh
IPC分类号： H01L51/40
CPC分类号： G11C13/0007 , G11C13/0009 , G11C13/0011 , G11C13/0014 , G11C13/0016 , H01L45/04 , H01L45/1233 , H01L45/14 , H01L45/1608
摘要： Provided are a resistive memory device and a method of fabricating the same. The resistive memory device comprises an electron channel layer formed by means of a swelling process and an annealing process. Thus, conductive nanoparticles are uniformly dispersed in the electron channel layer to improve reliability of the resistive memory device. According to the method, an electron channel layer is formed by means of a printing process, a swelling process, and an annealing process. Thus, fabrication time is reduced.
摘要翻译：提供了一种电阻式存储器件及其制造方法。电阻式存储器件包括通过膨胀工艺和退火工艺形成的电子通道层。因此，导电纳米粒子均匀分散在电子通道层中，以提高电阻式存储器件的可靠性。根据该方法，通过印刷工艺，溶胀工艺和退火工艺形成电子通道层。因此，制造时间缩短。

17. 发明授权

US08198148B2 Method for manufacturing semiconductor device 有权
标题翻译：制造半导体器件的方法
公开(公告)号：US08198148B2
公开(公告)日：2012-06-12
申请号：US12766953
申请日：2010-04-26
申请人： Jae Bon Koo , Seung Youl Kang , In-Kyu You
发明人： Jae Bon Koo , Seung Youl Kang , In-Kyu You
IPC分类号： H01L21/84
CPC分类号： H01L21/6835 , H01L21/84 , H01L24/83 , H01L24/93 , H01L2221/6835 , H01L2221/68359 , H01L2221/68368 , H01L2224/2919 , H01L2224/83192 , H01L2224/8385 , H01L2924/01005 , H01L2924/01006 , H01L2924/01015 , H01L2924/01023 , H01L2924/01033 , H01L2924/01049 , H01L2924/01051 , H01L2924/01072 , H01L2924/0665 , H01L2924/07802 , H01L2924/00
摘要： Provided is a method for manufacturing a semiconductor device. The method includes: providing a first substrate where an active layer is formed on a buried insulation layer; forming a gate insulation layer on the active layer; forming a gate electrode on the gate insulation layer; forming a source/drain region on the active layer at both sides of the gate electrode; exposing the buried insulation layer around a thin film transistor (TFT) including the gate electrode and the source/drain region; forming an under cut at the bottom of the TFT by partially removing the buried insulation layer; and transferring the TFT on a second substrate.
摘要翻译：提供一种半导体器件的制造方法。该方法包括：提供在掩埋绝缘层上形成有源层的第一衬底; 在有源层上形成栅极绝缘层; 在栅极绝缘层上形成栅电极; 在栅极两侧的有源层上形成源/漏区; 将掩埋绝缘层暴露在包括栅电极和源/漏区的薄膜晶体管（TFT）周围; 通过部分去除掩埋绝缘层在TFT的底部形成底切; 以及在第二基板上转移TFT。

18. 发明申请

US20120139558A1 RADIO FREQUENCY IDENTIFICATION TAG 失效
标题翻译：无线电频率识别标签
公开(公告)号：US20120139558A1
公开(公告)日：2012-06-07
申请号：US13307023
申请日：2011-11-30
申请人： Yong Suk YANG , In-Kyu You , Jae Bon Koo
发明人： Yong Suk YANG , In-Kyu You , Jae Bon Koo
IPC分类号： G01R27/28
CPC分类号： G06K19/0723 , G06K17/0029 , G06K19/0725 , G06K19/07773 , G06K19/07788 , G08B13/2434
摘要： Provided is a radio frequency identification (RFID) tag. The RFID tags includes: a conductive layer and a conductive line disposed above and below an insulation layer, respectively; an antenna connected to one end of the conductive line; a resistor connected to the other end of the conductive line; a first conductive plate connected to the conductive line and constituting a first capacitor in conjunction with the conductive layer and the insulation layer; and a first sensing device connected between the conductive line and the conductive layer and having an impedance changed according to a sensing of a first target material.
摘要翻译：提供了射频识别（RFID）标签。 RFID标签包括：分别设置在绝缘层上方和下方的导电层和导电线; 连接到导线的一端的天线; 连接到所述导线的另一端的电阻器; 连接到所述导电线并与所述导电层和所述绝缘层一起构成第一电容器的第一导电板; 以及连接在导电线和导电层之间并具有根据第一目标材料的感测而改变的阻抗的第一感测装置。

19. 发明申请

US20110094774A1 MULTI-LAYER INTERCONNECTION STRUCTURE MANUFACTURING METHOD THEREOF 有权
标题翻译：多层互连结构制造方法
公开(公告)号：US20110094774A1
公开(公告)日：2011-04-28
申请号：US12684097
申请日：2010-01-07
申请人： Yong Suk YANG , In-Kyu You , Jae Bon Koo , Yong-Young Noh
发明人： Yong Suk YANG , In-Kyu You , Jae Bon Koo , Yong-Young Noh
IPC分类号： H05K1/00 , H05K1/11 , H05K1/09 , H05K3/12 , H05K3/42
CPC分类号： H01L21/4814 , H01L21/4867 , H01L23/49822 , H01L2924/0002 , H05K1/0277 , H05K1/0298 , H05K1/0306 , H05K1/0313 , H05K1/09 , H05K3/105 , H05K3/125 , H05K3/4069 , H05K2203/1105 , H05K2203/125 , Y10T29/49117 , Y10T29/49126 , Y10T29/4913 , Y10T29/49144 , Y10T29/49155 , Y10T29/49165 , H01L2924/00
摘要： Provided are a multi-layer interconnection structure and a manufacturing method thereof. The multi-layer interconnection structure includes a substrate; a first wiring on the substrate; an interlayer insulation layer on the first wiring; a second wiring on the interlayer insulation layer; and a via contact including at least one conductive filament penetrating through the interlayer insulation layer between the second wiring and the first wiring to be electrically connected to the first wiring and the second wiring.
摘要翻译：提供一种多层互连结构及其制造方法。多层互连结构包括基板; 在基板上的第一布线; 第一布线上的层间绝缘层; 层间绝缘层上的第二布线; 以及通孔接触，其包括穿过所述第二布线和所述第一布线之间的所述层间绝缘层的至少一个导电丝，以电连接到所述第一布线和所述第二布线。

20. 发明授权

US08516689B2 Method of making a multi-layer interconnecting structure 有权
标题翻译：制造多层互连结构的方法
公开(公告)号：US08516689B2
公开(公告)日：2013-08-27
申请号：US12684097
申请日：2010-01-07
申请人： Yong Suk Yang , In-Kyu You , Jae Bon Koo , Yong-Young Noh
发明人： Yong Suk Yang , In-Kyu You , Jae Bon Koo , Yong-Young Noh
IPC分类号： H05K3/36
CPC分类号： H01L21/4814 , H01L21/4867 , H01L23/49822 , H01L2924/0002 , H05K1/0277 , H05K1/0298 , H05K1/0306 , H05K1/0313 , H05K1/09 , H05K3/105 , H05K3/125 , H05K3/4069 , H05K2203/1105 , H05K2203/125 , Y10T29/49117 , Y10T29/49126 , Y10T29/4913 , Y10T29/49144 , Y10T29/49155 , Y10T29/49165 , H01L2924/00
摘要： Provided are a multi-layer interconnection structure and a manufacturing method thereof. The multi-layer interconnection structure includes a substrate; a first wiring on the substrate; an interlayer insulation layer on the first wiring; a second wiring on the interlayer insulation layer; and a via contact including at least one conductive filament penetrating through the interlayer insulation layer between the second wiring and the first wiring to be electrically connected to the first wiring and the second wiring.
摘要翻译：提供一种多层互连结构及其制造方法。多层互连结构包括基板; 在基板上的第一布线; 第一布线上的层间绝缘层; 层间绝缘层上的第二布线; 以及通孔接触，其包括穿过所述第二布线和所述第一布线之间的所述层间绝缘层的至少一个导电丝，以电连接到所述第一布线和所述第二布线。

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