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11. 发明申请

US20150041524A1 VACUUM CARRIERS FOR SUBSTRATE BONDING 有权
标题翻译：用于基板结合的真空载体
公开(公告)号：US20150041524A1
公开(公告)日：2015-02-12
申请号：US13959867
申请日：2013-08-06
申请人： International Business Machines Corporation
发明人： Vijayeshwar D. Khanna , Sri M. Sri-Jayantha
IPC分类号： B23K3/08 , B25B11/00
CPC分类号： B23K3/087 , B23K1/0016 , B23K37/0408 , B23K37/0426 , B23K37/0435 , B23K37/0443 , B25B11/005
摘要： A vacuum carrier can be employed to provide a partial vacuum on a back side surface of a substrate thereby holding the substrate flat against a rigid surface of the carrier throughout the duration of a bonding process. The magnitude of vacuum can be optimized to limit the warping of the substrate during and after bonding with another substrate, and to limit the mechanical stress induced in the solder balls during cooling. The vacuum carrier can include a base plate, a seal plate with at least one opening configured to accommodate at least one substrate, and vacuum seal elements configured to create a vacuum environment that pushes the substrate against the base plate when the vacuum carrier is under vacuum. The configuration of the vacuum carrier is chosen to avoid distortion of the substrate due to the vacuum seal elements, while allowing adjustment of the magnitude of the partial vacuum.
摘要翻译：可以使用真空载体来在基板的背面提供部分真空，从而在粘合过程的整个持续时间期间将基板平坦地抵靠载体的刚性表面。可以优化真空的大小以限制在与另一基板接合期间和之后的基板的翘曲，并且限制在冷却期间在焊球中引起的机械应力。真空载体可以包括基板，密封板，其具有构造成容纳至少一个基板的至少一个开口，以及真空密封元件，其构造成当真空载体处于真空下时产生将基板推靠在基板上的真空环境。选择真空载体的构造以避免由于真空密封元件而引起的基板变形，同时允许调整部分真空的大小。

12. 发明申请

US20150000097A1 METHOD AND SYSTEM FOR THERMOMECHANICALLY DECOUPLING HEATSINK 审中-公开
标题翻译：用于热释放热源的方法和系统
公开(公告)号：US20150000097A1
公开(公告)日：2015-01-01
申请号：US14045076
申请日：2013-10-03
申请人： International Business Machines Corporation
发明人： Sri M. Sri-Jayantha , Gerard McVicker , Vijayeshwar D. Khanna
IPC分类号： B23P15/26
CPC分类号： B23P15/26 , H01L23/36 , H01L23/3675 , H01L23/4093 , H01L23/42 , H01L23/4338 , H01L2224/16225 , H01L2224/32225 , H01L2224/73204 , H01L2224/73253 , H01L2924/0002 , H01L2924/15311 , H01L2924/3511 , H05K7/2039 , Y10T29/49826 , H01L2924/00
摘要： A method of mounting a heat sink includes providing a heat sink having a plurality of mounting points, and attaching a plurality of mounting members to the heat sink at the plurality of mounting points, respectively, at least one of a combination of a mounting point of the mounting points and a mounting member of the mounting members being configured so as to have a stiffness in a thermally-induced expansion direction of the heat sink at the respective mounting point which is less than a stiffness in an other direction at the respective mounting point.
摘要翻译：一种安装散热器的方法包括提供具有多个安装点的散热器，以及分别在多个安装点处将多个安装构件附接到散热器，所述多个安装部分中的至少一个安装点的安装点所述安装点和所述安装构件的安装构件被构造成在相应的安装点处具有在所述散热器的热诱发膨胀方向上的刚度，所述刚度在所述相应的安装点处小于在相应安装点处的另一个方向上的刚度。

13. 发明授权

US10276534B2 Reduction of solder interconnect stress 有权
公开(公告)号：US10276534B2
公开(公告)日：2019-04-30
申请号：US15671955
申请日：2017-08-08
申请人： International Business Machines Corporation
发明人： Anson J. Call , Vijayeshwar D. Khanna , David J. Russell , Krishna R. Tunga
IPC分类号： H01L23/48 , H01L23/00 , H01L23/498 , H01L21/48
摘要： A first electrical contact and second contact is upon an interposer and/or upon a processing device. The first contact includes a minor axis and a major axis. The second contact includes diameter axes. The first contact is positioned such that the major axis is generally aligned with the direction of expansion of the interposer and/or the processing device. The first electrical contact may further be positioned within a power/ground or input/output (I/O) region of the interposer and/or processing device. The first electrical contact may further be positioned within a center region that is surrounded by a perimeter region of the interposer and/or the processing device. The dimensions or aspect ratios of major and minor axes of neighboring first electrical contacts within an electrical contact grid may differ relative thereto. Further, the angle of respective major and minor axes of neighboring first electrical contacts within the electrical contact grid may differ relative thereto.

14. 发明授权

US09865557B1 Reduction of solder interconnect stress 有权
公开(公告)号：US09865557B1
公开(公告)日：2018-01-09
申请号：US15251325
申请日：2016-08-30
申请人： International Business Machines Corporation
发明人： Anson J. Call , Vijayeshwar D. Khanna , David J. Russell , Krishna R. Tunga
IPC分类号： H01L21/44 , H01L23/00 , H01L23/498 , H01L21/48
CPC分类号： H01L24/17 , H01L21/4853 , H01L23/49838 , H01L24/16 , H01L2224/16227 , H01L2224/17133 , H01L2924/3512
摘要： An electrical contact upon an interposer and/or upon a processing device includes a minor axis and a major axis. The contact is positioned such that the major axis is generally aligned with the direction of expansion of the interposer and/or the processing device. The electrical contact may further be positioned within a power/ground or input/output (I/O) region of the interposer and/or processing device. The electrical contact may further be positioned within a center region that is surrounded by a perimeter region of the interposer and/or the processing device. The dimensions or aspect ratios of major and minor axes of neighboring electrical contacts within an electrical contact grid may differ relative thereto. Further, the angle of respective major and minor axes of neighboring electrical contacts within the electrical contact grid may differ relative thereto.

15. 发明申请

US20170351783A1 LAMINATE SUBSTRATE THERMAL WARPAGE PREDICTION FOR DESIGNING A LAMINATE SUBSTRATE 审中-公开
公开(公告)号：US20170351783A1
公开(公告)日：2017-12-07
申请号：US15176101
申请日：2016-06-07
申请人： International Business Machines Corporation
发明人： Anson J. Call , Vijayeshwar D. Khanna , David J. Russell , Krishna R. Tunga
IPC分类号： G06F17/50 , G06F17/13
CPC分类号： G06F17/50 , G06F17/5009 , G06F2217/44 , G06F2217/80
摘要： Method of designing a laminate substrate having upper laminate layers and an equal plurality of lower laminate layers including: dividing the laminate substrate into regions having corresponding laminate layer pairs consisting of an upper laminate layer and a lower laminate layer; calculating a net stretching value for each corresponding laminate layer pair in each region to result in net stretching values in each region; summing the net stretching values in each region to result in a net stretching value for each region proportional to a curvature of each local region; calculating a relative out-of-plane displacement for the laminate substrate from the curvature of each local region; calculating a predicted thermal warpage for the laminate substrate; and finalizing a design of the laminate substrate when the predicted thermal warpage is within a predetermined acceptable range.

16. 发明申请

US20150024549A1 ALIGNMENT OF INTEGRATED CIRCUIT CHIP STACK 有权
标题翻译：集成电路芯片堆栈的对齐
公开(公告)号：US20150024549A1
公开(公告)日：2015-01-22
申请号：US13947543
申请日：2013-07-22
申请人： International Business Machines Corporation
发明人： Evan G. Colgan , Steven A. Cordes , Daniel C. Edelstein , Vijayeshwar D. Khanna , Kenneth Latzko , Qinghuang Lin , Peter J. Sorce , Sri M. Sri-Jayantha , Robert L. Wisnieff , Roy R. Yu
IPC分类号： H01L21/50
CPC分类号： H01L21/50 , H01L25/0657 , H01L25/50 , H01L29/0657 , H01L2225/06513 , H01L2225/06593 , H01L2924/0002 , H01L2924/10156 , H01L2924/00
摘要： The present disclosure relates to methods and devices for manufacturing a three-dimensional chip package. A method includes forming a linear groove on an alignment rail, attaching an alignment rod to the linear groove, forming alignment channels on a plurality of integrated circuit chips, and aligning the plurality of integrated circuit chips by stacking the plurality of integrated circuit chips along the alignment rail. Another method includes forming an alignment ridge on an alignment rail, forming alignment channels on a plurality of integrated circuit chips, and aligning the plurality of integrated circuit chips by stacking the plurality of integrated circuit chips along the alignment rail.
摘要翻译：本公开涉及用于制造三维芯片封装的方法和装置。一种方法包括在对准导轨上形成直线槽，将对准杆连接到线性槽，在多个集成电路芯片上形成对准通道，并通过将多个集成电路芯片沿着对准导轨另一种方法包括在对准导轨上形成对准脊，在多个集成电路芯片上形成对准通道，并且通过沿对准导轨堆叠多个集成电路芯片来对准多个集成电路芯片。

17. 发明申请

US20140359995A1 CONSTRAINED DIE ADHESION CURE PROCESS 有权
标题翻译：受约束的粘合固化过程
公开(公告)号：US20140359995A1
公开(公告)日：2014-12-11
申请号：US13910152
申请日：2013-06-05
申请人： International Business Machines Corporation
发明人： Edmund Blackshear , Vijayeshwar D. Khanna , Oswald J. Mantilla
IPC分类号： H01L21/687
CPC分类号： H01L21/687 , H01L21/67092 , H01L24/75 , H01L2224/73204 , H01L2224/75703 , Y10T29/49826 , Y10T29/49998
摘要： A clamping apparatus applies a force to a workpeice during processing. The clamping apparatus includes a base defining a work area configured to receive a joined structure having multiple elements. The base defines a recess in the work area. An adjustable mechanism is configured to releasably couple to the base and apply a adjustable downward force to the joined structure to bend the joined structure downwardly into the recess during a process. A resilient plunger is part of the adjustable mechanism. The resilient plunger extends downwardly from a top plate of the adjustable mechanism, and the resilient plunger is configured to contact a top of a first element of the joined structure to apply the downward force.
摘要翻译：夹紧装置在加工过程中对工件施加力。夹紧装置包括限定被配置为接收具有多个元件的接合结构的工作区域的基座。基座在工作区域中定义了一个凹槽。可调机构构造成可释放地联接到基座并且向接合的结构施加可调节的向下的力，以在接合的结构中将接合的结构向下弯曲到凹部中。弹性柱塞是可调机构的一部分。弹性柱塞从可调节机构的顶板向下延伸，并且弹性柱塞构造成接触连接结构的第一元件的顶部以施加向下的力。

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