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    • 12. 发明申请
    • SYSTEMS, DEVICES AND METHODS INVOLVING DEVICE IDENTIFICATION
    • 涉及设备鉴定的系统,设备和方法
    • US20130234839A1
    • 2013-09-12
    • US13414777
    • 2012-03-08
    • Rodney Owen Williams
    • Rodney Owen Williams
    • G05B11/01
    • G08C19/04H04M1/04
    • Systems, devices and methods involving device identification are provided. In this regard, a representative system includes: a first device having a first power line and a first connector, the first connector being coupled to the first power line; and a second device having a second power line and a second connector, the second connector being coupled to the second power line and sized and shaped to mate with the first connector such that the first device electrically communicates with the second device; the first device being operative to modulate impedance exhibited at the first power line; the second device being operative to detect the modulated impedance and correlate the modulated impedance with an identification of the first device.
    • 提供了涉及设备识别的系统,设备和方法。 在这方面,代表性系统包括:具有第一电力线和第一连接器的第一装置,所述第一连接器耦合到所述第一电力线; 以及具有第二电力线和第二连接器的第二装置,所述第二连接器联接到所述第二电力线并且其尺寸和形状与所述第一连接器配合,使得所述第一装置与所述第二装置电连通; 所述第一装置可操作以调制在所述第一电力线处呈现的阻抗; 第二装置可操作以检测调制阻抗并将调制阻抗与第一装置的识别相关联。
    • 18. 发明授权
    • Fast ramping of control voltage with enhanced resolution
    • 控制电压快速上升,分辨率提高
    • US06353403B1
    • 2002-03-05
    • US09544583
    • 2000-04-06
    • Rodney Owen Williams
    • Rodney Owen Williams
    • H03M166
    • H03L3/00
    • A logic circuit for generating a control voltage includes a ramp DAC and a main DAC. When the control voltage is needed, such as when an associated crystal oscillator is being “turned on,” an input reference voltage is supplied to both the ramp DAC and the main DAC. The ramp DAC generates an output based on the input reference voltage and L supplied control bits for a (preferably short) ramp time period. The output from the ramp DAC is fed to a filter circuit that includes a capacitor to charge the capacitor and the control voltage is generated at least in part from the ramp DAC output as filtered by the capacitor. When the ramp period ends, the state of the input reference voltage is changed and the output from the main DAC, based on the changed input reference voltage and N control bits, is input to the filter. Such a two DAC arrangement allows for a shorter time constant circuit to be employed in association with the ramp DAC and a longer time constant circuit to be employed in association with the main DAC, allowing for quick ramp up of the control voltage.
    • 用于产生控制电压的逻辑电路包括斜坡DAC和主DAC。 当需要控制电压时,例如当相关的晶体振荡器“接通”时,输入参考电压被提供给斜坡DAC和主DAC两者。 斜坡DAC基于输入参考电压和L(提供的)控制位产生一个(优选短的)斜坡时间周期的输出。 来自斜坡DAC的输出被馈送到包括电容器以对电容器充电的滤波器电路,并且至少部分地由电容器滤波的斜坡DAC输出产生控制电压。 当斜坡期结束时,输入参考电压的状态改变,基于改变的输入参考电压和N个控制位的主DAC的输出被输入到滤波器。 这种两个DAC布置允许与斜坡DAC相关联地使用更短的时间常数电路,并且与主DAC相关联地使用更长的时间常数电路,从而允许控制电压的快速上升。