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    • 11. 发明申请
    • Content display system and content display method
    • 内容显示系统和内容显示方式
    • US20110012811A1
    • 2011-01-20
    • US12923573
    • 2010-09-28
    • Akira MiyazakiToru OzakiMasanobu HatanakaHirohisa NaitoTakahiro KiiKazumi KubotaYuji Takahashi
    • Akira MiyazakiToru OzakiMasanobu HatanakaHirohisa NaitoTakahiro KiiKazumi KubotaYuji Takahashi
    • G09G5/00
    • G06F3/1431G09G5/12G09G5/14
    • A display control device includes: a priority order searching unit that searches a priority order management table to retrieve the priority level corresponding to the standby content screen that has stopped being displayed on a display device related to a usage starting operation when the usage starting operation is detected from any of display devices in the standby state; a switch display target designating unit that retrieves display devices displaying standby content screens of lower priority levels than the retrieved standby content screen, and designates a display device as the switch display target that is the display device displaying the standby content screen of the lowest priority level; and a display control unit that causes the designated display device of the switch display target to switchingly display the standby content screen that has stopped being displayed on the display device related to the usage starting operation.
    • 显示控制装置包括:优先级顺序搜索单元,当使用开始操作为使用开始操作时,搜索优先级顺序管理表以检索与使用开始操作相关的显示设备上显示的已停止的待机内容屏幕所对应的优先级 从处于待机状态的任何显示设备检测到; 开关显示目标指定单元,其检索显示比所检索的待机内容屏幕低的优先级别的待机内容屏幕的显示装置,并且将显示装置指定为作为显示最低优先级的待机内容屏幕的显示装置的显示装置 ; 以及显示控制单元,其使所述开关显示对象的指定显示装置切换显示与所述使用开始操作有关的所述显示装置上显示的已停止的待机内容画面。
    • 18. 发明授权
    • Arithmetic-logic operation unit having high-order and low-order
processing sections and selectors for control of carry flag transfer
therebetween
    • 具有高阶和低阶处理部分的算术逻辑运算单元和用于控制它们之间的进位标志传送的选择器
    • US4872131A
    • 1989-10-03
    • US192547
    • 1988-05-11
    • Kazumi KubotaKazushi KobayashiToshihiko Ogura
    • Kazumi KubotaKazushi KobayashiToshihiko Ogura
    • G06F7/00G06F7/50G06F7/507G06F7/57G06F7/76
    • G06F7/57G06F2207/3828
    • Two arithmetic logic units (ALUs) are provided, one a high-order side and another on a low-order side such that data on the high-order side and on low-order side, output from each of a source data register and a destination data register, are respectively supplied to the ALUs to be operated on thereby. There is provided a selector circuit on the output side of the source data register, which selector circuit operates to deliver the data on the high-order side and that on the low-order side from the source data register selectively to the ALU on the high-order side and that on the low-order side according to the operating mode. Carry outputs from each of the ALUs are input to a first selector and one is selected according to the operating mode and stored in a carry flag register. The output of the carry flag register and the carry output of the ALU on the low-order side are input to a second selector whereby one output thereof is selected according to the operating mode and input to the ALU on the high-order side as the carry input thereto, and also, the output of the carry flag register is supplied to the ALU on the low-order side as the carry input thereto.
    • 提供两个算术逻辑单元(ALU),一个位于高阶侧,另一个位于低位侧,使得从源数据寄存器和源数据寄存器中的每一个输出的高阶侧和低位侧的数据 目的地数据寄存器分别提供给要操作的ALU。 在源数据寄存器的输出侧提供选择器电路,该选择器电路用于将高数据侧的数据和从源数据寄存器的低阶侧的数据选择性地传送到ALU的高位 - 根据操作模式在低端侧。 将来自每个ALU的输出输入到第一选择器,并根据操作模式选择一个并存储在进位标志寄存器中。 进位标志寄存器的输出和低位侧的ALU的进位输出被输入到第二选择器,由此根据操作模式选择其一个输出,并将其输入到高阶侧的ALU作为 进位输入,并且进位标志寄存器的输出也作为进位输入提供给低位侧的ALU。