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11. 发明申请

US20090160411A1 FAST VOLTAGE REGULATORS FOR CHARGE PUMPS 有权
标题翻译：充电泵的快速电压调节器
公开(公告)号：US20090160411A1
公开(公告)日：2009-06-25
申请号：US12340571
申请日：2008-12-19
申请人： Hieu Van Tran , Sang Thanh Nguyen , Anh Ly , Hung O. Nguyen , Wingfu Aaron Lau , Nasrin Jaffari , Thuan Trong Vu , Vishal Sarin , Loc B. Hoang
发明人： Hieu Van Tran , Sang Thanh Nguyen , Anh Ly , Hung O. Nguyen , Wingfu Aaron Lau , Nasrin Jaffari , Thuan Trong Vu , Vishal Sarin , Loc B. Hoang
IPC分类号： G05F1/10
CPC分类号： H02M3/07 , G11C5/145 , H02M1/36 , H02M1/44 , Y10T307/50
摘要： A digital multilevel memory system includes a charge pump and a voltage regulator for generating regulated high voltages for various memory operations. The charge pump may include a plurality of boost circuits to boost the output of the charge pump during a fast start up. Afterwards, the boost circuits are disabled to allow the charge pump to generate high voltages without boosting. The boost circuits may be successively enabled to boost the voltage. The boost circuits may be loadless. The voltage regulator may operate in an open loop and may include a resistive divider as a reference voltage for regulating the high voltage from the charge pump. The charge pump may include spread spectrum pump clocking to reduce electromagnetic inference for capacitor or inductor on-chip charge pumping.
摘要翻译：数字多电平存储器系统包括电荷泵和用于产生用于各种存储器操作的调节高电压的电压调节器。电荷泵可以包括多个升压电路，以在快速启动期间升高电荷泵的输出。之后，升压电路被禁止，使电荷泵产生高电压而不加速。升压电路可以被连续地使能以升高电压。升压电路可以是无负载的。电压调节器可以在开环中工作，并且可以包括电阻分压器作为用于调节来自电荷泵的高电压的参考电压。电荷泵可以包括扩频泵时钟，以减少用于电容器或电感器片上电荷泵浦的电磁推理。

12. 发明授权

US07661041B2 Test circuit and method for multilevel cell flash memory 有权
公开(公告)号：US07661041B2
公开(公告)日：2010-02-09
申请号：US11953754
申请日：2007-12-10
申请人： Hieu Van Tran , Anh Ly , Sang Thanh Nguyen , Vishal Sarin , Hung Q. Nguyen , William John Saiki , Loc B. Hoang
发明人： Hieu Van Tran , Anh Ly , Sang Thanh Nguyen , Vishal Sarin , Hung Q. Nguyen , William John Saiki , Loc B. Hoang
IPC分类号： G11C29/00
CPC分类号： G11C11/5621 , G11C16/04 , G11C29/50 , G11C29/50004
摘要： A test device and method may be used to detect voltage, current or signals of a digital multilevel memory cell system or to test operation or performance by applying inputted voltages, currents or signals to the memory cell system.

13. 发明申请

US20090067235A1 Test circuit and method for multilevel cell flash memory 有权
标题翻译：多电平单元闪存的测试电路和方法
公开(公告)号：US20090067235A1
公开(公告)日：2009-03-12
申请号：US11953754
申请日：2007-12-10
申请人： Hieu Van Tran , Anh Ly , Sang Thanh Nguyen , Vishal Sarin , Hung Q. Nguyen , William John Saiki , Loc B. Hoang
发明人： Hieu Van Tran , Anh Ly , Sang Thanh Nguyen , Vishal Sarin , Hung Q. Nguyen , William John Saiki , Loc B. Hoang
IPC分类号： G11C16/00 , G11C29/00 , G11C16/06
CPC分类号： G11C11/5621 , G11C16/04 , G11C29/50 , G11C29/50004
摘要： A test device and method may be used to detect voltage, current or signals of a digital multilevel memory cell system or to test operation or performance by applying inputted voltages, currents or signals to the memory cell system.
摘要翻译：可以使用测试装置和方法来检测数字多电平存储器单元系统的电压，电流或信号，或者通过将输入的电压，电流或信号施加到存储器单元系统来测试操作或性能。

14. 发明授权

US07325177B2 Test circuit and method for multilevel cell flash memory 有权
标题翻译：多电平单元闪存的测试电路和方法
公开(公告)号：US07325177B2
公开(公告)日：2008-01-29
申请号：US10991702
申请日：2004-11-17
申请人： Hieu Van Tran , Anh Ly , Sang Thanh Nguyen , Vishal Sarin , Hung Q. Nguyen , William John Saiki , Loc B. Hoang
发明人： Hieu Van Tran , Anh Ly , Sang Thanh Nguyen , Vishal Sarin , Hung Q. Nguyen , William John Saiki , Loc B. Hoang
IPC分类号： G11C29/00
CPC分类号： G11C11/5621 , G11C16/04 , G11C29/50 , G11C29/50004
摘要： A test circuit is sued to detect voltage, current or signals of a digital multilevel memory cell system or to test operation or performance by applying inputted voltages, currents or signals to the memory cell system.
摘要翻译：检测电路用于检测数字多电平存储单元系统的电压，电流或信号，或者通过将输入的电压，电流或信号施加到存储单元系统来测试操作或性能。

15. 发明授权

US07939892B2 Test circuit and method for multilevel cell flash memory 有权
标题翻译：多电平单元闪存的测试电路和方法
公开(公告)号：US07939892B2
公开(公告)日：2011-05-10
申请号：US12899120
申请日：2010-10-06
申请人： Hieu Van Tran , Anh Ly , Sang Thanh Nguyen , Vishal Sarin , Hung Q. Nguyen , William John Saiki , Loc B. Hoang
发明人： Hieu Van Tran , Anh Ly , Sang Thanh Nguyen , Vishal Sarin , Hung Q. Nguyen , William John Saiki , Loc B. Hoang
IPC分类号： H01L23/62 , H03K5/08
CPC分类号： G11C11/5621 , G11C16/04 , G11C29/50 , G11C29/50004
摘要： A test device and method may be used to detect voltage, current or signals of a digital multilevel memory cell system or to test operation or performance by applying inputted voltages, currents or signals to the memory cell system.
摘要翻译：可以使用测试装置和方法来检测数字多电平存储器单元系统的电压，电流或信号，或者通过将输入的电压，电流或信号施加到存储器单元系统来测试操作或性能。

16. 发明申请

US20100091567A1 Test Circuit and Method for Multilevel Cell Flash Memory 有权
标题翻译：多电平单元闪存的测试电路和方法
公开(公告)号：US20100091567A1
公开(公告)日：2010-04-15
申请号：US12637365
申请日：2009-12-14
申请人： Hieu Van Tran , Anh Ly , Sang Thanh Nguyen , Vishal Sarin , Hung Q. Nguyen , William John Saiki , Loc B. Hoang
发明人： Hieu Van Tran , Anh Ly , Sang Thanh Nguyen , Vishal Sarin , Hung Q. Nguyen , William John Saiki , Loc B. Hoang
IPC分类号： G11C16/04 , G11C29/00 , H03L5/00 , G01R19/00
CPC分类号： G11C11/5621 , G11C16/04 , G11C29/50 , G11C29/50004
摘要： A test device and method may be used to detect voltage, current or signals of a digital multilevel memory cell system or to test operation or performance by applying inputted voltages, currents or signals to the memory cell system.
摘要翻译：可以使用测试装置和方法来检测数字多电平存储器单元系统的电压，电流或信号，或者通过将输入的电压，电流或信号施加到存储器单元系统来测试操作或性能。

17. 发明授权

US07831872B2 Test circuit and method for multilevel cell flash memory 有权
标题翻译：多电平单元闪存的测试电路和方法
公开(公告)号：US07831872B2
公开(公告)日：2010-11-09
申请号：US12637365
申请日：2009-12-14
申请人： Hieu Van Tran , Anh Ly , Sang Thanh Nguyen , Vishal Sarin , Hung Q. Nguyen , William John Saiki , Loc B. Hoang
发明人： Hieu Van Tran , Anh Ly , Sang Thanh Nguyen , Vishal Sarin , Hung Q. Nguyen , William John Saiki , Loc B. Hoang
IPC分类号： G11C29/00
CPC分类号： G11C11/5621 , G11C16/04 , G11C29/50 , G11C29/50004
摘要： A test device and method may be used to detect voltage, current or signals of a digital multilevel memory cell system or to test operation or performance by applying inputted voltages, currents or signals to the memory cell system.
摘要翻译：可以使用测试装置和方法来检测数字多电平存储器单元系统的电压，电流或信号，或者通过将输入的电压，电流或信号施加到存储器单元系统来测试操作或性能。

18. 发明申请

US20110022905A1 Test Circuit and Method for Multilevel Cell Flash Memory 有权
标题翻译：多电平单元闪存的测试电路和方法
公开(公告)号：US20110022905A1
公开(公告)日：2011-01-27
申请号：US12899120
申请日：2010-10-06
申请人： Hieu Van Tran , Anh Ly , Sang Thanh Nguyen , Vishal Sarin , Hung O. Nguyen , William John Saiki , Loc B. Hoang
发明人： Hieu Van Tran , Anh Ly , Sang Thanh Nguyen , Vishal Sarin , Hung O. Nguyen , William John Saiki , Loc B. Hoang
IPC分类号： G11C29/00
CPC分类号： G11C11/5621 , G11C16/04 , G11C29/50 , G11C29/50004
摘要： A test device and method may be used to detect voltage, current or signals of a digital multilevel memory cell system or to test operation or performance by applying inputted voltages, currents or signals to the memory cell system.
摘要翻译：可以使用测试装置和方法来检测数字多电平存储器单元系统的电压，电流或信号，或者通过将输入的电压，电流或信号施加到存储器单元系统来测试操作或性能。

19. 发明申请

US20110169558A1 CHARGE PUMP SYSTEMS AND METHODS 有权
标题翻译：充电泵系统和方法
公开(公告)号：US20110169558A1
公开(公告)日：2011-07-14
申请号：US13070405
申请日：2011-03-23
申请人： Hieu Van Tran , Sang Thanh Nguyen , Nasrin Jaffari , Hung Quoc Nguyen , Anh Ly
发明人： Hieu Van Tran , Sang Thanh Nguyen , Nasrin Jaffari , Hung Quoc Nguyen , Anh Ly
IPC分类号： G05F1/10
CPC分类号： G05F3/02 , H02M3/073 , H02M2001/322
摘要： Digital multilevel memory systems and methods include a charge pump for generating regulated high voltages for various memory operations. The charge pump may include a plurality of pump stages. Aspects of exemplary systems may include charge pumps that performs orderly charging and discharging at low voltage operation conditions. Additional aspects may include features that enable state by state pumping, for example, circuitry that avoids cascaded short circuits among pump stages. Each pump stage may also include circuitry that discharges its nodes, such as via self-discharge through associated pump interconnection(s). Further aspects may also include features that: assist power-up in the various pump stages, double voltage, shift high voltage levels, provide anti-parallel circuit configurations, and/or enable buffering or precharging features, such as self-buffering and self-precharging circuitry.
摘要翻译：数字多电平存储器系统和方法包括用于为各种存储器操作产生调节的高电压的电荷泵。电荷泵可以包括多个泵级。示例性系统的方面可以包括在低电压操作条件下执行有序充电和放电的电荷泵。其他方面可以包括使状态状态泵送的特征，例如避免泵级之间的级联短路的电路。每个泵级还可以包括排放其节点的电路，例如通过相关联的泵互连通过自放电。另外的方面还可以包括以下功能：辅助各个泵级的上电，双电压，高电平移位，提供反并联电路配置和/或实现缓冲或预充电特征，例如自缓冲和自缓冲，预充电电路。

20. 发明授权

US08232833B2 Charge pump systems and methods 有权
标题翻译：电荷泵系统和方法
公开(公告)号：US08232833B2
公开(公告)日：2012-07-31
申请号：US11805765
申请日：2007-05-23
申请人： Hieu Van Tran , Sang Thanh Nguyen , Nasrin Jaffari , Hung Quoc Nguyen , Anh Ly
发明人： Hieu Van Tran , Sang Thanh Nguyen , Nasrin Jaffari , Hung Quoc Nguyen , Anh Ly
IPC分类号： G05F3/24 , H02M3/18
CPC分类号： G05F3/02 , H02M3/073 , H02M2001/322
摘要： Digital multilevel memory systems and methods include a charge pump for generating regulated high voltages for various memory operations. The charge pump may include a plurality of pump stages. Aspects of exemplary systems may include charge pumps that performs orderly charging and discharging at low voltage operation conditions. Additional aspects may include features that enable state by state pumping, for example, circuitry that avoids cascaded short circuits among pump stages. Each pump stage may also include circuitry that discharges its nodes, such as via self-discharge through associated pump interconnection(s). Further aspects may also include features that: assist power-up in the various pump stages, double voltage, shift high voltage levels, provide anti-parallel circuit configurations, and/or enable buffering or precharging features, such as self-buffering and self-precharging circuitry.
摘要翻译：数字多电平存储器系统和方法包括用于为各种存储器操作产生调节的高电压的电荷泵。电荷泵可以包括多个泵级。示例性系统的方面可以包括在低电压操作条件下执行有序充电和放电的电荷泵。其他方面可以包括使状态状态泵送的特征，例如避免泵级之间的级联短路的电路。每个泵级还可以包括排放其节点的电路，例如通过相关联的泵互连通过自放电。另外的方面还可以包括以下功能：辅助各个泵级的上电，双电压，高电平移位，提供反并联电路配置和/或实现缓冲或预充电特征，例如自缓冲和自缓冲，预充电电路。

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