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    • 15. 发明授权
    • Wafer-level package structure of light emitting diode and manufacturing method thereof
    • 发光二极管的晶圆级封装结构及其制造方法
    • US08445919B2
    • 2013-05-21
    • US12708943
    • 2010-02-19
    • Junjie LiWenbin WangQiuhong ZouGuoqing YuWei Wang
    • Junjie LiWenbin WangQiuhong ZouGuoqing YuWei Wang
    • H01L27/15H01L31/12H01L33/00
    • H01L33/62H01L33/486H01L33/60H01L2224/16H01L2933/0033
    • A wafer-level package structure of a light emitting diode and a manufacturing method thereof, and the package structure includes: a die including a first side and a second side opposite to the first side; a first insulating layer on the first side of the die; at least two wires which are arranged on the insulating layer and electrically isolated from each other; bumps which are arranged on the wires and adapted to be electrically connected correspondingly with electrodes of a bare chip of the light emitting diode; at least two discrete lead areas on the second side of the die; and leads in the lead areas, electrically isolated from each other and electrically connected correspondingly with the wires. The invention forms the leads on the second side of the substrate to extract the electrodes of the light emitting diode, that is, the light emitting diode and the leads thereof are located on the two opposite sides of the substrate in the technical solution of the invention, to thereby reduce the area required for the substrate; and the electrodes can be extracted in the subsequent structure of the package without gold wiring to thereby further reduce the volume of the package.
    • 发光二极管的晶片级封装结构及其制造方法,封装结构包括:模具,其包括第一侧和与第一侧相对的第二侧; 在所述模具的第一侧上的第一绝缘层; 布置在绝缘层上并彼此电隔离的至少两根导线; 布置在导线上并适于与发光二极管的裸芯片的电极相对应地电连接的凸块; 在模具的第二面上的至少两个离散引线区域; 并且在引线区域中引线,彼此电隔离并且与导线相应地电连接。 本发明在本发明的技术方案中在基板的第二面上形成引线以提取发光二极管的电极,即发光二极管及其引线位于基板的相对两侧 ,从而减小基板所需的面积; 并且可以在包装的后续结构中提取电极,而不需要金线,从而进一步减小包装的体积。
    • 16. 发明授权
    • WLCSP target and method for forming the same
    • WLCSP目标和形成方法
    • US07795074B2
    • 2010-09-14
    • US12352858
    • 2009-01-13
    • Mingda ShaoGuoqing YuWei WangHanyu LiXiaohua Huang
    • Mingda ShaoGuoqing YuWei WangHanyu LiXiaohua Huang
    • H01L21/44H01L21/48H01L21/50
    • H01L23/3114H01L21/561H01L21/568H01L24/94H01L2924/01033H01L2924/01082H01L2924/14H01L2924/1461H01L2924/00
    • The invention provides a Wafer Level Chip Size Packaging (WLCSP) target and a method for forming it. A WLCSP target is formed by recombining single chips, wafer parts each including two or more chips or half finished packaging targets which have been subjected to at least one previous step of packaging onto a first substrate, or bonding a wafer part which is formed by dicing a whole wafer and includes at least two chips to a second substrate for bonding. Thus, a wafer with a larger size can be packaged through the WLCSP on a WLCSP apparatus with a smaller size while benefiting from the advantages of the WLCSP, the WLCSP apparatus remains applicable within a longer period of time, the cost is lowered, and enterprises may keep up with the development of the market and the increase of the wafer size without having to update the WLCSP apparatus substantially.
    • 本发明提供一种晶片级芯片尺寸封装(WLCSP)靶及其形成方法。 通过将单个芯片,每个包括两个或更多个芯片的半成品包装靶或已经经受至少一个前述包装步骤的半成品封装目标的晶片部分重新组合到第一基板上,或者通过切割形成的晶片部分 整个晶片,并且包括至少两个芯片到第二基板用于结合。 因此,具有较大尺寸的晶片可以通过WLCSP封装在具有较小尺寸的WLCSP装置上,同时受益于WLCSP的优点,WLCSP装置在较长时间内保持适用,成本降低,企业 可以跟上市场的发展和晶片尺寸的增加,而不必基本上更新WLCSP设备。