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11. 发明申请

US20110174774A1 METHOD OF DESCUMMING PATTERNED PHOTORESIST 审中-公开
标题翻译：描绘图案的方法
公开(公告)号：US20110174774A1
公开(公告)日：2011-07-21
申请号：US12690935
申请日：2010-01-21
申请人： Ying-Chih Lin , Pei-Yu Chou , Jiunn-Hsiung Liao , Chih-Wen Feng , Feng-Yi Chang , Shang-Yuan Tsai
发明人： Ying-Chih Lin , Pei-Yu Chou , Jiunn-Hsiung Liao , Chih-Wen Feng , Feng-Yi Chang , Shang-Yuan Tsai
IPC分类号： B44C1/22
CPC分类号： H01L21/0273 , G03F7/40 , H01L21/31138 , H01L21/31144
摘要： A method of descumming a patterned photoresist is provided. First a material layer to be etched is provided. The material layer is covered by a patterned photoresist. Then a descum process is preformed to descum the edge of the patterned photoresist by nitrogen. Finally, the descummed patterned photoresist is used as a mask for etching the material layer.
摘要翻译：提供了一种去除图案化光致抗蚀剂的方法。首先提供待蚀刻的材料层。材料层被图案化的光致抗蚀剂覆盖。然后进行除氧过程以通过氮气除去图案化的光致抗蚀剂的边缘。最后，将除去图案化的光致抗蚀剂用作蚀刻材料层的掩模。

12. 发明申请

US20080153295A1 METHOD OF FABRICATING OPENINGS AND CONTACT HOLES 有权
标题翻译：制作开口和接触孔的方法
公开(公告)号：US20080153295A1
公开(公告)日：2008-06-26
申请号：US12042340
申请日：2008-03-05
申请人： Feng-Yi Chang , Pei-Yu Chou , Jiunn-Hsiung Liao , Chih-Wen Feng , Ying-Chih Lin , Po-Chao Tsao
发明人： Feng-Yi Chang , Pei-Yu Chou , Jiunn-Hsiung Liao , Chih-Wen Feng , Ying-Chih Lin , Po-Chao Tsao
IPC分类号： H01L21/768 , H01L21/311
CPC分类号： H01L21/76802 , H01L21/76831 , H01L21/76897
摘要： A semiconductor substrate having an etch stop layer and at least a dielectric layer disposed from bottom to top is provided. The dielectric layer and the etching stop layer is then patterned to form a plurality of openings exposing the semiconductor substrate. A dielectric thin film is subsequently formed to cover the dielectric layer, the sidewalls of the openings, and the semiconductor substrate. The dielectric thin film disposed on the dielectric layer and the semiconductor substrate is then removed while the dielectric thin film disposed on the sidewalls remains.
摘要翻译：提供具有蚀刻停止层和至少从底部到顶部设置的电介质层的半导体衬底。然后对电介质层和蚀刻停止层进行构图以形成暴露半导体衬底的多个开口。随后形成介电薄膜以覆盖电介质层，开口的侧壁和半导体衬底。然后去除设置在电介质层和半导体衬底上的电介质薄膜，同时保留设置在侧壁上的电介质薄膜。

13. 发明授权

US08236702B2 Method of fabricating openings and contact holes 有权
标题翻译：制造开口和接触孔的方法
公开(公告)号：US08236702B2
公开(公告)日：2012-08-07
申请号：US12042340
申请日：2008-03-05
申请人： Feng-Yi Chang , Pei-Yu Chou , Jiunn-Hsiung Liao , Chih-Wen Feng , Ying-Chih Lin , Po-Chao Tsao
发明人： Feng-Yi Chang , Pei-Yu Chou , Jiunn-Hsiung Liao , Chih-Wen Feng , Ying-Chih Lin , Po-Chao Tsao
IPC分类号： H01L21/302
CPC分类号： H01L21/76802 , H01L21/76831 , H01L21/76897
摘要： A semiconductor substrate having an etch stop layer and at least a dielectric layer disposed from bottom to top is provided. The dielectric layer and the etching stop layer is then patterned to form a plurality of openings exposing the semiconductor substrate. A dielectric thin film is subsequently formed to cover the dielectric layer, the sidewalls of the openings, and the semiconductor substrate. The dielectric thin film disposed on the dielectric layer and the semiconductor substrate is then removed while the dielectric thin film disposed on the sidewalls remains.
摘要翻译：提供具有蚀刻停止层和至少从底部到顶部设置的电介质层的半导体衬底。然后对电介质层和蚀刻停止层进行图案化以形成暴露半导体衬底的多个开口。随后形成介电薄膜以覆盖电介质层，开口的侧壁和半导体衬底。然后去除设置在电介质层和半导体衬底上的电介质薄膜，同时保留设置在侧壁上的电介质薄膜。

14. 发明申请

US20130093062A1 SEMICONDUCTOR STRUCTURE AND PROCESS THEREOF 审中-公开
标题翻译：半导体结构及其工艺
公开(公告)号：US20130093062A1
公开(公告)日：2013-04-18
申请号：US13276306
申请日：2011-10-18
申请人： Ying-Chih Lin , Hsuan-Hsu Chen , Jiunn-Hsiung Liao , Lung-En Kuo
发明人： Ying-Chih Lin , Hsuan-Hsu Chen , Jiunn-Hsiung Liao , Lung-En Kuo
IPC分类号： H01L29/02 , H01L21/302
CPC分类号： H01L21/311 , H01L21/3083 , H01L21/845 , H01L27/1211 , H01L29/66795 , H01L29/7851
摘要： A semiconductor structure includes a substrate, a recess and a material. The recess is located in the substrate, wherein the recess has an upper part and a lower part. The minimum width of the upper part is larger than the maximum width of the lower part. The material is located in the recess.
摘要翻译：半导体结构包括基板，凹部和材料。凹部位于基板中，其中凹部具有上部和下部。上部的最小宽度大于下部的最大宽度。材料位于凹槽中。

15. 发明授权

US08872280B2 Non-planar FET and manufacturing method thereof 有权
标题翻译：非平面FET及其制造方法
公开(公告)号：US08872280B2
公开(公告)日：2014-10-28
申请号：US13562322
申请日：2012-07-31
申请人： Shih-Hung Tsai , Ssu-I Fu , Ying-Tsung Chen , Chih-Wei Chen , Ying-Chih Lin , Chien-Ting Lin , Hsuan-Hsu Chen
发明人： Shih-Hung Tsai , Ssu-I Fu , Ying-Tsung Chen , Chih-Wei Chen , Ying-Chih Lin , Chien-Ting Lin , Hsuan-Hsu Chen
IPC分类号： H01L29/78
CPC分类号： H01L29/66795 , H01L29/51 , H01L29/66818 , H01L29/785
摘要： The present invention provides a non-planar FET which includes a substrate, a fin structure, a sub spacer, a gate, a dielectric layer and a source/drain region. The fin structure is disposed on the substrate. The sub spacer is disposed only on a middle sidewall of the fin structure. The gate is disposed on the fin structure. The dielectric layer is disposed between the fin structure and the gate. The source/drain region is disposed in the fin structure. The present invention further provides a method of forming the same.
摘要翻译：本发明提供一种非平面FET，其包括基板，鳍结构，子间隔物，栅极，电介质层和源极/漏极区域。翅片结构设置在基板上。子间隔件仅设置在翅片结构的中间侧壁上。门设置在翅片结构上。介电层设置在翅片结构和栅极之间。源/漏区设置在鳍结构中。本发明还提供一种形成该方法的方法。

16. 发明授权

US5227519A Production of carboxylic acids from carbonylation of alcohol 失效
标题翻译：从醇的羰基化生产羧酸
公开(公告)号：US5227519A
公开(公告)日：1993-07-13
申请号：US840175
申请日：1992-02-24
申请人： Ying-Chih Lin , Yeong-Cheong Lee
发明人： Ying-Chih Lin , Yeong-Cheong Lee
IPC分类号： C07C51/12
CPC分类号： C07C51/12
摘要： This invention relates to an improved process for synthesizing carboxylic acids by the carbonylation of alcohol. An alcohol such as methanol is reacted with carbon monoxide in a liquid reaction medium containing a rhodium (Rh) catalyst stabilized with an haloacetic acid, especially trifluoroacetic acid (TFAA), along with alkyl iodide such as methyl iodide (MeI) in specified proportions. The present reaction system is not only characterized by unexpectedly high catalyst stability, but also characterized by the high reaction rate for the formation of acetic acid. The improvement resides in the employment of trifluoroacetic acid as the catalyst promoter at a temperature from 180.degree. C. to 200.degree. C. The primary advantage of the catalyst system of this invention is the enhancement of the rate of carbonylation. The other advantage of the catalyst system is that they are readily soluble and thermally stable, making them resistant to deposition.
摘要翻译：本发明涉及通过醇的羰基化合成羧酸的改进方法。醇等甲醇与含有用卤代乙酸特别是三氟乙酸（TFAA）稳定的铑（Rh）催化剂的液体反应介质一起与一氧化碳一起与特定比例的碘代甲烷（MeI）等烷基碘反应。本反应体系不仅具有意想不到的高催化剂稳定性，而且其特征还在于形成乙酸的反应速度高。改进在于在180℃至200℃的温度下使用三氟乙酸作为催化剂促进剂。本发明的催化剂体系的主要优点是提高了羰基化速率。催化剂体系的另一个优点是它们易于溶解和热稳定，使其具有耐沉积性。

17. 发明申请

US20140035066A1 Non-Planar FET and Manufacturing Method Thereof 有权
标题翻译：非平面FET及其制造方法
公开(公告)号：US20140035066A1
公开(公告)日：2014-02-06
申请号：US13562322
申请日：2012-07-31
申请人： Shih-Hung Tsai , Ssu-I Fu , Ying-Tsung Chen , Chih-Wei Chen , Ying-Chih Lin , Chien-Ting Lin , Hsuan-Hsu Chen
发明人： Shih-Hung Tsai , Ssu-I Fu , Ying-Tsung Chen , Chih-Wei Chen , Ying-Chih Lin , Chien-Ting Lin , Hsuan-Hsu Chen
IPC分类号： H01L29/78 , H01L21/336
CPC分类号： H01L29/66795 , H01L29/51 , H01L29/66818 , H01L29/785
摘要： The present invention provides a non-planar FET which includes a substrate, a fin structure, a sub spacer, a gate, a dielectric layer and a source/drain region. The fin structure is disposed on the substrate. The sub spacer is disposed only on a middle sidewall of the fin structure. The gate is disposed on the fin structure. The dielectric layer is disposed between the fin structure and the gate. The source/drain region is disposed in the fin structure. The present invention further provides a method of forming the same.
摘要翻译：本发明提供一种非平面FET，其包括基板，鳍结构，子间隔物，栅极，电介质层和源极/漏极区域。翅片结构设置在基板上。子间隔件仅设置在翅片结构的中间侧壁上。门设置在翅片结构上。介电层设置在翅片结构和栅极之间。源/漏区设置在鳍结构中。本发明还提供一种形成该方法的方法。

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