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11. 发明申请

US20110305082A1 METHODS AND APPARATUS FOR SOFT DATA GENERATION FOR MEMORY DEVICES 有权
标题翻译：用于存储器件的软数据生成的方法和装置
公开(公告)号：US20110305082A1
公开(公告)日：2011-12-15
申请号：US13063888
申请日：2009-09-30
申请人： Erich F. Haratsch , Milos Ivkovic , Victor Krachkovsky , Nenad Miladinovic , Andrei Vityaev , Clifton Williamson , Johnson Yen
发明人： Erich F. Haratsch , Milos Ivkovic , Victor Krachkovsky , Nenad Miladinovic , Andrei Vityaev , Clifton Williamson , Johnson Yen
IPC分类号： G11C16/04
CPC分类号： G11C16/26 , G06F11/1012 , G06F11/1068 , G06F12/0246 , G06F2212/1032 , G06F2212/2022 , G11C7/02 , G11C7/04 , G11C11/16 , G11C11/5642 , G11C16/0483 , G11C16/3418 , G11C2211/5634
摘要： Methods and apparatus are provided for soft data generation for memory devices. At least one soft data value is generated for a memory device, by obtaining at least one hard read value; and generating the soft data value associated with the at least one hard read value based on statistics for reading the hard read value. The hard read value may be one or more of data bits, voltage levels, current levels and resistance levels. The generated soft data value may be one or more of (i) a soft read value that is used to generate one or more log likelihood ratios, and (ii) one or more log likelihood ratios. The statistics comprise one or more of bit-based statistics and cell-based statistics. The statistics may also optionally comprise pattern-dependent disturbance of at least one aggressor cell on the target cell, as well as location-specific statistics. At least one soft data value can be generated for a memory device, by obtaining a soft read value; and generating the soft data value associated with the soft read value based on statistics for reading the soft read value, wherein the statistics comprise one or more of location-specific statistics and pattern-dependent statistics.
摘要翻译：提供了用于存储器件的软数据生成的方法和装置。通过获得至少一个硬读取值，为存储器件生成至少一个软数据值; 以及基于用于读取硬读取值的统计量来生成与所述至少一个硬读取值相关联的软数据值。硬读取值可以是数据位，电压电平，电流电平和电阻电平中的一个或多个。所产生的软数据值可以是（i）用于产生一个或多个对数似然比的软读取值的一个或多个，以及（ii）一个或多个对数似然比。统计信息包括基于位的统计信息和基于单元的统计信息中的一个或多个。统计还可以任选地包括目标小区上的至少一个攻击者小区的模式相关干扰，以及位置特定统计。可以通过获得软读取值来为存储器件生成至少一个软数据值; 以及基于用于读取所述软读取值的统计信息来生成与所述软读取值相关联的软数据值，其中所述统计信息包括位置特定统计信息和模式相关统计信息中的一个或多个。

12. 发明申请

US20110225350A1 Methods and Apparatus for Soft Data Generation for Memory Devices Based Using Reference Cells 有权
标题翻译：基于参考单元的存储器件的软数据生成方法与装置
公开(公告)号：US20110225350A1
公开(公告)日：2011-09-15
申请号：US13063895
申请日：2009-09-30
申请人： Harley F. Burger, JR. , Erich F. Haratsch , Milos Ivkovic , Victor Krachkovsky , Nenad Miladinovic , Andrei Vityaev , Johnson Yen
发明人： Harley F. Burger, JR. , Erich F. Haratsch , Milos Ivkovic , Victor Krachkovsky , Nenad Miladinovic , Andrei Vityaev , Johnson Yen
IPC分类号： G06F12/02
CPC分类号： G11C16/26 , G06F11/1012 , G06F11/1068 , G06F12/0246 , G06F2212/1032 , G06F2212/2022 , G11C7/02 , G11C7/04 , G11C11/16 , G11C11/5642 , G11C16/0483 , G11C16/3418 , G11C2211/5634
摘要： Methods and apparatus are provided for soft data generation for memory devices using reference cells. At least one soft data value is generated in a memory device by writing a known data to one or more reference cells; reading one or more of the reference cells; obtaining a read statistic based on the read one or more reference cells; and obtaining the at least one soft data value based on the obtained read statistic. The read statistics can optionally be obtained for one or more desired locations of a memory array; or for a given pattern, PATT, in one or more aggressor cells. The read statistic can optionally comprise asymmetric statistics obtained for a plurality of possible values.
摘要翻译：提供了用于使用参考单元的存储器件的软数据生成的方法和装置。通过将已知数据写入一个或多个参考单元，在存储器件中产生至少一个软数据值; 读取一个或多个参考细胞; 基于读取的一个或多个参考单元获得读取统计量; 以及基于获得的读取统计量获得所述至少一个软数据值。可以可选地为存储器阵列的一个或多个所需位置获得读取统计; 或者对于一个或多个侵略者细胞中的给定模式PATT。读取统计可以可选地包括为多个可能值获得的不对称统计量。

13. 发明申请

US20110145487A1 Methods and Apparatus for Soft Demapping and Intercell Interference Mitigation in Flash Memories 有权
标题翻译：闪存中软显示和间间干扰减轻的方法和装置
公开(公告)号：US20110145487A1
公开(公告)日：2011-06-16
申请号：US13001317
申请日：2009-06-30
申请人： Erich F. Haratsch , Milos Ivkovic , Victor Krachkovsky , Nenad Miladinovic , Andrei Vityaev , Johnson Yen
发明人： Erich F. Haratsch , Milos Ivkovic , Victor Krachkovsky , Nenad Miladinovic , Andrei Vityaev , Johnson Yen
IPC分类号： G06F12/02
CPC分类号： G11C16/3427 , G06F11/1072 , G11C5/00 , G11C7/02 , G11C7/1006 , G11C11/5628 , G11C11/5642 , G11C16/10 , G11C16/3418
摘要： Methods and apparatus are provided for soft demapping and intercell interference mitigation in flash memories. In one variation, a target cell in a flash memory device capable of storing at least two data levels, s, per cell is read by obtaining a measured read value, r, for at least one target cell in the flash memory; obtaining a value, h, representing data stored for at least one aggressor cell in the flash memory; selecting one or more probability density functions based on a pattern of values stored in at least a portion of the flash memory, wherein the probability density functions comprises pattern-dependent disturbance of one or more aggressor cells on the at least one target cell in the flash memory; evaluating at least one selected probability density function based on the measured read value, r; and computing one or more log likelihood ratios based on a result of the evaluating step.
摘要翻译：提供了用于闪存中的软解映射和小区间干扰减轻的方法和装置。在一个实施例中，通过为闪速存储器中的至少一个目标单元获得测量的读取值r来读取能够存储每个单元的至少两个数据电平s的闪速存储器件中的目标单元; 获得表示对闪速存储器中的至少一个侵略者单元存储的数据的值h; 基于存储在所述闪速存储器的至少一部分中的值的模式来选择一个或多个概率密度函数，其中所述概率密度函数包括所述闪存中的所述至少一个目标小区上的一个或多个攻击者小区的模式相关干扰记忆; 基于测量的读取值r来评估至少一个所选择的概率密度函数; 以及基于所述评估步骤的结果计算一个或多个对数似然比。

14. 发明申请

US20110141815A1 Methods and Apparatus for Read-Side Intercell Interference Mitigation in Flash Memories 有权
标题翻译：闪存中读取端间干扰减轻的方法和装置
公开(公告)号：US20110141815A1
公开(公告)日：2011-06-16
申请号：US13001278
申请日：2009-06-30
申请人： Erich F. Haratsch , Milos Ivkovic , Victor Krachkovsky , Nenad Miladinovic , Andrei Vityaev , Johnson Yen
发明人： Erich F. Haratsch , Milos Ivkovic , Victor Krachkovsky , Nenad Miladinovic , Andrei Vityaev , Johnson Yen
IPC分类号： G11C16/26
CPC分类号： G11C16/3427 , G06F11/1072 , G11C5/00 , G11C7/02 , G11C7/1006 , G11C11/5628 , G11C11/5642 , G11C16/10 , G11C16/3418
摘要： Methods and apparatus are provided for read-side intercell interference mitigation in flash memories, A flash memory device is read by obtaining a read value for at least one target cell; obtaining a value representing a voltage stored in at least one aggressor cell that was programmed after the target cell; determining intercell interference for the target cell from the at least one aggressor cell; and obtaining a new read value that compensates for the intercell interference by removing the determined intercell interference from the read value for the at least one target cell. The new read value can optionally be provided to a decoder. In an iterative implementation, one or more intercell interference mitigation parameters can be adjusted if a decoding error occurs.
摘要翻译：提供了用于闪速存储器中的读侧细胞间干扰减轻的方法和装置。通过获得至少一个目标单元的读取值来读取闪速存储器件; 获得代表在目标小区之后编程的至少一个攻击者小区中存储的电压的值; 从所述至少一个侵略者小区确定所述目标小区的小区间干扰; 以及通过从所述至少一个目标小区的读取值中去除所确定的小区间干扰来获得补偿小区间干扰的新的读取值。可以可选地将新的读取值提供给解码器。在迭代实现中，如果发生解码错误，则可以调整一个或多个小区间干扰减轻参数。

15. 发明申请

US20110216586A1 Methods And Apparatus For Intercell Interference Mitigation Using Modulation Coding 有权
标题翻译：使用调制编码的小区间干扰减轻的方法和装置
公开(公告)号：US20110216586A1
公开(公告)日：2011-09-08
申请号：US13001310
申请日：2009-06-30
申请人： Nils Graef , Erich F. Haratsch , Milos Ivkovic , Victor Krachkovsky , Andrei Vityaev , Johnson Yen
发明人： Nils Graef , Erich F. Haratsch , Milos Ivkovic , Victor Krachkovsky , Andrei Vityaev , Johnson Yen
IPC分类号： G11C16/12 , G11C16/04 , G11C16/26
CPC分类号： G11C16/3427 , G06F11/1072 , G11C5/00 , G11C7/02 , G11C7/1006 , G11C11/5628 , G11C11/5642 , G11C16/10 , G11C16/3418
摘要： Methods and apparatus are provided for intercell interference mitigation using modulation coding. During programming of a flash memory, a modulation encoding is performed that selects one or more levels for programming the flash memory such that a reduced number of cells in the flash memory are programmed with a value that violates one or more predefined criteria. During a reading of a flash memory, a modulation decoding is performed that assigns one or more levels to cells in the flash memory such that a reduced number of cells in the flash memory are read with a value that violates one or more predefined criteria. The predefined criteria can be based, for example, on one or more of an amount of disturbance caused by the programmed cell; a voltage shift of a programmed cell: a voltage stored by a programmed cell; an amount of change in current through a programmed cell; and an amount of current through a programmed cell.
摘要翻译：提供了使用调制编码的小区间干扰减轻的方法和装置。在闪速存储器的编程期间，执行调制编码，其选择用于编程闪速存储器的一个或多个级别，使得闪存中的减少数量的单元被编程为具有违反一个或多个预定标准的值。在读取闪速存储器期间，执行调制解码，其向闪存中的单元分配一个或多个电平，使得闪存中的单元数目减少，其值违反一个或多个预定准则。预定义的标准可以例如基于由编程的小区引起的干扰量的一个或多个; 编程单元的电压偏移：由编程单元存储的电压; 通过编程单元的电流变化量; 以及通过编程单元的电流量。

16. 发明授权

US08797795B2 Methods and apparatus for intercell interference mitigation using modulation coding 有权
标题翻译：使用调制编码的小区间干扰减轻的方法和装置
公开(公告)号：US08797795B2
公开(公告)日：2014-08-05
申请号：US13001310
申请日：2009-06-30
申请人： Nils Graef , Erich F. Haratsch , Milos Ivkovic , Victor Krachkovsky , Andrei Vityaev , Johnson Yen
发明人： Nils Graef , Erich F. Haratsch , Milos Ivkovic , Victor Krachkovsky , Andrei Vityaev , Johnson Yen
IPC分类号： G11C16/04
CPC分类号： G11C16/3427 , G06F11/1072 , G11C5/00 , G11C7/02 , G11C7/1006 , G11C11/5628 , G11C11/5642 , G11C16/10 , G11C16/3418
摘要： Methods and apparatus are provided for intercell interference mitigation using modulation coding. During programming of a flash memory, a modulation encoding is performed that selects one or more levels for programming the flash memory such that a reduced number of cells in the flash memory are programmed with a value that violates one or more predefined criteria. During a reading of a flash memory, a modulation decoding is performed that assigns one or more levels to cells in the flash memory such that a reduced number of cells in the flash memory are read with a value that violates one or more predefined criteria. The predefined criteria can be based, for example, on one or more of an amount of disturbance caused by the programmed cell; a voltage shift of a programmed cell: a voltage stored by a programmed cell; an amount of change in current through a programmed cell; and an amount of current through a programmed cell.
摘要翻译：提供了使用调制编码的小区间干扰减轻的方法和装置。在闪速存储器的编程期间，执行调制编码，其选择用于编程闪速存储器的一个或多个级别，使得闪存中的减少数量的单元被编程为具有违反一个或多个预定标准的值。在读取闪速存储器期间，执行调制解码，其将一个或多个级别分配给闪速存储器中的单元，使得闪存中的小数量的单元以违反一个或多个预定准则的值被读取。预定义的标准可以例如基于由编程的小区引起的干扰量的一个或多个; 编程单元的电压偏移：由编程单元存储的电压; 通过编程单元的电流变化量; 以及通过编程单元的电流量。

17. 发明授权

US08724381B2 Methods and apparatus for storing data in a multi-level cell flash memory device with cross-page sectors, multi-page coding and per-page coding 有权
标题翻译：用于在具有跨页扇区，多页编码和每页编码的多级单元闪存设备中存储数据的方法和装置
公开(公告)号：US08724381B2
公开(公告)日：2014-05-13
申请号：US12920407
申请日：2009-03-11
申请人： Harley F. Burger, Jr. , Erich F. Haratsch , Milos Ivkovic , Victor Krachkovsky , Andrei Vityaev , Clifton Williamson , Johnson Yen
发明人： Harley F. Burger, Jr. , Erich F. Haratsch , Milos Ivkovic , Victor Krachkovsky , Andrei Vityaev , Clifton Williamson , Johnson Yen
IPC分类号： G11C11/34
CPC分类号： G11C16/08 , G06F11/1072 , G11C11/5628 , G11C11/5642 , G11C16/06 , G11C16/10
摘要： Methods and apparatus are provided for storing data in a multi-level cell flash memory device with cross-page sectors, multi-page coding and per-page coding. A single sector can be stored across a plurality of pages in the flash memory device. Per-page control is provided of the number of sectors in each page, as well the code and/or code rate used for encoding and decoding a given page, and the decoder or decoding algorithm used for decoding a given page. Multi-page and wordline level access schemes are also provided.
摘要翻译：提供了用于将数据存储在具有跨页扇区，多页编码和每页编码的多级单元闪存设备中的方法和装置。可以在闪存设备中的多个页面上存储单个扇区。提供每个页面中的扇区数目的页面控制，以及用于对给定页面进行编码和解码的代码和/或代码率，以及用于对给定页面进行解码的解码器或解码算法。还提供了多页和字线级访问方案。

18. 发明申请

US20110090734A1 METHODS AND APPARATUS FOR STORING DATA IN A MULTI-LEVEL CELL FLASH MEMORY DEVICE WITH CROSS-PAGE SECTORS, MULTI-PAGE CODING AND PER-PAGE CODING 有权
标题翻译：用于在具有跨页面的多级电池存储器件中存储数据的方法和装置，多页编码和每页编码
公开(公告)号：US20110090734A1
公开(公告)日：2011-04-21
申请号：US12920407
申请日：2009-03-11
申请人： Harley F. Burger, JR. , Erich F. Haratsch , Milos Ivkovic , Victor Krachkovsky , Andrei Vityaev , Clifton Williamson , Johnson Yen
发明人： Harley F. Burger, JR. , Erich F. Haratsch , Milos Ivkovic , Victor Krachkovsky , Andrei Vityaev , Clifton Williamson , Johnson Yen
IPC分类号： G11C16/04
CPC分类号： G11C16/08 , G06F11/1072 , G11C11/5628 , G11C11/5642 , G11C16/06 , G11C16/10
摘要： Methods and apparatus are provided for storing data in a multi-level cell flash memory device with cross-page sectors, multi-page coding and per-page coding. A single sector can be stored across a plurality of pages in the flash memory device. Per-page control is provided of the number of sectors in each page, as well the code and/or code rate used for encoding and decoding a given page, and the decoder or decoding algorithm used for decoding a given page. Multi-page and wordline level access schemes are also provided.
摘要翻译：提供了用于将数据存储在具有跨页扇区，多页编码和每页编码的多级单元闪存设备中的方法和装置。可以在闪存设备中的多个页面上存储单个扇区。提供每个页面中的扇区数目的页面控制，以及用于对给定页面进行编码和解码的代码和/或代码率，以及用于对给定页面进行解码的解码器或解码算法。还提供了多页和字线级访问方案。

19. 发明申请

US20120124118A1 Systems and Methods for Variance Dependent Normalization for Branch Metric Calculation 有权
标题翻译：用于分支度量计算的方差相关标准化的系统和方法
公开(公告)号：US20120124118A1
公开(公告)日：2012-05-17
申请号：US12947947
申请日：2010-11-17
申请人： Milos Ivkovic , Shaohua Yang
发明人： Milos Ivkovic , Shaohua Yang
IPC分类号： G06F17/10
CPC分类号： H04L25/03299 , H04L25/03993
摘要： Various embodiments of the present invention provide systems and methods for data processing. As an example, a data processing circuit is disclosed that includes: a noise predictive filter circuit, a scaling factor adaptation circuit, and a scaling factor application circuit. The noise predictive filter circuit is operable to perform a noise predictive filtering process on a data input based on a filter tap to yield a noise filtered output. The scaling factor adaptation circuit is operable to calculate a scaling factor based at least in part on a derivative of the noise filtered output. The scaling factor application circuit is operable to apply the scaling factor to scale the noise filtered output.
摘要翻译：本发明的各种实施例提供了用于数据处理的系统和方法。作为示例，公开了一种数据处理电路，其包括：噪声预测滤波器电路，比例因子适配电路和缩放因子应用电路。噪声预测滤波器电路可操作以对基于滤波器抽头的数据输入执行噪声预测滤波处理，以产生噪声滤波输出。缩放因子适配电路可用于至少部分地基于噪声滤波输出的导数来计算缩放因子。缩放因子应用电路可操作以应用缩放因子来缩放噪声滤波的输出。

20. 发明授权

US08418019B2 Systems and methods for dynamic scaling in a data decoding system 有权
标题翻译：用于数据解码系统中动态缩放的系统和方法
公开(公告)号：US08418019B2
公开(公告)日：2013-04-09
申请号：US12763050
申请日：2010-04-19
申请人： Milos Ivkovic , Shaohua Yang
发明人： Milos Ivkovic , Shaohua Yang
IPC分类号： H03M13/00
CPC分类号： G06F9/30007 , H03M13/1105 , H03M13/6577 , H03M13/658 , H03M13/6591
摘要： Various embodiments of the present invention provide systems and methods for data processing. As an example, a data processing circuit is disclosed that includes a decoder circuit and a scalar circuit. The decoder circuit is operable to perform a data decoding algorithm by processing at least one decoder message, and the scalar circuit is operable to multiply the decoder message by a variable scalar value.
摘要翻译：本发明的各种实施例提供了用于数据处理的系统和方法。作为示例，公开了包括解码器电路和标量电路的数据处理电路。解码器电路可操作以通过处理至少一个解码器消息来执行数据解码算法，并且标量电路可操作以将解码器消息乘以可变标量值。

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