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11. 发明申请

US20060271938A1 Memory mapped lazy preemption control 有权
标题翻译：内存映射懒惰抢占控制
公开(公告)号：US20060271938A1
公开(公告)日：2006-11-30
申请号：US11139840
申请日：2005-05-26
申请人： Paul Gootherts , Douglas Larson
发明人： Paul Gootherts , Douglas Larson
IPC分类号： G06F9/46
CPC分类号： G06F9/461
摘要： In an embodiment of the invention, a method for a memory-mapped lazy preemption control, the method includes: incrementing a counter value if an operating system attempts to involuntarily context switch out a thread and fails to context switch out the thread because the thread has a flag set; checking a counter value to determine a degree of abusiveness of a thread; and based upon the degree of abusiveness, determining if a voluntary contact switch out should be performed or should not be performed on the thread.
摘要翻译：在本发明的一个实施例中，一种用于存储器映射的懒惰抢占控制的方法，所述方法包括：如果操作系统试图不经意地上下文切换线程并且不能上下文切换线程，则递增计数器值，因为线程具有一个标志集检查计数器值以确定线程的滥用程度; 并且基于滥用程度，确定是否应该执行自愿接触切换或不应该在线程上执行。

12. 发明申请

US20060047990A1 System and method for data storage and transfer between two clock domains 审中-公开
标题翻译：两个时钟域之间的数据存储和传输的系统和方法
公开(公告)号：US20060047990A1
公开(公告)日：2006-03-02
申请号：US10933074
申请日：2004-09-01
申请人： Ralph James , Douglas Larson
发明人： Ralph James , Douglas Larson
IPC分类号： G06F1/12
CPC分类号： G06F1/12
摘要： In a memory hub system, several daisy-chained memory hubs are connected to a single memory controller. The memory hub transmitters and receivers operate in a high-speed clock domain, while the logic cores of the memory hubs operate in a low-speed clock domain. A clock domain interface advantageously provides data storage and transfer between the two clock domains without stalling the logic in the low-speed clock domain and without interrupting data movement in the high-speed clock domain.
摘要翻译：在存储器集线器系统中，几个菊花链存储器集线器连接到单个存储器控制器。存储器集线器发射器和接收器以高速时钟域工作，而存储器集线器的逻辑核心以低速时钟域工作。时钟域接口有利地在两个时钟域之间提供数据存储和传输，而不会使低速时钟域中的逻辑失速，而不会中断高速时钟域中的数据移动。

13. 发明申请

US20050177695A1 Apparatus and method for data bypass for a bi-directional data bus in a hub-based memory sub-system 有权
标题翻译：用于基于集线器的存储器子系统中的双向数据总线的数据旁路的装置和方法
公开(公告)号：US20050177695A1
公开(公告)日：2005-08-11
申请号：US10773583
申请日：2004-02-05
申请人： Douglas Larson , Jeffrey Cronin
发明人： Douglas Larson , Jeffrey Cronin
IPC分类号： G06F12/00 , G06F13/16
CPC分类号： G06F13/28 , G06F12/0888 , G06F13/161
摘要： A memory hub includes first and second link interfaces for coupling to respective data busses, a data path coupled to the first and second link interfaces and through which data is transferred between the first and second link interfaces, and further includes a write bypass circuit coupled to the data path to couple write data on the data path and temporarily store the write data to allow read data to be transferred through the data path while the write data is temporarily stored. A method for writing data to a memory location in a memory system is provided which includes accessing read data in the memory system, providing write data to the memory system, and coupling the write data to a register for temporary storage. The write data is recoupled to the memory bus and written to the memory location following provision of the read data.
摘要翻译：存储器集线器包括用于耦合到相应的数据总线的第一和第二链路接口，耦合到第一和第二链路接口的数据路径，以及数据在第一和第二链路接口之间传送的数据路径，并且还包括写入旁路电路，将数据路径耦合到数据路径上的数据路径，并临时存储写入数据，以允许在暂时存储写入数据时通过数据路径传送读取数据。提供了一种将数据写入存储器系统中的存储器位置的方法，其包括访问存储器系统中的读取数据，向存储器系统提供写入数据，以及将写入数据耦合到寄存器以进行临时存储。在提供读取的数据之后，将写入数据重新耦合到存储器总线并写入存储器位置。

14. 发明授权

US07765550B2 System for controlling context switch of deferred requests using counter and flag setting of thread accessing shared resource or entering code region 有权
标题翻译：使用计数器控制延迟请求的上下文切换的系统，线程访问共享资源或输入代码区域的标志设置
公开(公告)号：US07765550B2
公开(公告)日：2010-07-27
申请号：US11139840
申请日：2005-05-26
申请人： Paul Gootherts , Douglas Larson
发明人： Paul Gootherts , Douglas Larson
IPC分类号： G06F9/46 , G06F12/00 , G06F13/24 , G06F7/38
CPC分类号： G06F9/461
摘要： In an embodiment of the invention, a method for a memory-mapped lazy preemption control, the method includes: incrementing a counter value if an operating system attempts to involuntarily context switch out a thread and fails to context switch out the thread because the thread has a flag set; checking a counter value to determine a degree of abusiveness of a thread; and based upon the degree of abusiveness, determining if a voluntary contact switch out should be performed or should not be performed on the thread.
摘要翻译：在本发明的一个实施例中，一种用于存储器映射的懒惰抢占控制的方法，所述方法包括：如果操作系统试图不经意地上下文切换线程并且不能上下文切换线程，则递增计数器值，因为线程具有一个标志集检查计数器值以确定线程的滥用程度; 并且基于滥用程度，确定是否应该执行自愿接触切换或不应该在线程上执行。

15. 发明申请

US20080098180A1 PROCESSOR ACQUISITION OF OWNERSHIP OF ACCESS COORDINATOR FOR SHARED RESOURCE 有权
标题翻译：处理者收购共享资源的访问协调人所有权
公开(公告)号：US20080098180A1
公开(公告)日：2008-04-24
申请号：US11552103
申请日：2006-10-23
申请人： Douglas Larson , Robert Johnson
发明人： Douglas Larson , Robert Johnson
IPC分类号： G06F12/14
CPC分类号： G06F15/16
摘要： A processor of an apparatus in an example upon a failure of an earlier attempt to directly acquire ownership of an access coordinator for a resource shared with one or more additional processors, locally determines an amount to delay a later attempt to directly acquire ownership of the access coordinator. Upon a failure of the later and/or a subsequent attempt to directly acquire ownership of the access coordinator the processor would enter into an indirect waiting arrangement for ownership of the access coordinator.
摘要翻译：在以前尝试直接获取与一个或多个附加处理器共享的资源的访问协调器的所有权的情况下的示例中的设备的处理器本地地确定延迟稍后尝试直接获取所述访问的所有权的量协调员在以后和/或随后的直接取得访问协调者的所有权的尝试中，处理器将进入用于访问协调器的所有权的间接等待安排。

16. 发明申请

US20060155954A1 Selective macro event recording 有权
公开(公告)号：US20060155954A1
公开(公告)日：2006-07-13
申请号：US11032822
申请日：2005-01-10
申请人： Thomas Haynes , Douglas Larson , Srinivasan Muralidharan , Ki Park , Shirish Amin , Robin Yehle
发明人： Thomas Haynes , Douglas Larson , Srinivasan Muralidharan , Ki Park , Shirish Amin , Robin Yehle
IPC分类号： G06F15/76
CPC分类号： G06F9/542 , G06F2209/545
摘要： A method, system and apparatus for selective macro event recording. In accordance with the present invention, events can be selectively included in a macro recording process, even where the events occur across different contexts such as different application windows in different applications. Specifically, once a macro recording session has been initiated for a particular application or application window, events occurring in different applications or application windows can be selected for inclusion in the macro through an append recording operation. Notably, the selective macro recording facility can be included as part of an operating environment, or as part of the individual applications executing within the operating environment.

17. 发明授权

US06804620B1 Calibration method for system performance validation of automatic test equipment 失效
标题翻译：自动测试设备系统性能验证的校准方法
公开(公告)号：US06804620B1
公开(公告)日：2004-10-12
申请号：US10393876
申请日：2003-03-21
申请人： Douglas Larson , Anthony Le , Carol Qiao Tong , Rochit Rajsuman
发明人： Douglas Larson , Anthony Le , Carol Qiao Tong , Rochit Rajsuman
IPC分类号： G06F900
CPC分类号： G01R31/3191 , G01R31/31922
摘要： An ATE calibration method and system that does not require external test equipment to calibrate individual functional pins and provides balanced timing skews among the functional pins and pincards is disclosed. A functional pin in the test system is selected as a reference or “golden” pin and another is selected as a precision measurement unit (PMU). External test equipment and the reference PMU are used to measure the AC and DC characteristics of the reference pin, and any deviation represents a measurement error in the reference PMU. All functional pins in the test system can be measured against the reference pin using the reference PMU, taking into account the measurement error, without the need for external test equipment. To ensure that skews are balanced among all pins, the location of the reference pin is selected to be as close as possible to the midpoint of the functional pin range.
摘要翻译：公开了一种不需要外部测试设备来校准各个功能引脚并在功能引脚和引脚卡之间提供平衡的时序偏移的ATE校准方法和系统。选择测试系统中的功能引脚作为参考或“黄金”引脚，另一个选择为精密测量单元（PMU）。外部测试设备和参考PMU用于测量参考引脚的交流和直流特性，任何偏差表示参考PMU中的测量误差。测试系统中的所有功能引脚可以使用参考PMU测量参考引脚，同时考虑到测量误差，无需外部测试设备。为了确保所有引脚之间的偏差平衡，参考引脚的位置选择为尽可能靠近功能引脚范围的中点。

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