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    • 12. 发明授权
    • Efficient memory update process for on-the-fly instruction translation for well behaved applications executing on a weakly-ordered processor
    • 高效的内存更新过程,用于在弱有序处理器上执行的运行良好的应用程序的即时指令转换
    • US07454570B2
    • 2008-11-18
    • US11006371
    • 2004-12-07
    • Andrew DunsheaSatya Prakash SharmaMysore Sathyanarayana Srinivas
    • Andrew DunsheaSatya Prakash SharmaMysore Sathyanarayana Srinivas
    • G06F12/00
    • G06F12/0837G06F9/3004G06F9/30087G06F9/3834G06F9/3836G06F9/3857
    • A multiprocessor data processing system (MDPS) with a weakly-ordered architecture providing processing logic for substantially eliminating issuing sync instructions after every store instruction of a well-behaved application. Instructions of a well-behaved application are translated and executed by a weakly-ordered processor. The processing logic includes a lock address tracking utility (LATU), which provides an algorithm and a table of lock addresses, within which each lock address is stored when the lock is acquired by the weakly-ordered processor. When a store instruction is encountered in the instruction stream, the LATU compares the target address of the store instruction against the table of lock addresses. If the target address matches one of the lock addresses, indicating that the store instruction is the corresponding unlock instruction (or lock release instruction), a sync instruction is issued ahead of the store operation. The sync causes all values updated by the intermediate store operations to be flushed out to the point of coherency and be visible to all processors.
    • 具有弱有序体系结构的多处理器数据处理系统(MDPS)提供处理逻辑,用于在运行良好的应用的每个存储指令之后基本上消除发出同步指令。 良好的应用程序的指令由弱有序的处理器转换和执行。 处理逻辑包括一个锁定地址跟踪实用程序(LATU),它提供一种算法和一个锁定地址表,当弱锁定处理器获取锁时,锁存地址被存储在该地址中。 当在指令流中遇到存储指令时,LATU将存储指令的目标地址与锁定地址表进行比较。 如果目标地址与其中一个锁定地址匹配,指示存储指令是相应的解锁指令(或锁定释放指令),则在存储操作之前发出同步指令。 同步使得由中间存储操作更新的所有值被刷新到一致性点,并且对于所有处理器可见。
    • 16. 发明授权
    • Efficient memory update process for well behaved applications executing on a weakly-ordered processor
    • 在弱有序处理器上执行的良好行为应用程序的高效内存更新过程
    • US08447955B2
    • 2013-05-21
    • US12259699
    • 2008-10-28
    • Andrew DunsheaSatya Prakash SharmaMysore Sathyanarayana Srinivas
    • Andrew DunsheaSatya Prakash SharmaMysore Sathyanarayana Srinivas
    • G06F9/30
    • G06F12/0837G06F9/3004G06F9/30087G06F9/3834G06F9/3836G06F9/3857
    • A multiprocessor data processing system (MDPS) with a weakly-ordered architecture providing processing logic for substantially eliminating issuing sync instructions after every store instruction of a well-behaved application. Instructions of a well-behaved application are translated and executed by a weakly-ordered processor. The processing logic includes a lock address tracking utility (LATU), which provides an algorithm and a table of lock addresses, within which each lock address is stored when the lock is acquired by the weakly-ordered processor. When a store instruction is encountered in the instruction stream, the LATU compares the target address of the store instruction against the table of lock addresses. If the target address matches one of the lock addresses, indicating that the store instruction is the corresponding unlock instruction (or lock release instruction), a sync instruction is issued ahead of the store operation. The sync causes all values updated by the intermediate store operations to be flushed out to the point of coherency and be visible to all processors.
    • 具有弱有序体系结构的多处理器数据处理系统(MDPS)提供处理逻辑,用于在运行良好的应用的每个存储指令之后基本上消除发出同步指令。 良好的应用程序的指令由弱有序的处理器转换和执行。 处理逻辑包括一个锁定地址跟踪实用程序(LATU),它提供一种算法和一个锁定地址表,当弱锁定处理器获取锁时,锁存地址被存储在该地址中。 当在指令流中遇到存储指令时,LATU将存储指令的目标地址与锁定地址表进行比较。 如果目标地址与其中一个锁定地址匹配,指示存储指令是相应的解锁指令(或锁定释放指令),则在存储操作之前发出同步指令。 同步使得由中间存储操作更新的所有值被刷新到一致性点,并且对于所有处理器可见。
    • 18. 发明申请
    • EXPANDING MEMORY SIZE
    • 扩大内存大小
    • US20110107054A1
    • 2011-05-05
    • US12611190
    • 2009-11-03
    • David Alan HepkinSatya Prakash SharmaSaurabh Nath SharmaRandal Craig Swanberg
    • David Alan HepkinSatya Prakash SharmaSaurabh Nath SharmaRandal Craig Swanberg
    • G06F12/00
    • G06F13/16
    • A method, system, and computer usable program product for expanding memory size are provided in the illustrative embodiments. A desired size of an expanded memory and a first information about a workload in the data processing system are received. A size of a compressed memory pool to use with the memory to make the desired size of the expanded memory available is computed. A representation of the memory is configured, the representation of the memory appearing to be of a size larger than the size of the memory, the representation of the memory being the expanded memory, and the size of the representation being the size of the expanded memory. The expanded memory is made available such that the memory in the data processing system is usable by addressing the expanded memory.
    • 在说明性实施例中提供了用于扩展存储器大小的方法,系统和计算机可用程序产品。 接收扩展存储器的期望大小和关于数据处理系统中的工作负载的第一信息。 计算与存储器一起使用的压缩存储器池的大小,以使扩展存储器的期望大小可用。 配置存储器的表示,存储器的表示看起来大于存储器的大小,存储器的表示是扩展存储器,并且表示的大小是扩展存储器的大小 。 扩展的存储器可用,使得数据处理系统中的存储器可通过寻址扩展的存储器来使用。