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11. 发明授权

US08987976B2 Piezoelectric resonator having combined thickness and width vibrational modes 有权
标题翻译：具有组合厚度和宽度振动模式的压电谐振器
公开(公告)号：US08987976B2
公开(公告)日：2015-03-24
申请号：US13241356
申请日：2011-09-23
申请人： Chengjie Zuo , Chi Shun Lo , Sanghoon Joo , Changhan Yun , Jonghae Kim
发明人： Chengjie Zuo , Chi Shun Lo , Sanghoon Joo , Changhan Yun , Jonghae Kim
IPC分类号： H01L41/047 , H03H9/02 , H03H9/56
CPC分类号： H03H9/02157 , H03H9/02062 , H03H9/56
摘要： A method and apparatus for a piezoelectric resonator having combined thickness and width vibrational modes are disclosed. A piezoelectric resonator may include a piezoelectric substrate and a first electrode coupled to a first surface of the piezoelectric substrate. The piezoelectric resonator may further include a second electrode coupled to a second surface of the piezoelectric substrate, where the first surface and the second surface are substantially parallel and define a thickness dimension of the piezoelectric substrate. Furthermore, the thickness dimension and the width dimension of the piezoelectric substrate are configured to produce a resonance from a coherent combination of a thickness vibrational mode and a width vibrational mode when an excitation signal is applied to the electrodes.
摘要翻译：公开了一种具有组合的厚度和宽度振动模式的压电谐振器的方法和装置。压电谐振器可以包括压电衬底和耦合到压电衬底的第一表面的第一电极。压电谐振器还可以包括耦合到压电基板的第二表面的第二电极，其中第一表面和第二表面基本平行并且限定压电基板的厚度尺寸。此外，压电基板的厚度尺寸和宽度尺寸被构造成当激励信号施加到电极时，从厚度振动模式和宽度振动模式的相干组合产生谐振。

12. 发明授权

US08816567B2 Piezoelectric laterally vibrating resonator structure geometries for spurious frequency suppression 有权
标题翻译：压电横向振动谐振器结构几何形状用于杂散频率抑制
公开(公告)号：US08816567B2
公开(公告)日：2014-08-26
申请号：US13186281
申请日：2011-07-19
申请人： Chengjie Zuo , Changhan Yun , Chi Shun Lo , Jonghae Kim
发明人： Chengjie Zuo , Changhan Yun , Chi Shun Lo , Jonghae Kim
IPC分类号： H01L41/04 , H03H3/02 , H03H9/02 , H03H9/17
CPC分类号： H03H9/02228 , H03H3/02 , H03H9/02055 , H03H9/173 , H03H2003/021 , Y10T29/42
摘要： This disclosure provides implementations of electromechanical systems resonator structures, devices, apparatus, systems, and related processes. In one aspect, a resonator structure includes a first conductive layer of electrodes and a second conductive layer of electrodes. A piezoelectric layer including a piezoelectric material is disposed between the first conductive layer and the second conductive layer. One or more trenches can be formed in the piezoelectric layer on one or both sides in space regions between the electrodes. In some implementations, a process for forming the resonator structure includes removing an exposed portion of the piezoelectric layer to define a trench, for instance, by partial etching or performing an isotropic release etch using a XeF2 gas or SF6 plasma. In some other implementations, a portion of a sacrificial layer is removed to define a trench in the piezoelectric layer.
摘要翻译：本公开提供了机电系统谐振器结构，设备，装置，系统和相关过程的实现。一方面，谐振器结构包括电极的第一导电层和电极的第二导电层。包括压电材料的压电层设置在第一导电层和第二导电层之间。一个或多个沟槽可以在电极之间的空间区域的一侧或两侧的压电层中形成。在一些实施方案中，用于形成谐振器结构的工艺包括去除压电层的暴露部分以限定沟槽，例如通过部分蚀刻或使用XeF 2气体或SF 6等离子体进行各向同性释放蚀刻。在一些其他实施方案中，去除牺牲层的一部分以在压电层中限定沟槽。

13. 发明申请

US20130120081A1 COMBINED RESONATORS AND PASSIVE CIRCUIT COMPONENTS FOR FILTER PASSBAND FLATTENING 审中-公开
标题翻译：组合式谐振器和无源电路组件，用于滤波器平滑
公开(公告)号：US20130120081A1
公开(公告)日：2013-05-16
申请号：US13295955
申请日：2011-11-14
申请人： Chengjie Zuo , Chi Shun Lo , Sanghoon Joo , Changhan Yun , Jonghae Kim
发明人： Chengjie Zuo , Chi Shun Lo , Sanghoon Joo , Changhan Yun , Jonghae Kim
IPC分类号： H03H9/54 , G06F3/038
CPC分类号： H03H9/542 , H03H9/02228 , H03H9/564
摘要： This disclosure provides implementations of electromechanical systems combined resonator and passive circuit components. In one aspect, passband flattened filter apparatus includes a resonator structure and input and output passband flattening components. The resonator structure has a first input, a second input coupled to a ground terminal, a first output, and a second output coupled to the ground terminal. The input passband flattening component includes a first inductor having an output coupled to the first input of the resonator structure, and a second inductor having an input coupled to the first input of the resonator structure and an output coupled to the ground terminal. The output passband flattening component includes a first inductor having an input coupled to the first output of the resonator structure, and a second inductor having an input coupled to the first output of the resonator structure and an output coupled to the ground terminal.
摘要翻译：本公开提供了机电系统组合谐振器和无源电路部件的实现。一方面，通带扁平滤波器装置包括谐振器结构以及输入和输出通带扁平部件。谐振器结构具有耦合到接地端子的第一输入端，第二输入端，第一输出端和耦合到接地端子的第二输出端。输入通带平坦化部件包括具有耦合到谐振器结构的第一输入的输出的第一电感器和具有耦合到谐振器结构的第一输入的输入端和耦合到接地端子的输出的第二电感器。输出通带平坦化部件包括具有耦合到谐振器结构的第一输出的输入的第一电感器和具有耦合到谐振器结构的第一输出的输入端和耦合到接地端子的输出的第二电感器。

14. 发明授权

US09099986B2 Cross-sectional dilation mode resonators 有权
标题翻译：横截面扩张模式谐振器
公开(公告)号：US09099986B2
公开(公告)日：2015-08-04
申请号：US13295970
申请日：2011-11-14
申请人： Chengjie Zuo , Changhan Yun , Chi Shun Lo , Wesley Nathaniel Allen , Mario Francisco Velez , Jonghae Kim
发明人： Chengjie Zuo , Changhan Yun , Chi Shun Lo , Wesley Nathaniel Allen , Mario Francisco Velez , Jonghae Kim
IPC分类号： H01L41/053 , H03H9/46 , H03H9/24 , H03H9/02
CPC分类号： H03H9/462 , H03H9/02228 , H03H9/2405 , H03H9/2426 , H03H2009/02503 , H03H2009/241
摘要： Electromechanical systems dilation mode resonator (DMR) structures are disclosed. The DMR includes a first electrode layer, a second electrode layer, and a piezoelectric layer formed of a piezoelectric material. The piezoelectric layer has dimensions including a lateral distance (D), in a plane of an X axis and a Y axis perpendicular to the X axis, and a thickness (T), along a Z axis perpendicular to the X axis and the Y axis. A numerical ratio of the thickness and the lateral distance, T/D, is configured to provide a mode of vibration of the piezoelectric layer with displacement along the Z axis and along the plane of the X axis and the Y axis responsive to a signal provided to one or more of the electrodes. Ladder filter circuits can be constructed with DMRs as series and/or shunt elements, and the resonators can have spiral configurations.
摘要翻译：公开了机电系统扩张模式谐振器（DMR）结构。 DMR包括第一电极层，第二电极层和由压电材料形成的压电层。压电体层具有在与X轴正交的X轴和Y轴的平面内的横向距离（D）和与X轴正交的Z轴的厚度（T）。厚度和横向距离T / D的数值比被配置为提供压电层的振动模式，其具有沿着Z轴的位移并且沿着X轴和Y轴的平面响应所提供的信号到一个或多个电极。梯形滤波器电路可以用DMR构造为串联和/或分流元件，并且谐振器可以具有螺旋配置。

15. 发明申请

US20130207745A1 3D RF L-C FILTERS USING THROUGH GLASS VIAS 审中-公开
标题翻译：使用玻璃VIAS的3D射频L-C滤光片
公开(公告)号：US20130207745A1
公开(公告)日：2013-08-15
申请号：US13419876
申请日：2012-03-14
申请人： Changhan Yun , Chengjie Zuo , Chi Shun Lo , Jonghae Kim , Mario F. Velez
发明人： Changhan Yun , Chengjie Zuo , Chi Shun Lo , Jonghae Kim , Mario F. Velez
IPC分类号： H03H7/01 , H05K3/30
CPC分类号： H03H7/0115 , H01F17/0013 , H01F17/0033 , H01F2017/0026 , H01F2017/004 , H03H7/09 , H03H7/1708 , H03H7/1766 , H03H7/1775 , H03H7/1783 , H03H2001/0085 , Y10T29/4913
摘要： Three-dimensional (3D) Radio Frequency (RF) inductor-capacitor (LC) band pass filters having through-glass-vias (TGVs). One such L-C filter circuit includes a glass substrate, a first portion of a first inductor formed on a first surface of the glass substrate, a second portion of the first inductor formed on a second surface of the glass substrate, and a first set of TGVs configured to connect the first and second portions of the first inductor. Additionally the L-C filter circuit can include a second inductor similar to the first inductor, and a metal-insulator-metal (MIM) capacitor formed between the first and second inductor, such that the first and second inductor are coupled through the MIM capacitor.
摘要翻译：具有透玻璃通孔（TGV）的三维（3D）射频（RF）电感 - 电容（LC）带通滤波器。一个这样的LC滤波器电路包括玻璃基板，形成在玻璃基板的第一表面上的第一电感器的第一部分，形成在玻璃基板的第二表面上的第一电感器的第二部分和第一组TGV 被配置为连接第一电感器的第一和第二部分。此外，L-C滤波器电路可以包括类似于第一电感器的第二电感器和形成在第一和第二电感器之间的金属 - 绝缘体 - 金属（MIM）电容器，使得第一和第二电感器通过MIM电容器耦合。

16. 发明申请

US20130120415A1 COMBINED RESONATORS AND PASSIVE CIRCUIT COMPONENTS ON A SHARED SUBSTRATE 审中-公开
标题翻译：组合式谐振器和被共享的基板上的被动电路组件
公开(公告)号：US20130120415A1
公开(公告)日：2013-05-16
申请号：US13295967
申请日：2011-11-14
申请人： Chengjie Zuo , Chi Shun Lo , Sanghoon Joo , Changhan Yun , Jonghae Kim
发明人： Chengjie Zuo , Chi Shun Lo , Sanghoon Joo , Changhan Yun , Jonghae Kim
IPC分类号： G06F13/14 , H01L41/02 , H01L41/22 , B05D5/12 , H03H9/54
CPC分类号： H03H9/02228 , H03H3/02 , H03H2003/021
摘要： This disclosure provides implementations of electromechanical systems combined resonator and passive circuit component structures, devices, apparatus, systems, and related processes. In one aspect, the device includes a piezoelectric resonator structure formed over an insulating substrate. A portion of the piezoelectric resonator structure is spaced apart from the substrate by a first gap. A passive circuit component structure such as an inductor or a capacitor is formed over the insulating substrate. A portion of the passive circuit component structure is spaced apart from the substrate by a second gap. The first gap and the second gap are defined by removal of a sacrificial (SAC) layer.
摘要翻译：本公开提供机电系统组合谐振器和无源电路组件结构，设备，装置，系统和相关过程的实现。一方面，该装置包括形成在绝缘基板上的压电谐振器结构。压电谐振器结构的一部分与衬底间隔开第一间隙。在绝缘基板上形成诸如电感器或电容器的无源电路部件结构。无源电路部件结构的一部分通过第二间隙与衬底间隔开。通过去除牺牲（SAC）层来限定第一间隙和第二间隙。

17. 发明申请

US20130120082A1 TWO-PORT RESONATORS ELECTRICALLY COUPLED IN PARALLEL 审中-公开
标题翻译：双端口谐振器并联电气并联
公开(公告)号：US20130120082A1
公开(公告)日：2013-05-16
申请号：US13293522
申请日：2011-11-10
申请人： Chengjie Zuo , Changhan Yun , Chi Shun Lo , Sanghoon Joo , Jonghae Kim
发明人： Chengjie Zuo , Changhan Yun , Chi Shun Lo , Sanghoon Joo , Jonghae Kim
IPC分类号： H03H9/58 , H01L41/22
CPC分类号： H03H9/56 , H03H9/02228 , H03H9/566 , Y10T29/42
摘要： Systems and method for wideband filter designs comprising two-port piezoelectric resonators electrically coupled in parallel. A resonating circuit comprises a first piezoelectric resonator formed of a first configuration, and a second piezoelectric resonator formed of a second configuration such that outputs of the first and second piezoelectric resonators have a 180-degree phase difference for a same input. The first piezoelectric resonator and the second piezoelectric resonator are coupled electrically in parallel. The first and second piezoelectric resonators have different resonating frequencies respectively controlled by lateral dimensions of the piezoelectric resonators.
摘要翻译：宽带滤波器设计的系统和方法包括并联电耦合的双端口压电谐振器。谐振电路包括由第一构造形成的第一压电谐振器和由第二构造形成的第二压电谐振器，使得第一和第二压电谐振器的输出对于相同的输入具有180度的相位差。第一压电谐振器和第二压电谐振器并联电耦合。第一和第二压电谐振器具有分别由压电谐振器的横向尺寸控制的不同谐振频率。

18. 发明申请

US20130083044A1 CROSS-SECTIONAL DILATION MODE RESONATORS 有权
标题翻译：交叉分段模式谐振器
公开(公告)号：US20130083044A1
公开(公告)日：2013-04-04
申请号：US13295970
申请日：2011-11-14
申请人： Chengjie Zuo , Changhan Yun , Chi Shun Lo , Wesley Nathaniel Allen , Mario Francisco Velez , Jonghae Kim
发明人： Chengjie Zuo , Changhan Yun , Chi Shun Lo , Wesley Nathaniel Allen , Mario Francisco Velez , Jonghae Kim
IPC分类号： G06F13/14 , H01L41/053 , H01L41/047
CPC分类号： H03H9/462 , H03H9/02228 , H03H9/2405 , H03H9/2426 , H03H2009/02503 , H03H2009/241
摘要： Electromechanical systems dilation mode resonator (DMR) structures are disclosed. The DMR includes a first electrode layer, a second electrode layer, and a piezoelectric layer formed of a piezoelectric material. The piezoelectric layer has dimensions including a lateral distance (D), in a plane of an X axis and a Y axis perpendicular to the X axis, and a thickness (T), along a Z axis perpendicular to the X axis and the Y axis. A numerical ratio of the thickness and the lateral distance, T/D, is configured to provide a mode of vibration of the piezoelectric layer with displacement along the Z axis and along the plane of the X axis and the Y axis responsive to a signal provided to one or more of the electrodes. Ladder filter circuits can be constructed with DMRs as series and/or shunt elements, and the resonators can have spiral configurations.
摘要翻译：公开了机电系统扩张模式谐振器（DMR）结构。 DMR包括第一电极层，第二电极层和由压电材料形成的压电层。压电体层具有在与X轴正交的X轴和Y轴的平面内的横向距离（D）和与X轴正交的Z轴的厚度（T）。厚度和横向距离T / D的数值比被配置为提供压电层的振动模式，其具有沿着Z轴的位移并且沿着X轴和Y轴的平面响应所提供的信号到一个或多个电极。梯形滤波器电路可以用DMR构造为串联和/或分流元件，并且谐振器可以具有螺旋配置。

19. 发明申请

US20130021305A1 PIEZOELECTRIC LATERALLY VIBRATING RESONATOR STRUCTURE GEOMETRIES FOR SPURIOUS FREQUENCY SUPPRESSION 有权
标题翻译：压电式横向振动谐振器结构几何形状的频率抑制
公开(公告)号：US20130021305A1
公开(公告)日：2013-01-24
申请号：US13186281
申请日：2011-07-19
申请人： Chengjie Zuo , Changhan Yun , Chi Shun Lo , Jonghae Kim
发明人： Chengjie Zuo , Changhan Yun , Chi Shun Lo , Jonghae Kim
IPC分类号： G09G5/00 , H01L41/22 , H01L41/047
CPC分类号： H03H9/02228 , H03H3/02 , H03H9/02055 , H03H9/173 , H03H2003/021 , Y10T29/42
摘要： This disclosure provides implementations of electromechanical systems resonator structures, devices, apparatus, systems, and related processes. In one aspect, a resonator structure includes a first conductive layer of electrodes and a second conductive layer of electrodes. A piezoelectric layer including a piezoelectric material is disposed between the first conductive layer and the second conductive layer. One or more trenches can be formed in the piezoelectric layer on one or both sides in space regions between the electrodes. In some implementations, a process for forming the resonator structure includes removing an exposed portion of the piezoelectric layer to define a trench, for instance, by partial etching or performing an isotropic release etch using a XeF2 gas or SF6 plasma. In some other implementations, a portion of a sacrificial layer is removed to define a trench in the piezoelectric layer.
摘要翻译：本公开提供了机电系统谐振器结构，设备，装置，系统和相关过程的实现。一方面，谐振器结构包括电极的第一导电层和电极的第二导电层。包括压电材料的压电层设置在第一导电层和第二导电层之间。一个或多个沟槽可以在电极之间的空间区域的一侧或两侧的压电层中形成。在一些实施方案中，用于形成谐振器结构的工艺包括去除压电层的暴露部分以限定沟槽，例如通过部分蚀刻或使用XeF 2气体或SF 6等离子体进行各向同性释放蚀刻。在一些其他实施方案中，去除牺牲层的一部分以在压电层中限定沟槽。

20. 发明授权

US09496255B2 Stacked CMOS chipset having an insulating layer and a secondary layer and method of forming same 有权
标题翻译：具有绝缘层和二次层的叠层CMOS芯片组及其形成方法
公开(公告)号：US09496255B2
公开(公告)日：2016-11-15
申请号：US13356717
申请日：2012-01-24
申请人： Chengjie Zuo , Changhan Yun , Sang-June Park , Chi Shun Lo , Mario F. Velez , Jonghae Kim
发明人： Chengjie Zuo , Changhan Yun , Sang-June Park , Chi Shun Lo , Mario F. Velez , Jonghae Kim
IPC分类号： H01L21/00 , H01L27/06
CPC分类号： H01L27/0688 , H01L2224/18
摘要： A chipset includes a sheet of glass, quartz or sapphire and a first wafer having at least one first circuit layer on a first side of a first substrate layer. The first wafer is connected to the sheet such that the at least one first circuit layer is located between the first substrate layer and the sheet. A second wafer having at least one second circuit layer on a first side of a second substrate layer is connected to the first substrate layer such that the at least one second circuit layer is located between the second substrate layer and the first substrate layer. Also a method of forming a chipset.
摘要翻译：芯片组包括玻璃板，石英或蓝宝石片，以及在第一基底层的第一面上具有至少一个第一电路层的第一晶片。第一晶片连接到片材，使得至少一个第一电路层位于第一基片层和片之间。具有在第二衬底层的第一侧上的至少一个第二电路层的第二晶片连接到第一衬底层，使得至少一个第二电路层位于第二衬底层和第一衬底层之间。还有一种形成芯片组的方法。

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