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11. 发明授权

US06809915B2 Gate-equivalent-potential circuit and method for I/O ESD protection 有权
标题翻译：栅极等效电路和I / O ESD保护方法
公开(公告)号：US06809915B2
公开(公告)日：2004-10-26
申请号：US10266572
申请日：2002-10-09
申请人： Chun-Hsiang Lai , Meng-Huang Liu , Shin Su , Tao-Cheng Lu
发明人： Chun-Hsiang Lai , Meng-Huang Liu , Shin Su , Tao-Cheng Lu
IPC分类号： H02H320
CPC分类号： H01L27/0274
摘要： A gate-equivalent-potential circuit and method for an I/O pad ESD protection arrangement including used and unused MOS fingers connected to the I/O pad comprises a switch connected between the gates of the MOS fingers, an ESD detector connected to the switch to turn on the switch upon an ESD event and a gate-modulated circuit connected to the gate of the unused finger to couple a voltage thereto to reduce the triggering voltage of the transistors within the fingers.
摘要翻译：用于I / O焊盘ESD保护装置的栅极等效电位电路和方法包括连接到I / O焊盘的使用和未使用的MOS指状物，包括连接在MOS指状物的栅极之间的开关，连接到开关的ESD检测器在ESD事件时接通开关，以及连接到未使用手指的栅极的栅极调制电路以将电压耦合到其中以减小手指内的晶体管的触发电压。

12. 发明授权

US06724677B1 ESD device used with high-voltage input pad 有权
标题翻译： ESD器件与高压输入板配合使用
公开(公告)号：US06724677B1
公开(公告)日：2004-04-20
申请号：US10065751
申请日：2002-11-15
申请人： Shin Su , Meng-Huang Liu , Chun-Hsiang Lai , Tao-Cheng Lu
发明人： Shin Su , Meng-Huang Liu , Chun-Hsiang Lai , Tao-Cheng Lu
IPC分类号： G11C700
CPC分类号： H01L27/0266
摘要： An electrostatic discharge (ESD) device used with a high-voltage input pad is described. The ESD device serves as a secondary device of a two-stage protection circuit, and comprises a substrate, a first MOS transistor and a second MOS transistor. The first MOS transistor is disposed on the substrate and comprises a first gate, a first drain and a first source, wherein the first gate is coupled to a bias Vg1, and the first drain is coupled to the high-voltage input pad. The second MOS transistor is disposed on the substrate and comprises a second gate, a second drain and a second source, wherein the second gate and the second source are both grounded, and the second drain is electrically connected with the first source of the first MOS transistor.
摘要翻译：描述了与高电压输入焊盘一起使用的静电放电（ESD）器件。 ESD器件用作二级保护电路的次级器件，并且包括衬底，第一MOS晶体管和第二MOS晶体管。第一MOS晶体管设置在衬底上并且包括第一栅极，第一漏极和第一源极，其中第一栅极耦合到偏置Vg1，并且第一漏极耦合到高电压输入焊盘。第二MOS晶体管设置在衬底上，并且包括第二栅极，第二漏极和第二源极，其中第二栅极和第二源极接地，并且第二漏极与第一MOS的第一源电连接晶体管。

13. 发明授权

US06590261B2 Electrostatic discharge protection structure 有权
标题翻译：静电放电保护结构
公开(公告)号：US06590261B2
公开(公告)日：2003-07-08
申请号：US09973927
申请日：2001-10-10
申请人： Shin Su , Chun-Hsiang Lai , Meng-Huang Liu , Tao-Cheng Lu
发明人： Shin Su , Chun-Hsiang Lai , Meng-Huang Liu , Tao-Cheng Lu
IPC分类号： H01L2362
CPC分类号： H01L23/60 , H01L2924/0002 , H01L2924/3011 , H01L2924/00
摘要： An electrostatic discharge (ESD) protection structure is disclosed. The ESD protection structure of the present invention uses a resistance capacitance (RC) circuit to distinguish an overshoot phenomenon caused by the instantaneous power-on from an ESD event, so as to prevent the ESD protection device, such as a P-type modified lateral silicon controlled rectifier (MLSCR), from being triggered unexpectedly by an overshoot phenomenon which results from the power-on under normal operation, and thereby the efficiency of the ESD protection device is promoted.
摘要翻译：公开了一种静电放电（ESD）保护结构。本发明的ESD保护结构使用电阻电容（RC）电路来区分由ESD事件引起的瞬时上电引起的过冲现象，以防止ESD保护装置，例如P型修正侧面可控硅整流器（MLSCR）由于正常工作下的上电引起的过冲现象而意外触发，从而提高了ESD保护器件的效率。

14. 发明授权

US07573102B2 ESD protection structure and method utilizing substrate triggering for a high-voltage tolerant pad 有权
标题翻译： ESD保护结构和方法利用高耐压焊盘的基板触发
公开(公告)号：US07573102B2
公开(公告)日：2009-08-11
申请号：US11496490
申请日：2006-08-01
申请人： Meng-Huang Liu , Chun-Hsiang Lai , Shin Su , Yen-Hung Yeh , Chia-Ling Lu , Tao-Cheng Lu
发明人： Meng-Huang Liu , Chun-Hsiang Lai , Shin Su , Yen-Hung Yeh , Chia-Ling Lu , Tao-Cheng Lu
IPC分类号： H01L29/72
CPC分类号： H01L27/0266
摘要： In an ESD protection structure and method utilizing substrate triggering for a high-voltage tolerant pad on a substrate, an ESD protection device has a source connected to the pad and a gate and a drain both connected to a ground, and a substrate-triggering control circuit is used to keep the substrate at a low voltage during a normal operation, and pumping the substrate to a high voltage during an ESD event for the ESD protection device to be triggered much easier. The substrate-triggering control circuit is implemented with an active device, thereby reducing the chip size for the circuit and the loading effect on the pad.
摘要翻译：在ESD保护结构和方法中，利用衬底触发用于衬底上的高耐压焊盘，ESD保护器件具有连接到焊盘的源极和连接到地的栅极和漏极，以及衬底触发控制电路用于在正常操作期间将衬底保持在低电压，并且在ESD事件期间将衬底泵送到高电压以使ESD保护器件被触发得更容易。基板触发控制电路由有源器件实现，从而减小电路的芯片尺寸和对焊盘的负载效应。

15. 发明授权

US06965504B2 ESD protection apparatus and method for a high-voltage input pad 有权
标题翻译：高压输入板的ESD保护装置及方法
公开(公告)号：US06965504B2
公开(公告)日：2005-11-15
申请号：US10304137
申请日：2002-11-26
申请人： Meng-Huang Liu , Chun-Hsiang Lai , Shin Su , Tao-Cheng Lu
发明人： Meng-Huang Liu , Chun-Hsiang Lai , Shin Su , Tao-Cheng Lu
IPC分类号： H01L27/02 , H02H3/20
CPC分类号： H01L27/0266 , H01L27/0255
摘要： An ESD protection apparatus for a high-voltage input pad comprises a modulator connected between the input pad and a snapback device with first and second guard rings surrounding the modulator, third guard ring surrounding the snapback device, and first and second guard ring control circuits to control the guard rings such that the protection apparatus has higher triggering and holding voltages under normal operation and lower triggering and holding voltages under ESD event.
摘要翻译：用于高电压输入焊盘的ESD保护装置包括连接在输入焊盘和回弹装置之间的调制器，其具有围绕调制器的第一和第二保护环，围绕着快速恢复装置的第三保护环，以及第一和第二保护环控制电路控制保护环，使保护装置在正常工作状态下具有较高的触发和保持电压，并在ESD事件下具有较低的触发和保持电压。

16. 发明授权

US06829125B2 ESD protection circuit for multi-power and mixed-voltage integrated circuit 有权
标题翻译：多功率和混合电压集成电路的ESD保护电路
公开(公告)号：US06829125B2
公开(公告)日：2004-12-07
申请号：US09938511
申请日：2001-08-27
申请人： Meng-Huang Liu , Chun-Hsiang Lai , Sing Su , Tao-Cheng Lu
发明人： Meng-Huang Liu , Chun-Hsiang Lai , Sing Su , Tao-Cheng Lu
IPC分类号： H02H900
CPC分类号： H01L27/0285
摘要： The invention discloses an ESD (Electro Static Discharge) protection circuit, including a resistor device, a capacitor device and a PMOS device. The resistor device is connected in series between a power supply and the capacitor device. The capacitor device is connected in series between the resistor device and the ground. A gate electrode of the PMOS device is connected between the resistor device and the capacitor device. A bulk electrode of the PMOS device is interconnected to a first electrode of the PMOS device, and the first electrode is connected to the power supply. Alternatively, another ESD protection circuit for multiple power supplies includes at least two aforementioned ESD protection circuits, and a common ESD bus. The ESD protection circuits are connected to separate power supplies, and both connected to the common ESD bus. By using the ESD protection circuit, there is no noise between the separate power supplies, and an ESD current could be discharged easily and safely.
摘要翻译：本发明公开了一种ESD（静电放电）保护电路，包括电阻器件，电容器器件和PMOS器件。电阻器件串联在电源和电容器之间。电容器器件串联在电阻器件和地之间。 PMOS器件的栅电极连接在电阻器件和电容器器件之间。 PMOS器件的体电极互连到PMOS器件的第一电极，并且第一电极连接到电源。或者，用于多个电源的另一ESD保护电路包括至少两个上述ESD保护电路和公共ESD总线。 ESD保护电路连接到单独的电源，并且都连接到公共ESD总线。通过使用ESD保护电路，在单独的电源之间不存在噪声，并且ESD电流可以容易且安全地放电。

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