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11. 发明申请

US20080100302A1 Apparatus and method for measuring and monitoring layer properties in web-based processes 失效
标题翻译：用于在基于Web的过程中测量和监测层属性的装置和方法
公开(公告)号：US20080100302A1
公开(公告)日：2008-05-01
申请号：US11590349
申请日：2006-10-30
申请人： Warren Jackson , Carl Taussig
发明人： Warren Jackson , Carl Taussig
IPC分类号： G01R31/08
CPC分类号： G01N27/221 , G01R31/2806
摘要： An apparatus and method for measuring and monitoring layer properties in web-based processes are described. The apparatus includes multiple electrode devices adjacently positioned on a surface of a web material, which advances with a predetermined speed. The electrode devices perform measurements of electrical parameters of a layer of the web material and provide an electrical signal to a layer deposition system for further adjustment of layer properties of the layer.
摘要翻译：描述了一种用于在基于web的过程中测量和监测层属性的装置和方法。该装置包括相邻地定位在幅材材料的表面上的多个电极装置，其以预定速度前进。电极装置执行网状材料层的电参数的测量，并向层沉积系统提供电信号，以进一步调整层的层性质。

12. 发明授权

US08097400B2 Method for forming an electronic device 有权
标题翻译：电子设备的形成方法
公开(公告)号：US08097400B2
公开(公告)日：2012-01-17
申请号：US11062384
申请日：2005-02-22
申请人： Warren Jackson , Carl Taussig , Ping Mei
发明人： Warren Jackson , Carl Taussig , Ping Mei
IPC分类号： G03F7/20
CPC分类号： G03F7/0002 , B82Y10/00 , B82Y40/00
摘要： Provided is a low cost system and method for forming electronic devices, especially large surface area devices. The process of imprint lithography is combined with alternate manufacturing techniques to fabricate the devices. Initially, a template imprints a three-dimensional pattern into a resist layer deposited on a flexible substrate. The resist layer is cured using ultraviolet light or other curing techniques. After curing, the 3-D pattern is modified using one of several techniques to include inkjetting, electrodeposition or laser patterning. In one embodiment, a semi-fluid material may be jetted into channels formed in the pattern, thereby forming conductive or insulating lead lines. Alternatively, a two-dimensional pattern may be jetted onto the resist layer. Final processing may include multiple etch-mask-etch steps. The integration of techniques into a single system provides a low cost, efficient method for manufacturing high quality, large surface area electronic devices.
摘要翻译：提供一种用于形成电子装置，特别是大型表面积装置的低成本系统和方法。压印光刻的过程与替代制造技术相结合以制造器件。最初，模板将三维图案印刷到沉积在柔性基板上的抗蚀剂层中。使用紫外线或其他固化技术固化抗蚀剂层。固化后，使用几种技术之一来修改3-D图案，以包括喷墨，电沉积或激光图案化。在一个实施例中，可以将半流体材料喷射到在图案中形成的通道中，从而形成导电或绝缘导线。或者，可以将二维图案喷射到抗蚀剂层上。最终处理可以包括多个蚀刻掩模蚀刻步骤。将技术整合到单个系统中提供了用于制造高质量，大表面积电子器件的低成本，有效的方法。

13. 发明授权

US08305096B2 Apparatus and method for measuring and monitoring layer properties in web-based processes 失效
标题翻译：用于在基于Web的过程中测量和监测层属性的装置和方法
公开(公告)号：US08305096B2
公开(公告)日：2012-11-06
申请号：US11590349
申请日：2006-10-30
申请人： Warren Jackson , Carl Taussig
发明人： Warren Jackson , Carl Taussig
IPC分类号： G01R27/08
CPC分类号： G01N27/221 , G01R31/2806
摘要： An apparatus and method for measuring and monitoring layer properties in web-based processes are described. The apparatus includes multiple electrode devices adjacently positioned on a surface of a web material, which advances with a predetermined speed. The electrode devices perform measurements of electrical parameters of a layer of the web material and provide an electrical signal to a layer deposition system for further adjustment of layer properties of the layer.
摘要翻译：描述了一种用于在基于web的过程中测量和监测层属性的装置和方法。该装置包括相邻地定位在幅材材料的表面上的多个电极装置，其以预定速度前进。电极装置执行网状材料层的电参数的测量，并向层沉积系统提供电信号，以进一步调整层的层性质。

14. 发明申请

US20060028895A1 Silver island anti-fuse 审中-公开
标题翻译：银岛反熔丝
公开(公告)号：US20060028895A1
公开(公告)日：2006-02-09
申请号：US10914255
申请日：2004-08-09
申请人： Carl Taussig , Warren Jackson , Craig Perlov , Frank Jeffrey
发明人： Carl Taussig , Warren Jackson , Craig Perlov , Frank Jeffrey
IPC分类号： G11C17/18 , G11C11/36
CPC分类号： H01L23/5252 , G11C13/02 , G11C17/16 , G11C17/18 , G11C2213/72 , H01L27/101 , H01L2924/0002 , H01L2924/3011 , H01L2924/00
摘要： An silver island anti-fuse including a first electrical conductor, an electrically resistive material in contact with the first conductor and at least one silver island disposed opposite the first electrical conductor and upon the electrically resistive material. A second electrical conductor disposed over the silver island intimately couples the silver island to the electrically resistive material. When a critical potential is applied across the anti-fuse, a metallic filament precipitates from the silver island through the electrically resistive material layer, establishing a short and thus switching the silver island anti-fuse from a high resistance to a low resistance. A method of making the silver island anti-fuse and a memory device incorporating the silver island anti-fuse are further provided.
摘要翻译：一种银岛反熔丝，包括第一电导体，与第一导体接触的电阻材料和与第一电导体相对设置的至少一个银岛和电阻材料。布置在银岛上的第二电导体将银岛紧密地耦合到电阻材料上。当跨抗反熔丝施加临界电位时，金属细丝通过电阻材料层从银岛沉淀出来，建立短路，从而将银岛抗熔丝从高电阻切换到低电阻。还提供了制造银岛反熔丝的方法和结合有银岛反熔丝的存储装置。

15. 发明申请

US20060188823A1 Method for forming an electronic device 有权
标题翻译：电子设备的形成方法
公开(公告)号：US20060188823A1
公开(公告)日：2006-08-24
申请号：US11062384
申请日：2005-02-22
申请人： Warren Jackson , Carl Taussig , Ping Mei
发明人： Warren Jackson , Carl Taussig , Ping Mei
IPC分类号： G03F7/00
CPC分类号： G03F7/0002 , B82Y10/00 , B82Y40/00
摘要： Provided is a low cost system and method for forming electronic devices, especially large surface area devices. The process of imprint lithography is combined with alternate manufacturing techniques to fabricate the devices. Initially, a template imprints a three-dimensional pattern into a resist layer deposited on a flexible substrate. The resist layer is cured using ultraviolet light or other curing techniques. After curing, the 3-D pattern is modified using one of several techniques to include inkjetting, electrodeposition or laser patterning. In one embodiment, a semi-fluid material may be jetted into channels formed in the pattern, thereby forming conductive or insulating lead lines. Alternatively, a two-dimensional pattern may be jetted onto the resist layer. Final processing may include multiple etch-mask-etch steps. The integration of techniques into a single system provides a low cost, efficient method for manufacturing high quality, large surface area electronic devices.
摘要翻译：提供一种用于形成电子装置，特别是大型表面积装置的低成本系统和方法。压印光刻的过程与替代制造技术相结合以制造器件。最初，模板将三维图案印刷到沉积在柔性基板上的抗蚀剂层中。使用紫外线或其他固化技术固化抗蚀剂层。固化后，使用几种技术之一来修改3-D图案，以包括喷墨，电沉积或激光图案化。在一个实施例中，可以将半流体材料喷射到在图案中形成的通道中，从而形成导电或绝缘引线。或者，可以将二维图案喷射到抗蚀剂层上。最终处理可以包括多个蚀刻掩模蚀刻步骤。将技术整合到单个系统中提供了用于制造高质量，大表面积电子器件的低成本，有效的方法。

16. 发明申请

US20060275963A1 Structure and method for thin film device 有权
标题翻译：薄膜器件的结构和方法
公开(公告)号：US20060275963A1
公开(公告)日：2006-12-07
申请号：US11144204
申请日：2005-06-02
申请人： Ping Mei , Albert Jeans , Carl Taussig
发明人： Ping Mei , Albert Jeans , Carl Taussig
IPC分类号： H01L21/84 , H01L27/148
CPC分类号： H01L29/42384 , H01L29/6675 , H01L29/78645 , H01L29/7869 , Y10S438/942
摘要： Provided is a thin film device and an associated method of making a thin film device. For example, a thin film transistor with nano-gaps in the gate electrode. The method involves providing a substrate. Upon the substrate are then provided a plurality of parallel spaced electrically conductive strips. A plurality of thin film device layers are then deposited upon the conductive strips. A 3D structure is provided upon the plurality of thin film device layers, the structure having a plurality of different heights. The 3D structure and the plurality of thin film device layers are then etched to define a thin film device, such as for example a thin film transistor that is disposed above at least a portion of the conductive strips.
摘要翻译：本发明提供一种制造薄膜器件的薄膜器件和相关方法。例如，在栅电极中具有纳米间隙的薄膜晶体管。该方法包括提供基底。然后在衬底上设置多个平行隔开的导电条。然后将多个薄膜器件层沉积在导电条上。 3D结构设置在多个薄膜器件层上，该结构具有多个不同的高度。然后蚀刻3D结构和多个薄膜器件层以限定薄膜器件，例如设置在至少一部分导电条上的薄膜晶体管。

17. 发明授权

US06864576B2 Large line conductive pads for interconnection of stackable circuitry 有权
标题翻译：用于可堆叠电路互连的大导线焊盘
公开(公告)号：US06864576B2
公开(公告)日：2005-03-08
申请号：US10696992
申请日：2003-10-30
申请人： Craig Perlov , Carl Taussig
发明人： Craig Perlov , Carl Taussig
IPC分类号： G06K19/077 , H01L21/027 , H01L23/12 , H05K1/11 , H05K3/00 , H05K3/06 , H05K3/20 , H01L23/48
CPC分类号： H05K1/11 , H05K3/0041 , H05K3/061 , H05K3/20 , H05K2201/09681 , H05K2203/0108
摘要： Digital circuitry, such as interconnective pads which are patterned as waffles according to the embossing methods for flexible substrates which are disclosed, so as to be especially suited for the interconnection of stacks of circuitry blocks forming digital memory known as Permanent Inexpensive, Rugged Memory (PIRM) cross point arrays.
摘要翻译：数字电路，例如根据所公开的用于柔性基板的压花方法图案化为华夫饼的互连焊盘，以便特别适用于形成数字存储器的堆叠的电路块的互连，所述数字存储器被称为永久性廉价，坚固的存储器（PIRM））交叉点数组。

18. 发明授权

US06567295B2 Addressing and sensing a cross-point diode memory array 有权
公开(公告)号：US06567295B2
公开(公告)日：2003-05-20
申请号：US09875496
申请日：2001-06-05
申请人： Carl Taussig , Richard Elder
发明人： Carl Taussig , Richard Elder
IPC分类号： G11C1706
CPC分类号： G11C8/10 , G11C17/06 , G11C17/18
摘要： A memory circuit includes a cross-point memory array having first and second sets of transverse electrodes with respective memory elements formed at the crossing-points of the first and second set electrodes. Each of the memory elements is formed to include, in at least one of its binary states, a diode element. The memory circuit also includes an addressing circuit coupled to the memory array. The addressing circuit has a first set of address lines with first diode connections between the first set address lines and the first set memory array electrodes, with the first diode connections coupling each memory array electrode in the first set to a respective unique subset of the first set address lines. The addressing circuit also has a second set of address lines with second diode connections between the second set address lines and the second set memory array electrodes, with the second diode connections coupling each memory array electrode in the second set to a respective unique subset of the second set address lines. The first and second diode connections form a permuted diode logic circuit whereby application of predetermined voltages to selected subsets of the first and second address lines enables unique addressing of a single memory element in the array. By sensing the current in the address lines the binary state of the addressed memory element may be determined. Also, by application of a writing voltage to the selected subsets of address lines, the binary state of a memory element can be changed by substantially and permanently changing the resistance thereof.

19. 发明授权

US06552409B2 Techniques for addressing cross-point diode memory arrays 有权
标题翻译：用于寻址交叉点二极管存储器阵列的技术
公开(公告)号：US06552409B2
公开(公告)日：2003-04-22
申请号：US09875572
申请日：2001-06-05
申请人： Carl Taussig , Richard Elder
发明人： Carl Taussig , Richard Elder
IPC分类号： H01L2900
CPC分类号： B82Y10/00 , G11C8/10 , G11C17/16 , H01L23/5256 , H01L23/5382 , H01L25/105 , H01L2225/1023 , H01L2225/1064 , H01L2225/1082 , H01L2924/0002 , H01L2924/12044 , H01L2924/3011 , Y10S257/91 , H01L2924/00
摘要： A memory array and some addressing circuitry therefor are formed by creating circuit elements at the crossing-points of two layers of electrode conductors that are separated by a layer of a semiconductor material. The circuit elements formed at the crossing-points function as data storage devices in the memory array, and function as connections for a permuted addressing scheme for addressing the elements in the array. In order to construct the addressing circuitry, the electrode conductors are fabricated with a controlled geometry at selected crossing-points such that selected circuit elements have increased or decreased cross-sectional area. By applying a programming electrical signal to the electrodes, the electrical characteristics (e.g. resistance) of selected circuit elements can be changed according to the controlled electrode geometry.
摘要翻译：存储器阵列及其一些寻址电路通过在由半导体材料层分隔的两层电极导体的交叉点处产生电路元件而形成。在交叉点处形成的电路元件用作存储器阵列中的数据存储设备，并且用作用于寻址阵列中的元件的置换寻址方案的连接。为了构造寻址电路，电极导体以选定的交叉点以受控的几何形状制造，使得所选择的电路元件具有增加或减少的横截面积。通过向电极施加编程电信号，可以根据受控电极几何形状来改变所选择的电路元件的电特性（例如电阻）。

20. 发明申请

US20080185591A1 Structure and method for thin film device 有权
公开(公告)号：US20080185591A1
公开(公告)日：2008-08-07
申请号：US12011440
申请日：2008-01-24
申请人： Ping Mei , Albert Jeans , Carl Taussig
发明人： Ping Mei , Albert Jeans , Carl Taussig
IPC分类号： H01L29/04
CPC分类号： H01L29/42384 , H01L29/6675 , H01L29/78645 , H01L29/7869 , Y10S438/942
摘要： Provided is a thin film device and an associated method of making a thin film device. For example, a thin film transistor with nano-gaps in the gate electrode. The method involves providing a substrate. Upon the substrate are then provided a plurality of parallel spaced electrically conductive strips. A plurality of thin film device layers are then deposited upon the conductive strips. A 3D structure is provided upon the plurality of thin film device layers, the structure having a plurality of different heights. The 3D structure and the plurality of thin film device layers are then etched to define a thin film device, such as for example a thin film transistor that is disposed above at least a portion of the conductive strips.

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