专利快速检索-快速检索全球专利，免费商用专利数据库-IPRDB

11. 发明授权

US09990324B2 Two modes of a configuration interface of a network ASIC 有权
公开(公告)号：US09990324B2
公开(公告)日：2018-06-05
申请号：US14521354
申请日：2014-10-22
申请人： CAVIUM, INC.
发明人： Guy Townsend Hutchison , Harish Krishnamoorthy , Gerald Schmidt , Vishal Anand
IPC分类号： G06F13/40 , G06F13/42
CPC分类号： G06F13/4068 , G06F13/4221
摘要： Embodiments of the present invention are directed to a configuration interface of a network ASIC. The configuration interface allows for two modes of traversal of nodes. The nodes form one or more chains. Each chain is in a ring or a list topology. A master receives external access transactions. Once received by the master, an external access transaction traverses the chains to reach a target node. A target node either is an access to a memory space or is a module. A chain can include at least one decoder. A decoder includes logic that determines which of its leaves to send an external access transaction to. In contrast, if a module is not the target node, then the module passes an external access transaction to the next node coupled thereto; otherwise, if the module is the target node, the transmission of the external access transaction stops at the module.

12. 发明申请

US20170364541A1 METHOD AND APPARATUS FOR TABLE AGING IN A NETWORK SWITCH 审中-公开
公开(公告)号：US20170364541A1
公开(公告)日：2017-12-21
申请号：US15675336
申请日：2017-08-11
申请人： Cavium, Inc.
发明人： Weihuang Wang , Gerald Schmidt , Tsahi Daniel , Mohan Balan
IPC分类号： G06F17/30 , H04L12/935 , H04L12/931 , G06F12/1009
CPC分类号： G06F17/30339 , G06F12/1009 , G06F2212/1016 , G06F2212/657 , H04L49/00 , H04L49/309
摘要： Embodiments of the present invention relate to a centralized table aging module that efficiently and flexibly utilizes an embedded memory resource, and that enables and facilitates separate network controllers. The centralized table aging module performs aging of tables in parallel using the embedded memory resource. The table aging module performs an age marking process and an age refreshing process. The memory resource includes age mark memory and age mask memory. Age marking is applied to the age mark memory. The age mask memory provides per-entry control granularity regarding the aging of table entries.

13. 发明授权

US09760418B2 Session based packet mirroring in a network ASIC 有权
公开(公告)号：US09760418B2
公开(公告)日：2017-09-12
申请号：US14494229
申请日：2014-09-23
申请人： CAVIUM, INC.
发明人： Gerald Schmidt , Harish Krishnamoorthy , Tsahi Daniel
IPC分类号： G06F11/00 , H04L12/761 , H04L12/741 , H04L12/931
CPC分类号： G06F11/00 , H04L45/16 , H04L45/54 , H04L49/201
摘要： A forwarding pipeline of a forwarding engine includes a mirror bit mask vector with one bit per supported independent mirror session. Each bit in the mirror bit mask vector can be set at any point in the forwarding pipeline when the forwarding engine determines that conditions for a corresponding mirror session are met. At the end of the forwarding pipeline, if any of the bits in the mirror bit mask vector is set, then a packet, the mirror bit mask vector and a pointer to the start of a mirror destination linked list are forwarded to the multicast replication engine. The mirror destination linked list typically defines a rule for mirroring. The multicast replication engine mirrors the packet according to the mirror destination linked list and the mirror bit mask vector.

14. 发明授权

US09571395B2 Reconfigurable interconnect element with local lookup tables shared by multiple packet processing engines 有权
标题翻译：可重构互连元件与多个数据包处理引擎共享的本地查找表
公开(公告)号：US09571395B2
公开(公告)日：2017-02-14
申请号：US14617644
申请日：2015-02-09
申请人： CAVIUM, INC.
发明人： Anh Tran , Gerald Schmidt
IPC分类号： H04L12/28 , H04L12/743 , H04L12/933
CPC分类号： H04L45/7457 , H04L49/109 , H04L49/1576
摘要： The invention describes the design of an interconnect element in a programmable network processor/system on-chip having multiple packet processing engines. The on-chip interconnection network for a large number of processing engines on a system can be built from an array of the proposed interconnect elements. Each interconnect element also includes local network lookup tables which allows its attached processing engines to perform lookups locally. These local lookups are much faster than the lookups to a remote search engine, which is shared by all processing engines in the entire system. Local lookup tables in each interconnect element are built from a pool of memory tiles. Each lookup table can be shared by multiple processing engines attached to the interconnect element; and each of these processing engines can perform lookups on different lookup tables in run-time.
摘要翻译：本发明描述了具有多个分组处理引擎的片上可编程网络处理器/系统中的互连元件的设计。用于系统上的大量处理引擎的片上互连网络可以由所提出的互连元件的阵列构建。每个互连元件还包括本地网络查找表，其允许其附接的处理引擎在本地执行查找。这些本地查找比对远程搜索引擎的查找快得多，这是由整个系统中的所有处理引擎共享的。每个互连元素中的本地查找表都是从内存块池构建的。每个查找表可以由连接到互连元件的多个处理引擎共享; 并且这些处理引擎中的每一个可以在运行时对不同查找表执行查找。

15. 发明申请

US20160142317A1 MANAGEMENT OF AN OVER-SUBSCRIBED SHARED BUFFER 审中-公开
标题翻译：一个超用户共享的缓冲区的管理
公开(公告)号：US20160142317A1
公开(公告)日：2016-05-19
申请号：US14542509
申请日：2014-11-14
申请人： Cavium, Inc.
发明人： Andrew Chao-Lung Yang , Jeffrey Alan Pangborn , Gerald Schmidt
IPC分类号： H04L12/801 , H04L12/835
CPC分类号： H04L47/30
摘要： A method of managing a buffer (or buffer memory) includes utilizing one or more shared pool buffers, one or more port/priority buffers and a global multicast pool. When packets are received, a shared pool buffer is utilized; however, if a packet does not fit in the shared pool buffer, then the appropriate port/priority buffer is used. If the packet is a multicast packet, then the global multicast pool is utilized for copies of the packet.
摘要翻译：一种管理缓冲器（或缓冲存储器）的方法包括利用一个或多个共享池缓冲器，一个或多个端口/优先级缓冲器和全局多播池。当接收到数据包时，使用共享池缓冲区; 但是，如果数据包不适合共享池缓冲区，则使用适当的端口/优先级缓冲区。如果分组是组播分组，则全局组播池被用于分组的副本。

16. 发明授权

US10749800B2 Apparatus and method of generating lookups and making decisions for packet modifying and forwarding in a software-defined network engine 有权
公开(公告)号：US10749800B2
公开(公告)日：2020-08-18
申请号：US15991810
申请日：2018-05-29
申请人： Cavium Inc.
发明人： Anh T. Tran , Gerald Schmidt , Tsahi Daniel , Harish Krishnamoorthy
IPC分类号： G06F7/00 , H04L12/741 , G06F16/00 , G06F16/22 , G06F16/9535 , H04L12/701
摘要： Embodiments of the present invention relate to a Lookup and Decision Engine (LDE) for generating lookup keys for input tokens and modifying the input tokens based on contents of lookup results. The input tokens are parsed from network packet headers by a Parser, and the tokens are then modified by the LDE. The modified tokens guide how corresponding network packets will be modified or forwarded by other components in a software-defined networking (SDN) system. The design of the LDE is highly flexible and protocol independent. Conditions and rules for generating lookup keys and for modifying tokens are fully programmable such that the LDE can perform a wide variety of reconfigurable network features and protocols in the SDN system.

17. 发明授权

US10341130B2 Fast hardware switchover in a control path in a network ASIC 有权
公开(公告)号：US10341130B2
公开(公告)日：2019-07-02
申请号：US15642141
申请日：2017-07-05
申请人： Cavium, Inc.
发明人： Gerald Schmidt , Harish Krishnamoorthy , Tsahi Daniel
IPC分类号： H04L12/28 , H04L12/18
摘要： A multicast destination table contains a list of links. The list of links includes the main link that is currently in use and alternate links to reach the same destination. The links in the list of links are ordered based on a metric. Each of the links is stored as an entry in the multicast destination table. A multicast replication engine traverses the list of links until an enabled link in the list of links is reached, and replicates a packet according to data associated with the enabled link in the list of links.

18. 发明授权

US10205649B2 Hierarchical hardware linked list approach for multicast replication engine in a network ASIC 有权
公开(公告)号：US10205649B2
公开(公告)日：2019-02-12
申请号：US15725643
申请日：2017-10-05
申请人： Cavium, Inc.
发明人： Gerald Schmidt , Harish Krishnamoorthy , Tsahi Daniel
IPC分类号： H04L12/715 , H04L12/18 , G06F17/30 , H04L29/08 , H04L12/933 , H04L12/883 , H04L12/931
摘要： A multicast rule is represented in a hierarchical linked list with N tiers. Each tier or level in the hierarchical linked list corresponds to a network layer of a network stack that requires replication. Redundant groups in each tier are eliminated such that the groups in each tier are stored exactly once in a replication table. A multicast replication engine traverses the hierarchical linked list and replicates a packet according to each node in the hierarchical linked list.

19. 发明申请

US20180041450A1 PROTOCOL INDEPENDENT PROGRAMMABLE SWITCH (PIPS) FOR SOFTWARE DEFINED DATA CENTER NETWORKS 审中-公开
公开(公告)号：US20180041450A1
公开(公告)日：2018-02-08
申请号：US15786900
申请日：2017-10-18
申请人： Cavium, Inc.
发明人： Guy Townsend Hutchison , Sachin Ramesh Gandhi , Tsahi Daniel , Gerald Schmidt , Albert Fishman , Martin Leslie White , Zubin Shah
IPC分类号： H04L12/933 , H04L29/08 , H04L12/935 , H04L12/715 , G06F3/06 , G06F17/30 , G06F17/27 , H04L29/06 , H04L12/741
摘要： A software-defined network (SDN) system, device and method comprise one or more input ports, a programmable parser, a plurality of programmable lookup and decision engines (LDEs), programmable lookup memories, programmable counters, a programmable rewrite block and one or more output ports. The programmability of the parser, LDEs, lookup memories, counters and rewrite block enable a user to customize each microchip within the system to particular packet environments, data analysis needs, packet processing functions, and other functions as desired. Further, the same microchip is able to be reprogrammed for other purposes and/or optimizations dynamically.

20. 发明授权

US09880844B2 Method and apparatus for parallel and conditional data manipulation in a software-defined network processing engine 有权
公开(公告)号：US09880844B2
公开(公告)日：2018-01-30
申请号：US14144260
申请日：2013-12-30
申请人： CAVIUM, INC.
发明人： Anh T. Tran , Gerald Schmidt , Tsahi Daniel , Mohan Balan
IPC分类号： G06F9/30 , H04L29/06 , G06F15/76
CPC分类号： G06F9/30145 , G06F9/30 , G06F15/76 , H04L29/0621 , H04L69/12
摘要： Embodiments of the present invention relate to fast and conditional data modification and generation in a software-defined network (SDN) processing engine. Modification of multiple inputs and generation of multiple outputs can be performed in parallel. A size of each input or output data can be large, such as in hundreds of bytes. The processing engine includes a control path and a data path. The control path generates instructions for modifying inputs and generating new outputs. The data path executes all instructions produced by the control path. The processing engine is typically programmable such that conditions and rules for data modification and generation can be reconfigured depending on network features and protocols supported by the processing engine. The SDN processing engine allows for processing multiple large-size data flows and is efficient in manipulating such data. The SDN processing engine achieves full throughput with multiple back-to-back input and output data flows.

你已经成功收藏专利！

检索式保存成功!

IPRDB

热门服务

关于我们

友情链接

联系方式