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11. 发明授权

US09190570B2 Laser annealing of GaN LEDs with reduced pattern effects 有权
标题翻译：具有减少图案效果的GaN LED的激光退火
公开(公告)号：US09190570B2
公开(公告)日：2015-11-17
申请号：US13678946
申请日：2012-11-16
申请人： Andrew M. Hawryluk , Yun Wang
发明人： Andrew M. Hawryluk , Yun Wang
IPC分类号： H01L29/10 , H01L29/76 , H01L31/036 , H01L31/112 , H01L33/32 , H01L33/38 , H01L33/00
CPC分类号： H01L33/32 , H01L33/0075 , H01L33/0095 , H01L33/38
摘要： The disclosure is directed to laser annealing of GaN light-emitting diodes (LEDs) with reduced pattern effects. A method includes forming elongate conductive structures atop either an n-GaN layer or a p-GaN layer of a GaN LED structure, the elongate conductive structures having long and short dimensions, and being spaced apart and substantially aligned in the long dimensions. The method also includes generating a P-polarized anneal laser beam that has an anneal wavelength that is greater than the short dimension. The method also includes irradiating either the n-GaN layer or the p-GaN layer of the GaN LED structure through the conductive structures with the P-polarized anneal laser beam, including directing the anneal laser beam relative to the conductive structures so that the polarization direction is perpendicular to the long dimension of the conductive structures.
摘要翻译：本发明涉及具有减小的图案效应的GaN发光二极管（LED）的激光退火。一种方法包括在GaN LED结构的n-GaN层或p-GaN层顶上形成细长的导电结构，细长的导电结构具有长和短的尺寸，并且在长尺寸上间隔开并基本对准。该方法还包括产生具有大于短尺寸的退火波长的P偏振退火激光束。该方法还包括通过具有P偏振退火激光束的导电结构照射GaN LED结构的n-GaN层或p-GaN层，包括相对于导电结构引导退火激光束使得极化方向垂直于导电结构的长尺寸。

12. 发明申请

US20140176923A1 Wynn-Dyson imaging system with reduced thermal distortion 有权
标题翻译： Wynn-Dyson成像系统具有减少的热变形
公开(公告)号：US20140176923A1
公开(公告)日：2014-06-26
申请号：US13723260
申请日：2012-12-21
申请人： Andrew M. Hawryluk
发明人： Andrew M. Hawryluk
IPC分类号： G03F7/20
CPC分类号： G03F7/2002 , G03F7/70191
摘要： A Wynn-Dyson imaging system with reduced thermal distortion is disclosed, wherein the reticle and wafer prisms are made of glass material having a coefficient of thermal expansion of no greater than about 100 ppb/° C. The system also includes a first IR-blocking window disposed between the reticle and the reticle prism, and a second matching window disposed between the wafer and the wafer prism to maintain imaging symmetry. The IR-blocking window substantially blocks convective and radiative heat from reaching the reticle prism, thereby reducing the amount of thermally induced image distortion in the reticle image formed on the wafer.
摘要翻译：公开了具有降低的热变形的Wynn-Dyson成像系统，其中光罩和晶片棱镜由具有不大于约100ppb /℃的热膨胀系数的玻璃材料制成。该系统还包括第一IR阻挡设置在掩模版和标线棱镜之间的窗口，以及设置在晶片和晶片棱镜之间以保持成像对称性的第二匹配窗口。 IR阻挡窗口基本上阻挡了到达掩模版棱镜的对流和辐射热，从而减少了在晶片上形成的掩模版图像中的热诱导图像失真的量。

13. 发明授权

US08658451B2 Activating GaN LEDs by laser spike annealing and flash annealing 有权
标题翻译：通过激光尖峰退火和闪光退火激活GaN LED
公开(公告)号：US08658451B2
公开(公告)日：2014-02-25
申请号：US13136019
申请日：2011-07-20
申请人： Yun Wang , Andrew M. Hawryluk
发明人： Yun Wang , Andrew M. Hawryluk
IPC分类号： H01L21/00
CPC分类号： H01L33/42 , H01L33/0095 , H01L33/32 , H01L2933/0016
摘要： Methods of performing fast thermal annealing in forming GaN light-emitting diodes (LEDs) are disclosed, as are GaN LEDs formed using fast thermal annealing. An exemplary method includes forming a GaN multilayer structure having a n-GaN layer and a p-GaN layer that sandwich an active layer. The method includes performing fast thermal annealing of the p-GaN layer using either a laser or a flash lamp. The method further includes forming a transparent conducting layer atop the GaN multilayer structure, and adding a p-contact to the transparent conducting layer and a n-contact to the n-GaN layer. The resultant GaN LEDs have enhanced output power, lower turn-on voltage and reduced series resistance.
摘要翻译：公开了在形成GaN发光二极管（LED）中执行快速热退火的方法，以及使用快速热退火形成的GaN LED。一种示例性的方法包括形成具有n-GaN层的GaN多层结构和夹持有源层的p-GaN层。该方法包括使用激光或闪光灯来进行p-GaN层的快速热退火。所述方法还包括在所述GaN多层结构顶部形成透明导电层，以及向所述n-GaN层向所述透明导电层添加p接触和n接触。所得GaN LED具有增强的输出功率，较低的导通电压和降低的串联电阻。

14. 发明授权

US08460959B2 Fast thermal annealing of GaN LEDs 有权
标题翻译： GaN LED快速热退火
公开(公告)号：US08460959B2
公开(公告)日：2013-06-11
申请号：US13199276
申请日：2011-08-24
申请人： Yun Wang , Andrew M. Hawryluk
发明人： Yun Wang , Andrew M. Hawryluk
IPC分类号： H01L21/00
CPC分类号： H01L33/0095 , H01L33/32 , H01L33/40 , H01L2933/0016
摘要： Methods of performing fast thermal annealing in forming GaN light-emitting diodes (LEDs) are disclosed, as are GaN LEDs formed using fast thermal annealing having a time duration of 10 seconds or faster. An exemplary method includes forming a GaN multilayer structure having a n-GaN layer and a p-GaN layer that sandwich an active layer. The method includes performing fast thermal annealing of the p-GaN layer using either a laser or a flash lamp. The method further includes forming a transparent conducting layer atop the GaN multilayer structure, and adding a p-contact to the transparent conducting layer and a n-contact to the n-GaN layer. The resultant GaN LEDs have enhanced output power, lower turn-on voltage and reduced series resistance.
摘要翻译：公开了在形成GaN发光二极管（LED）中执行快速热退火的方法，以及使用10秒或更快的持续时间的快速热退火形成的GaN LED。一种示例性的方法包括形成具有n-GaN层的GaN多层结构和夹持有源层的p-GaN层。该方法包括使用激光或闪光灯来进行p-GaN层的快速热退火。所述方法还包括在所述GaN多层结构顶部形成透明导电层，以及向所述n-GaN层向所述透明导电层添加p接触和n接触。所得GaN LED具有增强的输出功率，较低的导通电压和降低的串联电阻。

15. 发明申请

US20120153323A1 Photolithographic led fabrication using phase-shift mask 有权
标题翻译：使用相移掩模的光刻LED制造
公开(公告)号：US20120153323A1
公开(公告)日：2012-06-21
申请号：US12928862
申请日：2010-12-21
申请人： Andrew M. Hawryluk , Robert L. Hsieh , Warren W. Flack
发明人： Andrew M. Hawryluk , Robert L. Hsieh , Warren W. Flack
IPC分类号： H01L33/22 , H01L33/00
CPC分类号： H01L33/22 , G03F1/26 , G03F7/70283 , G03F7/703 , H01L33/007 , H01L2924/0002 , H01L2933/0083 , H01L2924/00
摘要： Photolithographic methods of forming a roughened surface for an LED to improve LED light emission efficiency are disclosed. The methods include photolithographically imaging a phase-shift mask pattern onto a photoresist layer of a substrate to form therein a periodic array of photoresist features. The roughened substrate surface is created by processing the exposed photoresist layer to form a periodic array of substrate posts in the substrate surface. A p-n junction multilayer structure is then formed atop the roughened substrate surface to form the LED. The periodic array of substrate posts serve as scatter sites that improve the LED light emission efficiency as compared to the LED having no roughened substrate surface. The use of the phase-shift mask enables the use of affordable photolithographic imaging at a depth of focus suitable for non-flat LED substrates while also providing the needed resolution to form the substrate posts.
摘要翻译：公开了形成LED的粗糙表面以提高LED发光效率的光刻方法。所述方法包括将相移掩模图案光刻成像到基板的光致抗蚀剂层上以在其中形成光致抗蚀剂特征的周期性阵列。通过处理暴露的光致抗蚀剂层以在衬底表面中形成周期性的衬底柱阵列来产生粗糙化的衬底表面。然后在粗糙化的基板表面上形成p-n结多层结构以形成LED。与没有粗糙化的基板表面的LED相比，衬底柱的周期性阵列用作提高LED发光效率的散射点。使用相移掩模使得可以在适合于非平坦LED基板的聚焦深度下使用经济的光刻成像，同时还提供形成基板柱的所需分辨率。

16. 发明申请

US20110309374A1 Fast thermal annealing of GaN LEDs 有权
标题翻译： GaN LED快速热退火
公开(公告)号：US20110309374A1
公开(公告)日：2011-12-22
申请号：US13199276
申请日：2011-08-24
申请人： Yun Wang , Andrew M. Hawryluk
发明人： Yun Wang , Andrew M. Hawryluk
IPC分类号： H01L33/02
CPC分类号： H01L33/0095 , H01L33/32 , H01L33/40 , H01L2933/0016
摘要： Methods of performing fast thermal annealing in forming GaN light-emitting diodes (LEDs) are disclosed, as are GaN LEDs formed using fast thermal annealing having a time duration of 10 seconds or faster. An exemplary method includes forming a GaN multilayer structure having a n-GaN layer and a p-GaN layer that sandwich an active layer. The method includes performing fast thermal annealing of the p-GaN layer using either a laser or a flash lamp. The method further includes forming a transparent conducting layer atop the GaN multilayer structure, and adding a p-contact to the transparent conducting layer and a n-contact to the n-GaN layer. The resultant GaN LEDs have enhanced output power, lower turn-on voltage and reduced series resistance.
摘要翻译：公开了在形成GaN发光二极管（LED）中执行快速热退火的方法，以及使用10秒或更快的持续时间的快速热退火形成的GaN LED。一种示例性的方法包括形成具有n-GaN层的GaN多层结构和夹持有源层的p-GaN层。该方法包括使用激光或闪光灯来进行p-GaN层的快速热退火。所述方法还包括在所述GaN多层结构顶部形成透明导电层，以及向所述n-GaN层向所述透明导电层添加p接触和n接触。所得GaN LED具有增强的输出功率，较低的导通电压和降低的串联电阻。

17. 发明申请

US20110038704A1 Sub-field enhanced global alignment 有权
标题翻译：子字段增强全局对齐
公开(公告)号：US20110038704A1
公开(公告)日：2011-02-17
申请号：US12803344
申请日：2010-06-24
申请人： Andrew M. Hawryluk , Emily True , Ranjan Manish , Warren Flack , Detlef Fuchs
发明人： Andrew M. Hawryluk , Emily True , Ranjan Manish , Warren Flack , Detlef Fuchs
IPC分类号： H01L21/68
CPC分类号： G03F9/7003 , H01L21/568 , H01L23/3107 , H01L24/03 , H01L24/96 , H01L25/105 , H01L2224/02371 , H01L2224/02379 , H01L2224/0401 , H01L2224/04105 , H01L2224/05554 , H01L2224/12105 , H01L2224/96 , H01L2225/1035 , H01L2225/1058 , H01L2924/01006 , H01L2924/01033 , H01L2924/01075 , H01L2924/01078 , H01L2924/01082 , H01L2924/10253 , H01L2924/14 , H01L2924/1461 , H01L2924/15331 , H01L2924/181 , H01L2224/03 , H01L2224/11 , H01L2924/00
摘要： Sub-field enhanced global alignment (SEGA) methods for aligning reconstituted wafers in a lithography process are disclosed. The SEGA methods provide the ability to accommodate chip placement errors for chips supported by a reconstituted wafer when performing a lithographic process having an overlay requirement. The SEGA methods include measuring chip locations to determine sub-fields of the reconstituted wafer over which enhanced global alignment (EGA) can be performed on the chips therein to within the overlay requirement. The SEGA methods further included individually performing EGA over the respective sub-fields. The SEGA methods take advantage of the benefits of both EGA and site-by-site alignment and are particularly applicable to wafer-level packing lithographic processes such as fan-out wafer-level packaging.
摘要翻译：公开了用于在光刻工艺中对准重构晶片的子场增强全局对准（SEGA）方法。当执行具有覆盖要求的光刻工艺时，SEGA方法能够适应由重构的晶片支持的芯片的芯片放置误差。 SEGA方法包括测量芯片位置以确定重构晶片的子场，通过该子场可以在覆盖要求内对其上的芯片执行增强的全局对准（EGA）。 SEGA方法还包括在各个子场上单独执行EGA。 SEGA方法利用了EGA和现场对准的优点，特别适用于晶圆级封装光刻工艺，如扇形晶圆级封装。

18. 发明申请

US20100045334A1 DIRECT DETECT SENSOR FOR FLAT PANEL DISPLAYS 有权
标题翻译：用于平板显示器的直接检测传感器
公开(公告)号：US20100045334A1
公开(公告)日：2010-02-25
申请号：US12547251
申请日：2009-08-25
申请人： David W. Gardner , Andrew M. Hawryluk
发明人： David W. Gardner , Andrew M. Hawryluk
IPC分类号： G01R31/00 , G01R31/08
CPC分类号： G02F1/1309 , G09G3/006
摘要： Each sensor of a linear array of sensors includes, in part, a sensing electrode and an associated feedback circuit. The sensing electrodes are adapted to be brought in proximity to a flat panel having formed thereon a multitude of pixel electrodes in order to capacitively measure the voltage of the pixel electrodes. Each feedback circuit is adapted to actively drive its associated electrode via a feedback signal so as to maintain the voltage of its associated electrode at a substantially fixed bias. Each feedback circuit may include an amplifier having a first input terminal coupled to the sensing electrode and a second input terminal coupled to receive a biasing voltage. The output signal of the amplification circuit is used to generate the feedback signal that actively drives the sensing electrode. The biasing voltage may be the ground potential.
摘要翻译：传感器的线性阵列的每个传感器部分地包括感测电极和相关联的反馈电路。感测电极适于接近其上形成有多个像素电极的平板，以便电容地测量像素电极的电压。每个反馈电路适于经由反馈信号主动驱动其相关联的电极，以便将其相关电极的电压维持在基本上固定的偏压。每个反馈电路可以包括具有耦合到感测电极的第一输入端和耦合以接收偏置电压的第二输入端的放大器。放大电路的输出信号用于产生主动驱动感测电极的反馈信号。偏置电压可能是地电位。

19. 发明申请

US20090295425A1 DIRECT DETECT SENSOR FOR FLAT PANEL DISPLAYS 审中-公开
标题翻译：用于平板显示器的直接检测传感器
公开(公告)号：US20090295425A1
公开(公告)日：2009-12-03
申请号：US12540256
申请日：2009-08-12
申请人： David W. Gardner , Andrew M. Hawryluk
发明人： David W. Gardner , Andrew M. Hawryluk
IPC分类号： G01R31/00
CPC分类号： G02F1/1309 , G09G3/006
摘要： Each sensor of a linear array of sensors includes, in part, a sensing electrode and an associated feedback circuit. The sensing electrodes are adapted to be brought in proximity to a flat panel having formed thereon a multitude of pixel electrodes in order to capacitively measure the voltage of the pixel electrodes. Each feedback circuit is adapted to actively drive its associated electrode via a feedback signal so as to maintain the voltage of its associated electrode at a substantially fixed bias. Each feedback circuit may include an amplifier having a first input terminal coupled to the sensing electrode and a second input terminal coupled to receive a biasing voltage. The output signal of the amplification circuit is used to generate the feedback signal that actively drives the sensing electrode. The biasing voltage may be the ground potential.
摘要翻译：传感器的线性阵列的每个传感器部分地包括感测电极和相关联的反馈电路。感测电极适于接近其上形成有多个像素电极的平板，以便电容地测量像素电极的电压。每个反馈电路适于经由反馈信号主动驱动其相关联的电极，以便将其相关电极的电压维持在基本上固定的偏压。每个反馈电路可以包括具有耦合到感测电极的第一输入端和耦合以接收偏置电压的第二输入端的放大器。放大电路的输出信号用于产生主动驱动感测电极的反馈信号。偏置电压可能是地电位。

20. 发明授权

US07466161B2 Direct detect sensor for flat panel displays 有权
标题翻译：用于平板显示器的直接检测传感器
公开(公告)号：US07466161B2
公开(公告)日：2008-12-16
申请号：US11379413
申请日：2006-04-20
申请人： David W. Gardner , Andrew M. Hawryluk
发明人： David W. Gardner , Andrew M. Hawryluk
IPC分类号： G01R31/00
CPC分类号： G02F1/1309 , G09G3/006
摘要： Each sensor of a linear array of sensors includes, in part, a sensing electrode and an associated feedback circuit. The sensing electrodes are adapted to be brought in proximity to a flat panel having formed thereon a multitude of pixel electrodes in order to capacitively measure the voltage of the pixel electrodes. Each feedback circuit is adapted to actively drive its associated electrode via a feedback signal so as to maintain the voltage of its associated electrode at a substantially fixed bias. Each feedback circuit may include an amplifier having a first input terminal coupled to the sensing electrode and a second input terminal coupled to receive a biasing voltage. The output signal of the amplification circuit is used to generate the feedback signal that actively drives the sensing electrode. The biasing voltage may be the ground potential.
摘要翻译：传感器的线性阵列的每个传感器部分地包括感测电极和相关联的反馈电路。感测电极适于接近其上形成有多个像素电极的平板，以便电容地测量像素电极的电压。每个反馈电路适于经由反馈信号主动驱动其相关联的电极，以便将其相关电极的电压维持在基本上固定的偏压。每个反馈电路可以包括具有耦合到感测电极的第一输入端和耦合以接收偏置电压的第二输入端的放大器。放大电路的输出信号用于产生主动驱动感测电极的反馈信号。偏置电压可能是地电位。

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