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    • 12. 发明授权
    • Creating secure communication channels between processing elements
    • 在处理元素之间创建安全的通信通道
    • US09589159B2
    • 2017-03-07
    • US12492513
    • 2009-06-26
    • Balaji VembuAditya NavaleSathyamurthi Sadhasivan
    • Balaji VembuAditya NavaleSathyamurthi Sadhasivan
    • G06F12/14G06F21/84G06F21/72H04L9/08
    • G06F21/84G06F21/72H04L9/0841H04L2209/60
    • Two processing elements in a single platform may communicate securely to allow the platform to take advantage of the certain cryptographic functionality in one processing element. A first processing element, such as a bridge, may use its cryptographic functionality to request a key exchange with a second processing element, such as a graphics engine. Each processing element may include a global key which is common to the two processing elements and a unique key which is unique to each processing element. A key exchange may be established during the boot process the first time the system boots and, failing any hardware change, the same key may be used throughout the lifetime of the two processing elements. Once a secure channel is set up, any application wishing to authenticate a processing element without public-private cryptographic function may perform the authentication with the other processing element which shares a secure channel with the first processing element.
    • 单个平台中的两个处理元件可以安全通信,以允许平台在一个处理元件中利用某些加密功能。 诸如桥接器的第一处理元件可以使用其加密功能来请求与诸如图形引擎的第二处理元件的密钥交换。 每个处理元件可以包括两个处理元件共有的全局密钥和每个处理元件唯一的唯一密钥。 在系统引导的第一次引导过程中可以建立密钥交换,并且在任何硬件改变失败的情况下,在两个处理元件的整个寿命期间可以使用相同的密钥。 一旦建立了安全通道,希望在没有公共 - 私人密码功能的情况下认证处理元件的任何应用程序可以与与第一处理元件共享安全通道的其他处理元件执行认证。
    • 16. 发明申请
    • Creating Secure Communication Channels Between Processing Elements
    • 在处理元素之间创建安全通信通道
    • US20100332852A1
    • 2010-12-30
    • US12492513
    • 2009-06-26
    • Balaji VembuAditya NavaleSathyamurthi Sadhasivan
    • Balaji VembuAditya NavaleSathyamurthi Sadhasivan
    • G06F12/14G06F21/00H04L9/08
    • G06F21/84G06F21/72H04L9/0841H04L2209/60
    • Two processing elements in a single platform may communicate securely to allow the platform to take advantage of the certain cryptographic functionality in one processing element. A first processing element, such as a bridge, may use its cryptographic functionality to request a key exchange with a second processing element, such as a graphics engine. Each processing element may include a global key which is common to the two processing elements and a unique key which is unique to each processing element. A key exchange may be established during the boot process the first time the system boots and, failing any hardware change, the same key may be used throughout the lifetime of the two processing elements. Once a secure channel is set up, any application wishing to authenticate a processing element without public-private cryptographic function may perform the authentication with the other processing element which shares a secure channel with the first processing element.
    • 单个平台中的两个处理元件可以安全通信,以允许平台在一个处理元件中利用某些加密功能。 诸如桥接器的第一处理元件可以使用其加密功能来请求与诸如图形引擎的第二处理元件的密钥交换。 每个处理元件可以包括两个处理元件共有的全局密钥和每个处理元件唯一的唯一密钥。 在系统引导的第一次引导过程中可以建立密钥交换,并且在任何硬件改变失败的情况下,在两个处理元件的整个寿命期间可以使用相同的密钥。 一旦建立了安全通道,希望在没有公共 - 私人密码功能的情况下认证处理元件的任何应用程序可以与与第一处理元件共享安全通道的其他处理元件执行认证。
    • 19. 发明申请
    • METHOD AND DEVICE TO DISTRIBUTE CODE AND DATA STORES BETWEEN VOLATILE MEMORY AND NON-VOLATILE MEMORY
    • 在挥发性内存与非易失性存储器之间分配代码和数据存储的方法和设备
    • US20140208047A1
    • 2014-07-24
    • US13977295
    • 2011-12-28
    • Balaji VembuMurali Ramadoss
    • Balaji VembuMurali Ramadoss
    • G06F3/06
    • G06F3/0638G06F3/0604G06F3/0683G06F12/0292G06F2212/205G06T1/60G11C14/0045Y02D10/13
    • A method, device, and system to distribute code and data stores between volatile and non-volatile memory are described. In one embodiment, the method includes storing one or more static code segments of a software application in a phase change memory with switch (PCMS) device, storing one or more static data segments of the software application in the PCMS device, and storing one or more volatile data segments of the software application in a volatile memory device. The method then allocates an address mapping table with at least a first address pointer to point to each of the one or more static code segments, at least a second address pointer to point to each of the one or more static data segments, and at least a third address pointer to point to each of the one or more volatile data segments.
    • 描述了在易失性和非易失性存储器之间分发代码和数据存储的方法,设备和系统。 在一个实施例中,该方法包括将具有交换机(PCMS)设备的软件应用的一个或多个静态代码段存储在相变存储器中,将该软件应用的一个或多个静态数据段存储在PCMS设备中,并存储一个或多个 在易失性存储器件中软件应用的更易变的数据段。 该方法然后将至少一个第一地址指针的地址映射表分配给一个或多个静态代码段中的每一个,至少第二地址指针指向一个或多个静态数据段中的每一个,并且至少 指向一个或多个易失性数据段中的每一个的第三地址指针。
    • 20. 发明授权
    • Method and device to augment volatile memory in a graphics subsystem with non-volatile memory
    • 在具有非易失性存储器的图形子系统中增加易失性存储器的方法和装置
    • US09317892B2
    • 2016-04-19
    • US13977261
    • 2011-12-28
    • Bryan E. VealTravis T. SchluesslerMurali RamadossBalaji Vembu
    • Bryan E. VealTravis T. SchluesslerMurali RamadossBalaji Vembu
    • G09G5/39G06T1/60G11C16/34
    • G06T1/60G11C16/349
    • Methods and devices to augment volatile memory in a graphics subsystem with certain types of non-volatile memory are described. In one embodiment, includes storing one or more static or near-static graphics resources in a non-volatile random access memory (NVRAM). The NVRAM is directly accessible by a graphics processor using at least memory store and load commands. The method also includes a graphics processor executing a graphics application. The graphics processor sends a request using a memory load command for an address corresponding to at least one static or near-static graphics resources stored in the NVRAM. The method also includes directly loading the requested graphics resource from the NVRAM into a cache for the graphics processor in response to the memory load command.
    • 描述了在具有某些类型的非易失性存储器的图形子系统中增加易失性存储器的方法和装置。 在一个实施例中,包括将一个或多个静态或近静态图形资源存储在非易失性随机存取存储器(NVRAM)中。 NVRAM可直接由图形处理器使用,至少使用内存存储和加载命令。 该方法还包括执行图形应用的图形处理器。 图形处理器使用存储器加载命令来发送对应于存储在NVRAM中的至少一个静态或近静态图形资源的地址的请求。 该方法还包括响应于存储器加载命令将所请求的图形资源从NVRAM直接加载到图形处理器的高速缓存中。