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11. 发明授权

US08324660B2 Lattice-mismatched semiconductor structures with reduced dislocation defect densities and related methods for device fabrication 有权
标题翻译：具有减少的位错缺陷密度的晶格不匹配的半导体结构和用于器件制造的相关方法
公开(公告)号：US08324660B2
公开(公告)日：2012-12-04
申请号：US12845593
申请日：2010-07-28
申请人： Anthony J. Lochtefeld , Matthew T. Currie , Zhiyuan Cheng , James Fiorenza , Glyn Braithwaite , Thomas A. Langdo
发明人： Anthony J. Lochtefeld , Matthew T. Currie , Zhiyuan Cheng , James Fiorenza , Glyn Braithwaite , Thomas A. Langdo
IPC分类号： H01L21/02
CPC分类号： H01L21/02609 , H01L21/02381 , H01L21/02433 , H01L21/0245 , H01L21/0251 , H01L21/02521 , H01L21/02532 , H01L21/02538 , H01L21/02612 , H01L21/02639 , H01L21/02647 , H01L21/28255 , H01L21/28264 , H01L21/8258 , H01L27/0605 , H01L27/092 , H01L29/04 , H01L29/1054 , H01L29/16 , H01L29/20 , H01L29/66666 , H01L29/66795 , H01L29/778 , H01L29/78 , H01L29/7827 , H01L29/7835 , H01L29/7848 , H01L29/785 , H01L29/78687 , H01L31/028 , H01L31/0304 , H01L31/036 , H01L31/1808 , H01L33/20 , H01L33/30 , H01L33/34 , Y02E10/50
摘要： Fabrication of monolithic lattice-mismatched semiconductor heterostructures with limited area regions having upper portions substantially exhausted of threading dislocations, as well as fabrication of semiconductor devices based on such lattice-mismatched heterostructures.
摘要翻译：具有有限区域的单片晶格失配的半导体异质结构的制造，其具有基本上耗尽穿透位错的上部，以及基于这种晶格失配的异质结构的半导体器件的制造。

12. 发明申请

US20110318893A1 METHODS FOR FORMING SEMICONDUCTOR DEVICE STRUCTURES 有权
标题翻译：形成半导体器件结构的方法
公开(公告)号：US20110318893A1
公开(公告)日：2011-12-29
申请号：US13227077
申请日：2011-09-07
申请人： Anthony J. Lochtefeld , Thomas A. Langdo , Richard Hammond , Matthew T. Currie , Eugene A. Fitzgerald
发明人： Anthony J. Lochtefeld , Thomas A. Langdo , Richard Hammond , Matthew T. Currie , Eugene A. Fitzgerald
IPC分类号： H01L21/336 , H01L21/265 , H01L21/20
CPC分类号： H01L29/7847 , H01L21/28518 , H01L21/76254 , H01L21/76256 , H01L21/76259 , H01L21/76264 , H01L21/76275 , H01L21/84 , H01L27/1203 , H01L29/0649 , H01L29/1033 , H01L29/165 , H01L29/41783 , H01L29/66242 , H01L29/66628 , H01L29/66772 , H01L29/66787 , H01L29/66916 , H01L29/7842 , H01L29/7843 , H01L29/7849 , H01L29/785 , H01L29/78603 , H01L29/78684 , H01L29/78687
摘要： The benefits of strained semiconductors are combined with silicon-on-insulator approaches to substrate and device fabrication.
摘要翻译：应变半导体的优点与基板和器件制造上的绝缘体绝缘体方法相结合。

13. 发明申请

US20110073908A1 III-V Semiconductor Device Structures 有权
标题翻译： III-V半导体器件结构
公开(公告)号：US20110073908A1
公开(公告)日：2011-03-31
申请号：US12907787
申请日：2010-10-19
申请人： Anthony J. Lochtefeld , Thomas A. Langdo , Richard Hammond , Matthew T. Currie , Eugene A. Fitzgerald
发明人： Anthony J. Lochtefeld , Thomas A. Langdo , Richard Hammond , Matthew T. Currie , Eugene A. Fitzgerald
IPC分类号： H01L29/20
CPC分类号： H01L29/7847 , H01L21/28518 , H01L21/76254 , H01L21/76256 , H01L21/76259 , H01L21/76264 , H01L21/76275 , H01L21/84 , H01L27/1203 , H01L29/0649 , H01L29/1033 , H01L29/165 , H01L29/41783 , H01L29/66242 , H01L29/66628 , H01L29/66772 , H01L29/66787 , H01L29/66916 , H01L29/7842 , H01L29/7843 , H01L29/7849 , H01L29/785 , H01L29/78603 , H01L29/78684 , H01L29/78687
摘要： The benefits of strained semiconductors are combined with silicon-on-insulator approaches to substrate and device fabrication.
摘要翻译：应变半导体的优点与基板和器件制造上的绝缘体绝缘体方法相结合。

14. 发明授权

US07566606B2 Methods of fabricating semiconductor devices having strained dual channel layers 有权
标题翻译：制造具有应变双通道层的半导体器件的方法
公开(公告)号：US07566606B2
公开(公告)日：2009-07-28
申请号：US11544245
申请日：2006-10-06
申请人： Matthew T. Currie , Anthony J. Lochtefeld , Christopher W. Leitz , Eugene A. Fitzgerald
发明人： Matthew T. Currie , Anthony J. Lochtefeld , Christopher W. Leitz , Eugene A. Fitzgerald
IPC分类号： H01L21/00
CPC分类号： H01L29/66545 , H01L21/02381 , H01L21/0245 , H01L21/02532 , H01L21/823807 , H01L21/823814 , H01L29/1054 , H01L29/66628 , H01L29/66636 , H01L29/66651 , H01L29/66916 , H01L29/802 , Y10S438/938
摘要： A semiconductor structure includes a strain-inducing substrate layer having a germanium concentration of at least 10 atomic %. The semiconductor structure also includes a compressively strained layer on the strain-inducing substrate layer. The compressively strained layer has a germanium concentration at least approximately 30 percentage points greater than the germanium concentration of the strain-inducing substrate layer, and has a thickness less than its critical thickness. The semiconductor structure also includes a tensilely strained layer on the compressively strained layer. The tensilely strained layer may be formed from silicon having a thickness less than its critical thickness. A method for fabricating a semiconductor structure includes providing a substrate, providing a compressively strained semiconductor on the substrate, depositing a tensilely strained semiconductor adjacent the substrate until a thickness of a first region of the tensilely strained semiconductor is greater than a thickness of a second region of the tensilely strained semiconductor, forming a n-channel device on the first region, and forming a p-channel device on the second region.
摘要翻译：半导体结构包括锗浓度为至少10原子％的应变诱导基底层。半导体结构还包括在应变诱导基底层上的压缩应变层。压缩应变层的锗浓度比应变诱导基底层的锗浓度大至少约30个百分点，并且具有小于其临界厚度的厚度。半导体结构还包括在压缩应变层上的拉伸应变层。拉伸应变层可以由厚度小于其临界厚度的硅形成。一种用于制造半导体结构的方法包括：提供衬底，在衬底上提供压缩应变半导体，在衬底附近沉积拉伸应变半导体，直到拉伸应变半导体的第一区域的厚度大于第二区域的厚度的拉伸应变半导体，在第一区域上形成n沟道器件，并在第二区域上形成p沟道器件。

15. 发明授权

US07408214B2 Dynamic random access memory trench capacitors 有权
标题翻译：动态随机存取存储器沟槽电容
公开(公告)号：US07408214B2
公开(公告)日：2008-08-05
申请号：US10947909
申请日：2004-09-23
申请人： Mayank Bulsara , Matthew T. Currie , Anthony J. Lochtefeld
发明人： Mayank Bulsara , Matthew T. Currie , Anthony J. Lochtefeld
IPC分类号： H01L21/8242
CPC分类号： H01L27/10829 , H01L27/1087 , H01L27/10894 , H01L27/10897 , H01L28/40 , H01L29/1054 , H01L29/7849 , H01L29/945
摘要： DRAM trench capacitors formed by, inter alia, deposition of conductive material into a trench or doping the semiconductor region in which the trench is defined.
摘要翻译： DRAM槽电容器尤其通过将导电材料沉积到沟槽中或掺杂限定沟槽的半导体区域而形成。

16. 发明授权

US08748292B2 Methods of forming strained-semiconductor-on-insulator device structures 有权
标题翻译：形成应变绝缘体上半导体器件结构的方法
公开(公告)号：US08748292B2
公开(公告)日：2014-06-10
申请号：US11073780
申请日：2005-03-07
申请人： Thomas A. Langdo , Matthew T. Currie , Richard Hammond , Anthony J. Lochtefeld , Eugene A. Fitzgerald
发明人： Thomas A. Langdo , Matthew T. Currie , Richard Hammond , Anthony J. Lochtefeld , Eugene A. Fitzgerald
IPC分类号： H01L21/30 , H01L29/06 , H01L21/762 , H01L29/786 , H01L29/66 , H01L27/12 , H01L29/78 , H01L21/84 , H01L21/02
CPC分类号： H01L21/76254 , H01L21/02381 , H01L21/0245 , H01L21/02502 , H01L21/02505 , H01L21/0251 , H01L21/02521 , H01L21/02532 , H01L21/76259 , H01L21/76264 , H01L21/76275 , H01L21/84 , H01L27/1203 , H01L29/66772 , H01L29/66916 , H01L29/7842 , H01L29/78603 , H01L29/78684 , H01L29/78687
摘要： The benefits of strained semiconductors are combined with silicon-on-insulator approaches to substrate and device fabrication.
摘要翻译：应变半导体的优点与基板和器件制造上的绝缘体绝缘体方法相结合。

17. 发明授权

US08106380B2 Semiconductor structures employing strained material layers with defined impurity gradients and methods for fabricating same 有权
标题翻译：使用具有限定杂质梯度的应变材料层的半导体结构及其制造方法
公开(公告)号：US08106380B2
公开(公告)日：2012-01-31
申请号：US12982101
申请日：2010-12-30
申请人： Matthew T. Currie , Anthony J. Lochtefeld , Richard Hammond , Eugene Fitzgerald
发明人： Matthew T. Currie , Anthony J. Lochtefeld , Richard Hammond , Eugene Fitzgerald
IPC分类号： H01L21/00
CPC分类号： H01L29/1054 , H01L29/105 , H01L29/161 , H01L29/36 , H01L29/66477 , H01L29/66545 , H01L29/66651 , H01L29/78 , H01L29/7842 , Y10S438/926
摘要： Semiconductor structures and devices including strained material layers having impurity-free zones, and methods for fabricating same. Certain regions of the strained material layers are kept free of impurities that can interdiffuse from adjacent portions of the semiconductor. When impurities are present in certain regions of the strained material layers, there is degradation in device performance. By employing semiconductor structures and devices (e.g., field effect transistors or “FETs”) that have the features described, or are fabricated in accordance with the steps described, device operation is enhanced.
摘要翻译：包括具有无杂质区域的应变材料层的半导体结构和器件及其制造方法。应变材料层的某些区域保持没有可以从半导体的相邻部分相互扩散的杂质。当杂质存在于应变材料层的某些区域中时，器件性能下降。通过采用具有所描述的或者根据所描述的步骤制造的特征的半导体结构和器件（例如，场效应晶体管或“FET”），器件操作被增强。

18. 发明授权

US08026534B2 III-V semiconductor device structures 有权
标题翻译： III-V半导体器件结构
公开(公告)号：US08026534B2
公开(公告)日：2011-09-27
申请号：US12907787
申请日：2010-10-19
申请人： Thomas A. Langdo , Matthew T. Currie , Richard Hammond , Anthony J. Lochtefeld , Eugene A. Fitzgerald
发明人： Thomas A. Langdo , Matthew T. Currie , Richard Hammond , Anthony J. Lochtefeld , Eugene A. Fitzgerald
IPC分类号： H01L31/102
CPC分类号： H01L29/7847 , H01L21/28518 , H01L21/76254 , H01L21/76256 , H01L21/76259 , H01L21/76264 , H01L21/76275 , H01L21/84 , H01L27/1203 , H01L29/0649 , H01L29/1033 , H01L29/165 , H01L29/41783 , H01L29/66242 , H01L29/66628 , H01L29/66772 , H01L29/66787 , H01L29/66916 , H01L29/7842 , H01L29/7843 , H01L29/7849 , H01L29/785 , H01L29/78603 , H01L29/78684 , H01L29/78687
摘要： The benefits of strained semiconductors are combined with silicon-on-insulator approaches to substrate and device fabrication.
摘要翻译：应变半导体的优点与基板和器件制造上的绝缘体绝缘体方法相结合。

19. 发明授权

US07541208B2 Methods for preserving strained semiconductor substrate layers during CMOS processing 有权
标题翻译：在CMOS处理期间保留应变半导体衬底层的方法
公开(公告)号：US07541208B2
公开(公告)日：2009-06-02
申请号：US11704464
申请日：2007-02-09
申请人： Matthew T. Currie , Anthony J. Lochtefeld
发明人： Matthew T. Currie , Anthony J. Lochtefeld
IPC分类号： H01L21/00
CPC分类号： H01L21/02532 , H01L21/0237 , H01L21/02381 , H01L21/0245 , H01L21/0251 , H01L21/02521 , H01L21/02538 , H01L21/02664 , H01L21/2652 , H01L21/823807 , H01L29/1054
摘要： Oxidation methods, which avoid consuming undesirably large amounts of surface material in Si/SiGe heterostructure-based wafers, replace various intermediate CMOS thermal oxidation steps. First, by using oxide deposition methods, arbitrarily thick oxides may be formed with little or no consumption of surface silicon. These oxides, such as screening oxide and pad oxide, are formed by deposition onto, rather than reaction with and consumption of the surface layer. Alternatively, oxide deposition is preceded by a thermal oxidation step of short duration, e.g., rapid thermal oxidation. Here, the short thermal oxidation consumes little surface Si, and the Si/oxide interface is of high quality. The oxide may then be thickened to a desired final thickness by deposition. Furthermore, the thin thermal oxide may act as a barrier layer to prevent contamination associated with subsequent oxide deposition.
摘要翻译：避免在Si / SiGe异质结构基晶片中消耗不希望的大量表面材料的氧化方法代替了各种中间CMOS热氧化步骤。首先，通过使用氧化物沉积方法，可以形成少量或不消耗表面硅的任意厚的氧化物。这些氧化物，例如筛选氧化物和氧化垫，通过沉积到表面层上而不是与表面层反应并消耗而形成。或者，氧化物沉积之前是短时间的热氧化步骤，例如快速热氧化。这里，短的热氧化消耗很少的表面Si，并且Si /氧化物界面是高质量的。然后可以通过沉积将氧化物增稠至所需的最终厚度。此外，薄的热氧化物可以用作阻挡层，以防止与随后的氧化物沉积相关的污染。

20. 发明申请

US20080265299A1 Strained channel dynamic random access memory devices 有权
标题翻译：应变通道动态随机存取存储器件
公开(公告)号：US20080265299A1
公开(公告)日：2008-10-30
申请号：US12167828
申请日：2008-07-03
申请人： Mayank Bulsara , Matthew T. Currie , Anthony J. Lochtefeld
发明人： Mayank Bulsara , Matthew T. Currie , Anthony J. Lochtefeld
IPC分类号： H01L27/108 , H01L21/8242
CPC分类号： H01L27/10829 , H01L27/1087 , H01L27/10894 , H01L27/10897 , H01L28/40 , H01L29/1054 , H01L29/7849 , H01L29/945
摘要： DRAM trench capacitors formed by, inter alia, deposition of conductive material into a trench or doping the semiconductor region in which the trench is defined.
摘要翻译：尤其是通过将导电材料沉积到沟槽中或掺杂限定沟槽的半导体区域形成的DRAM沟槽电容器。

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