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11. 发明申请

US20100301387A1 SEMICONDUCTOR DEVICE AND METHOD FOR ITS PRODUCTION 有权
标题翻译：半导体器件及其制造方法
公开(公告)号：US20100301387A1
公开(公告)日：2010-12-02
申请号：US12733775
申请日：2008-09-17
申请人： Ning Qu , Alfred Goerlach
发明人： Ning Qu , Alfred Goerlach
IPC分类号： H01L29/866 , H01L29/739
CPC分类号： H01L29/868 , H01L29/0611 , H01L29/0623 , H01L29/161 , H01L29/861 , H01L29/872 , H01L2924/0002 , H01L2924/00
摘要： A semiconductor system is described, which is made up of a highly n-doped silicon substrate and a first n-silicon epitaxial layer, which is directly contiguous to the highly n-doped silicon substrate, and having a p-doped SiGe layer, which is contiguous to a second n-doped silicon epitaxial layer and forms a heterojunction diode, which is situated above the first n-doped silicon epitaxial layer and in which the pn-junction is situated within the p-doped SiGe layer. The first n-silicon epitaxial layer has a higher doping concentration than the second n-silicon epitaxial layer. Situated between the two n-doped epitaxial layers is at least one p-doped emitter trough, which forms a buried emitter, a pn-junction both to the first n-doped silicon epitaxial layer and also to the second n-doped silicon epitaxial layer being formed, and the at least one emitter trough being completely enclosed by the two epitaxial layers.
摘要翻译：描述了半导体系统，其由高度n掺杂的硅衬底和与第一n型硅衬底直接相邻并具有p掺杂的SiGe层的第一n型硅外延层组成，其中与第二n掺杂硅外延层邻接并形成异质结二极管，其位于第一n掺杂硅外延层之上，并且其中pn结位于p掺杂SiGe层内。第一n硅外延层具有比第二n硅外延层更高的掺杂浓度。位于两个n掺杂外延层之间的是至少一个p掺杂的发射极沟槽，其形成掩埋发射极，pn结与第一n掺杂硅外延层以及第二n掺杂硅外延层并且所述至少一个发射极槽被两个外延层完全包围。

12. 发明申请

US20080128850A1 Semiconductor Device And Method For Manufacturing Same 有权
标题翻译：半导体器件及其制造方法相同
公开(公告)号：US20080128850A1
公开(公告)日：2008-06-05
申请号：US11667440
申请日：2005-09-13
申请人： Alfred Goerlach , Ning Qu
发明人： Alfred Goerlach , Ning Qu
IPC分类号： H01L29/872 , H01L21/329
CPC分类号： H01L29/8725 , H01L29/66143 , H01L29/861 , H01L29/872
摘要： A semiconductor device (20) comprising a trench MOS barrier Schottky diode having an integrated PN diode and a method for manufacturing same are described.
摘要翻译：描述了包括具有集成PN二极管的沟槽MOS势垒肖特基二极管及其制造方法的半导体器件（20）。

13. 发明授权

US09263597B2 Semiconductor arrangement having a Schottky diode 有权
标题翻译：具有肖特基二极管的半导体装置
公开(公告)号：US09263597B2
公开(公告)日：2016-02-16
申请号：US13882412
申请日：2011-09-09
申请人： Ning Qu , Alfred Goerlach
发明人： Ning Qu , Alfred Goerlach
IPC分类号： H01L29/872 , H01L29/40 , H01L29/417
CPC分类号： H01L29/872 , H01L29/404 , H01L29/417
摘要： A semiconductor assemblage of a super-trench Schottky barrier diode (STSBD) made up of an n+ substrate, an n-epilayer, trenches etched into the n-epilayer that have a width and a distance from the n+ substrate, mesa regions between the adjacent trenches having a width, a metal layer on the front side of the chip that is a Schottky contact and serves as an anode electrode, and a metal layer on the back side of the chip that is an ohmic contact and serves as a cathode electrode, wherein multiple Schottky contacts having a width or distance and a distance between the Schottky contacts, and between the Schottky contact as anode electrode and the first Schottky contact, are located on the trench wall.
摘要翻译：由n +衬底，n-外延层，蚀刻到n-外延层中的与n +衬底具有宽度和距离的沟槽组成的超沟槽肖特基势垒二极管（STSBD）的半导体组件，相邻的n +衬底之间的台面区域具有宽度的沟槽，作为肖特基接触的芯片的前侧上的金属层，用作阳极电极，以及作为欧姆接触并用作阴极电极的芯片背面的金属层，其中具有宽度或距离以及肖特基接触之间以及作为阳极电极的肖特基接触和第一肖特基接触之间的多个肖特基接触位于沟槽壁上。

14. 发明授权

US09082628B2 Trench schottky diode 有权
标题翻译：沟槽肖特基二极管
公开(公告)号：US09082628B2
公开(公告)日：2015-07-14
申请号：US13984604
申请日：2011-12-14
申请人： Ning Qu , Alfred Goerlach
发明人： Ning Qu , Alfred Goerlach
IPC分类号： H01L29/47 , H01L29/06 , H01L29/36 , H01L29/872
CPC分类号： H01L29/0615 , H01L29/36 , H01L29/872 , H01L29/8725
摘要： A trench Schottky diode is described, which has a highly doped substrate of a first conductivity type and an epitaxial layer of the same conductivity type that is applied to the substrate. At least two trenches are introduced into the epitaxial layer. The epitaxial layer is a stepped epitaxial layer that has two partial layers of different doping concentrations.
摘要翻译：描述了一种沟槽肖特基二极管，其具有第一导电类型的高掺杂衬底和施加到衬底的相同导电类型的外延层。至少两个沟槽被引入到外延层中。外延层是具有不同掺杂浓度的两个部分层的阶梯式外延层。

15. 发明授权

US08836072B2 Semiconductor system including a schottky diode 有权
标题翻译：包括肖特基二极管的半导体系统
公开(公告)号：US08836072B2
公开(公告)日：2014-09-16
申请号：US13382982
申请日：2010-06-09
申请人： Ning Qu , Alfred Goerlach
发明人： Ning Qu , Alfred Goerlach
IPC分类号： H01L29/66
CPC分类号： H01L29/872 , H01L29/0619 , H01L29/66143
摘要： A semiconductor system is described, which includes a trench junction barrier Schottky diode having an integrated p-n type diode as a clamping element, which is suitable for use in motor vehicle generator system, in particular as a Zener diode having a breakdown voltage of approximately 20V. In this case, the TJBS is a combination of a Schottky diode and a p-n type diode. Where the breakdown voltages are concerned, the breakdown voltage of the p-n type diode is lower than the breakdown voltage of Schottky diode. The semiconductor system may therefore be operated using high currents at breakdown.
摘要翻译：描述了一种半导体系统，其包括具有集成p-n型二极管作为钳位元件的沟槽结屏障肖特基二极管，其适用于机动车辆发电机系统，特别是作为击穿电压为约20V的齐纳二极管。在这种情况下，TJBS是肖特基二极管和p-n型二极管的组合。在击穿电压的情况下，p-n型二极管的击穿电压低于肖特基二极管的击穿电压。因此，半导体系统可以在击穿时使用大电流来操作。

16. 发明申请

US20140035090A1 TRENCH SCHOTTKY DIODE 有权
标题翻译： TRENCH肖特基二极管
公开(公告)号：US20140035090A1
公开(公告)日：2014-02-06
申请号：US13984604
申请日：2011-12-14
申请人： Ning Qu , Alfred Goerlach
发明人： Ning Qu , Alfred Goerlach
IPC分类号： H01L29/06 , H01L29/872
CPC分类号： H01L29/0615 , H01L29/36 , H01L29/872 , H01L29/8725
摘要： A trench Schottky diode is described, which has a highly doped substrate of a first conductivity type and an epitaxial layer of the same conductivity type that is applied to the substrate. At least two trenches are introduced into the epitaxial layer. The epitaxial layer is a stepped epitaxial layer that has two partial layers of different doping concentrations.
摘要翻译：描述了一种沟槽肖特基二极管，其具有第一导电类型的高掺杂衬底和施加到衬底的相同导电类型的外延层。至少两个沟槽被引入到外延层中。外延层是具有不同掺杂浓度的两个部分层的阶梯式外延层。

17. 发明申请

US20080197439A1 Semiconductor Device And Method For Manufacturing Same 有权
标题翻译：半导体器件及其制造方法相同
公开(公告)号：US20080197439A1
公开(公告)日：2008-08-21
申请号：US11666788
申请日：2005-10-21
申请人： Alfred Goerlach , Ning Qu
发明人： Alfred Goerlach , Ning Qu
IPC分类号： H01L29/872 , H01L29/861 , H01L21/329 , H01L29/866
CPC分类号： H01L29/66143 , H01L29/0619 , H01L29/8611 , H01L29/872 , H01L29/8725
摘要： A semiconductor device including a Schottky diode of the trench-junction-barrier type having an integrated PN diode, and a corresponding method for manufacturing the device, are provided. An n layer is provided on an nt substrate, and trenches are provided in the n layer. The trenches are provided with p-doped regions. The nt substrate and the n layer carry a contact layer.
摘要翻译：提供了包括具有集成PN二极管的沟槽结阻挡型的肖特基二极管的半导体器件和用于制造器件的相应方法。 n层设置在n + t衬底上，沟槽设置在n层中。沟槽设置有p掺杂区域。 n层衬底和n层承载接触层。

18. 发明授权

US09263515B2 Super-junction schottky PIN diode 有权
标题翻译：超结肖特基PIN二极管
公开(公告)号：US09263515B2
公开(公告)日：2016-02-16
申请号：US14236604
申请日：2012-07-19
申请人： Ning Qu , Alfred Goerlach
发明人： Ning Qu , Alfred Goerlach
IPC分类号： H01L29/872 , H01L29/06 , H01L29/66 , H01L29/868
CPC分类号： H01L29/0634 , H01L29/0649 , H01L29/66143 , H01L29/868 , H01L29/872
摘要： A semiconductor chip has an n+-doped substrate, above which an n-doped epilayer having trenches is introduced, the trenches being filled with p-doped semiconductor material and in each case having a highly p-doped region at their top side, such that an alternating arrangement of n-doped regions having a first width and p-doped regions having a second width is present. A first metal layer functioning as an anode is provided on the front side of the chip and forms a Schottky contact with the n-doped epilayer and forms an ohmic contact with the highly p-doped regions. A second metal layer which represents an ohmic contact and functioning as a cathode is formed on the rear side of the semiconductor chip. A dielectric layer is provided between each n-doped region and an adjacent p-doped region.
摘要翻译：半导体芯片具有n +掺杂的衬底，其上引入具有沟槽的n掺杂外延层，沟槽被p掺杂半导体材料填充，并且在每种情况下在其顶侧具有高p掺杂区域，使得存在具有第一宽度的n掺杂区域和具有第二宽度的p掺杂区域的交替布置。用作阳极的第一金属层设置在芯片的正面，并与n掺杂的外延层形成肖特基接触，并与高p掺杂区形成欧姆接触。表示欧姆接触并用作阴极的第二金属层形成在半导体芯片的后侧。在每个n掺杂区域和相邻的p掺杂区域之间提供介电层。

19. 发明授权

US09006858B2 High-voltage trench junction barrier Schottky diode 有权
标题翻译：高压沟槽结屏障肖特基二极管
公开(公告)号：US09006858B2
公开(公告)日：2015-04-14
申请号：US14361988
申请日：2012-11-12
申请人： Ning Qu , Alfred Goerlach
发明人： Ning Qu , Alfred Goerlach
IPC分类号： H01L29/47 , H01L29/40 , H01L29/872 , H01L29/06
CPC分类号： H01L29/8725 , H01L29/0634 , H01L29/47 , H01L29/861 , H01L29/872
摘要： In a Schottky diode having an n+-type substrate, an n-type epitaxial layer, at least two p-doped trenches introduced into the n-type epitaxial layer, mesa regions between adjacent trenches, a metal layer functioning as a cathode electrode, and another metal layer functioning as an anode electrode, the thickness of the epitaxial layer is more than four times the depth of the trenches.
摘要翻译：在具有n +型衬底的肖特基二极管中，n型外延层，引入到n型外延层中的至少两个p掺杂沟槽，相邻沟槽之间的台面区域，用作阴极电极的金属层，以及作为阳极电极的另一金属层，外延层的厚度是沟槽深度的四倍以上。

20. 发明授权

US08816467B2 Semiconductor device and method for manufacturing same 有权
标题翻译：半导体装置及其制造方法
公开(公告)号：US08816467B2
公开(公告)日：2014-08-26
申请号：US11666788
申请日：2005-10-21
申请人： Alfred Goerlach , Ning Qu
发明人： Alfred Goerlach , Ning Qu
IPC分类号： H01L29/66
CPC分类号： H01L29/66143 , H01L29/0619 , H01L29/8611 , H01L29/872 , H01L29/8725
摘要： A semiconductor device including a Schottky diode of the trench-junction-barrier type having an integrated PN diode, and a corresponding method for manufacturing the device, are provided. An n layer is provided on an nt substrate, and trenches are provided in the n layer. The trenches are provided with p-doped regions. The nt substrate and the n layer carry a contact layer.
摘要翻译：提供了包括具有集成PN二极管的沟槽结阻挡型的肖特基二极管的半导体器件和用于制造器件的相应方法。在nt衬底上设置n层，在n层设置沟槽。沟槽设置有p掺杂区域。 nt衬底和n层承载接触层。

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