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11. 发明申请

US20120062321A1 POWER AMPLIFIER 有权
标题翻译：功率放大器
公开(公告)号：US20120062321A1
公开(公告)日：2012-03-15
申请号：US13079046
申请日：2011-04-04
申请人： Kazuya Yamamoto , Miyo Miyashita , Satoshi Suzuki , Takayuki Matsuzuka
发明人： Kazuya Yamamoto , Miyo Miyashita , Satoshi Suzuki , Takayuki Matsuzuka
IPC分类号： H03F3/20
CPC分类号： H03F3/195 , H03F1/0277 , H03F3/189 , H03F3/245 , H03F3/72 , H03F2200/27 , H03F2200/411 , H03F2203/7206 , H03F2203/7236 , H03G1/0088
摘要： A power amplifier comprises: an amplifying transistor for amplifying an input signal; a reference voltage generating circuit which generates a reference voltage; a bias circuit generating a bias voltage based on the reference voltage and supplying the bias voltage to the amplifying transistor; and a booster elevating an enable voltage input from outside and outputting the enable voltage. The reference voltage generating circuit is turned ON/OFF in correspondence with an output voltage of the booster. The booster includes: an enable terminal to which the enable voltage is applied; a power source terminal connected to a power source; a transistor having a control electrode connected to the enable terminal, a first electrode connected to the power source terminal, and a second electrode that is grounded; and a FET resistor connected between the first electrode of the transistor and the power source terminal. A gate electrode of the FET resistor is open.
摘要翻译：功率放大器包括：放大晶体管，用于放大输入信号; 产生参考电压的基准电压产生电路; 偏置电路，基于所述参考电压产生偏置电压，并将所述偏置电压提供给所述放大晶体管; 并且升压器提升从外部输入的使能电压并输出使能电压。参考电压产生电路对应于升压器的输出电压而导通/截止。升压器包括：施加使能电压的使能端子; 连接到电源的电源端子; 具有连接到使能端子的控制电极的晶体管，连接到电源端子的第一电极和接地的第二电极; 以及连接在晶体管的第一电极和电源端子之间的FET电阻器。 FET电阻的栅电极断开。

12. 发明申请

US20110187459A1 EMITTER-FOLLOWER TYPE BIAS CIRCUIT 有权
标题翻译：发射器 - 型号偏置电路
公开(公告)号：US20110187459A1
公开(公告)日：2011-08-04
申请号：US12875168
申请日：2010-09-03
申请人： Takayuki Matsuzuka , Kazuya Yamamoto , Tomoyuki Asada
发明人： Takayuki Matsuzuka , Kazuya Yamamoto , Tomoyuki Asada
IPC分类号： H03F3/16
CPC分类号： H03F3/16
摘要： An emitter-follower bias circuit supplying a bias voltage to the base of an amplification transistor includes: a depletion mode FET boosting a reference voltage; and an emitter-follower circuit generating the bias voltage in response to the reference voltage boosted by the depletion mode FET.
摘要翻译：向放大晶体管的基极提供偏置电压的射极跟随器偏置电路包括：耗尽型FET，提高参考电压; 以及射极跟随器电路，其响应于由耗尽型FET升压的参考电压而产生偏置电压。

13. 发明授权

US07928804B2 Power amplifier 有权
标题翻译：功率放大器
公开(公告)号：US07928804B2
公开(公告)日：2011-04-19
申请号：US12612755
申请日：2009-11-05
申请人： Kazuya Yamamoto , Satoshi Suzuki , Takao Haruna , Takao Moriwaki
发明人： Kazuya Yamamoto , Satoshi Suzuki , Takao Haruna , Takao Moriwaki
IPC分类号： H03F3/16
CPC分类号： H01L29/778 , H01L27/0605 , H01L27/0623 , H01L29/0826 , H01L29/165 , H01L29/7371 , H03F3/195 , H03F2200/18 , H03F2200/411
摘要： A power amplifier includes: a semiconductor substrate; a preceding-stage amplifying device on the semiconductor substrate, amplifying an input signal; a following-stage amplifying device on the semiconductor substrate, amplifying an output signal of the preceding-stage amplifying device; and an inter-stage matching circuit connecting the preceding-stage amplifying device to the following-stage amplifying device. The preceding-stage amplifying device has a first field effect transistor; the following-stage amplifying device has a heterojunction bipolar transistor; and the inter-stage matching circuit has a capacitance galvanically separating the output terminal of the preceding-stage amplifying device from the input terminal of the following-stage amplifying device.
摘要翻译：功率放大器包括：半导体衬底; 在半导体衬底上的前级放大装置，放大输入信号; 在半导体衬底上的后级放大装置，放大前级放大装置的输出信号; 以及将前级放大装置连接到后级放大装置的级间匹配电路。前级放大装置具有第一场效应晶体管; 后级放大装置具有异质结双极晶体管; 并且级间匹配电路具有将前级放大装置的输出端子与后级放大装置的输入端子电流分离的电容。

14. 发明授权

US07907032B2 Directional coupler 有权
标题翻译：定向耦合器
公开(公告)号：US07907032B2
公开(公告)日：2011-03-15
申请号：US12464919
申请日：2009-05-13
申请人： Kazuya Yamamoto , Miyo Miyashita
发明人： Kazuya Yamamoto , Miyo Miyashita
IPC分类号： H01P5/18 , H03H11/16
CPC分类号： H01P5/18
摘要： A directional coupler includes a main line connected at a first end to an input port and at a second end to an output port, a coupled line connected at a first end to a coupled port and at a second end to an isolated port, and a phase shifter connected at a first end to the isolated port and at a second end to the coupled port. The phase shifter phase shifts a second reflected wave component such that the second reflected wave component is opposite in phase to a first reflected wave component, the second reflected wave component traveling from the output port to the coupled port through the isolated port and the phase shifter, the first reflected wave component traveling from the output port to the coupled port through the coupled line.
摘要翻译：定向耦合器包括在第一端连接到输入端口并且在第二端连接到输出端口的主线，在第一端处连接到耦合端口并且在第二端部处连接到隔离端口的耦合线，以及移相器在第一端连接到隔离端口，在第二端连接到耦合端口。移相器相移第二反射波分量，使得第二反射波分量与第一反射波分量相位相反，第二反射波分量通过隔离端口和相移器从输出端口传播到耦合端口第一反射波分量从输出端口通过耦合线行进到耦合端口。

15. 发明授权

US07880917B2 Image forming apparatus and print system 有权
标题翻译：图像形成装置和打印系统
公开(公告)号：US07880917B2
公开(公告)日：2011-02-01
申请号：US10996954
申请日：2004-11-24
申请人： Kazuya Yamamoto
发明人： Kazuya Yamamoto
IPC分类号： G06F15/00
CPC分类号： G06K15/00 , G06K15/1817
摘要： When a jam occurs, a CPU stops reading of compression data, receives again all of the read-out compression data of a page to which the reading-stopped compression data belongs, and stores it into each of corresponding storing areas in a reception buffer again. A time necessary for communication between a host and a printer at the time of jam recovery can be shortened.
摘要翻译：当卡纸发生时，CPU停止读取压缩数据，再次接收读取停止的压缩数据所属的页面的所有读出的压缩数据，并将其再次存储在接收缓冲器中的每个相应的存储区域中。可以缩短卡纸恢复时主机与打印机之间的通信所需的时间。

16. 发明申请

US20110018639A1 POWER AMPLIFIER BIAS CIRCUIT 有权
标题翻译：功率放大器偏置电路
公开(公告)号：US20110018639A1
公开(公告)日：2011-01-27
申请号：US12712234
申请日：2010-02-25
申请人： Takayuki Matsuzuka , Kazuya Yamamoto , Atsushi Okamura
发明人： Takayuki Matsuzuka , Kazuya Yamamoto , Atsushi Okamura
IPC分类号： H03F3/04
CPC分类号： H03F1/0261 , H03F3/195 , H03F3/245 , H03F2200/18 , H03F2200/451 , H03F2200/555
摘要： A power amplifier and bias circuit includes a combination circuit in which a voltage drive bias circuit and a current drive bias circuit are connected in a parallel relationship with each other. The power amplifier bias circuit also includes an idle current control circuit which uses the collector voltage of amplifier transistors. When the collector voltage of the amplifier transistors is lower than the threshold voltage of a first transistor (approximately 1.3 V), the first transistor is turned off. At that time, since the reference voltage (2.4-2.5 V) is higher than the voltage for turning on both a second transistor and a diode (namely, approximately 1.3 V plus 0.7 V), a current flows and the first transistor turns on. As a result, a current is drawn from the bases of the amplifier transistors to GND through two resistances, so that the idle currents of the amplifier transistors decrease.
摘要翻译：功率放大器和偏置电路包括其中电压驱动偏置电路和电流驱动偏置电路彼此并联连接的组合电路。功率放大器偏置电路还包括使用放大器晶体管的集电极电压的空闲电流控制电路。当放大器晶体管的集电极电压低于第一晶体管（约1.3V）的阈值电压时，第一晶体管截止。此时，由于参考电压（2.4-2.5V）高于用于接通第二晶体管和二极管的电压（即，大约1.3V加上0.7V），所以电流流过，第一晶体管导通。结果，通过两个电阻将电流从放大器晶体管的基极拉到GND，使得放大器晶体管的空闲电流减小。

17. 发明申请

US20100301944A1 POWER AMPLIFIER 有权
标题翻译：功率放大器
公开(公告)号：US20100301944A1
公开(公告)日：2010-12-02
申请号：US12612755
申请日：2009-11-05
申请人： Kazuya Yamamoto , Satoshi Suzuki , Takao Haruna , Takao Moriwaki
发明人： Kazuya Yamamoto , Satoshi Suzuki , Takao Haruna , Takao Moriwaki
IPC分类号： H03F3/16
CPC分类号： H01L29/778 , H01L27/0605 , H01L27/0623 , H01L29/0826 , H01L29/165 , H01L29/7371 , H03F3/195 , H03F2200/18 , H03F2200/411
摘要： A power amplifier includes: a semiconductor substrate; a preceding-stage amplifying device on the semiconductor substrate, amplifying an input signal; a following-stage amplifying device on the semiconductor substrate, amplifying an output signal of the preceding-stage amplifying device; and an inter-stage matching circuit connecting the preceding-stage amplifying device to the following-stage amplifying device. The preceding-stage amplifying device has a first field effect transistor; the following-stage amplifying device has a heterojunction bipolar transistor; and the inter-stage matching circuit has a capacitance galvanically separating the output terminal of the preceding-stage amplifying device from the input terminal of the following-stage amplifying device.
摘要翻译：功率放大器包括：半导体衬底; 在半导体衬底上的前级放大装置，放大输入信号; 在半导体衬底上的后级放大装置，放大前级放大装置的输出信号; 以及将前级放大装置连接到后级放大装置的级间匹配电路。前级放大装置具有第一场效应晶体管; 后级放大装置具有异质结双极晶体管; 并且级间匹配电路具有将前级放大装置的输出端子与后级放大装置的输入端子电流分离的电容。

18. 发明申请

US20100186898A1 PLASMA PROCESSING APPARATUS 有权
标题翻译：等离子体加工设备
公开(公告)号：US20100186898A1
公开(公告)日：2010-07-29
申请号：US12686060
申请日：2010-01-12
申请人： Kohei FUKUSHIMA , Toshiki Takahashi , Hiroyuki Matsuura , Yutaka Motoyama , Kazuya Yamamoto
发明人： Kohei FUKUSHIMA , Toshiki Takahashi , Hiroyuki Matsuura , Yutaka Motoyama , Kazuya Yamamoto
IPC分类号： C23F1/08 , C23C16/505
CPC分类号： C23C16/345 , C23C16/4401 , C23C16/452 , H01J37/321 , H01J37/3244
摘要： A vertical plasma processing apparatus for performing a plasma process on a plurality of target objects together at a time includes an activation mechanism configured to turn a process gas into plasma. The activation mechanism includes a vertically elongated plasma generation box attached to a process container at a position corresponding to a process field and confining a plasma generation area airtightly communicating with the process field, an ICP electrode disposed outside the plasma generation box and extending in a longitudinal direction of the plasma generation box, and an RF power supply connected to the ICP electrode. The ICP electrode includes a separated portion separated from a wall surface of the plasma generation box by a predetermined distance.
摘要翻译：一次在一起对多个目标物体进行等离子体处理的垂直等离子体处理装置包括将处理气体转换为等离子体的启动机构。激活机构包括垂直延长的等离子体生成箱，其在对应于处理场的位置处附接到处理容器，并限制与过程场气密地通信的等离子体产生区域; ICP电极，设置在等离子体生成箱的外部并且沿纵向延伸等离子体生成箱的方向，以及与ICP电极连接的RF电源。 ICP电极包括与等离子体发生箱的壁面隔开预定距离的分离部分。

19. 发明授权

US07688133B2 Power amplifier 有权
标题翻译：功率放大器
公开(公告)号：US07688133B2
公开(公告)日：2010-03-30
申请号：US12254069
申请日：2008-10-20
申请人： Kazuya Yamamoto , Miyo Miyashita
发明人： Kazuya Yamamoto , Miyo Miyashita
IPC分类号： H03F1/14
CPC分类号： H03F3/191 , H03F1/0261 , H03F3/72 , H03F2200/18 , H03F2200/408 , H03F2203/7239
摘要： A power amplifier includes: an amplifying transistor; a bias circuit; a first diode; a second diode; a matching attenuating circuit; a first current mirror circuit; a serial resonant circuit, and a switch. In an amplification mode, the bias circuit supplies a bias current to the amplifying transistor, and the first current mirror circuit turns off the first and second diodes, and the switch. In an attenuation mode, the bias circuit supplies no bias current to the amplifying transistor, and the first current mirror circuit turns on the first and second diodes and the switch.
摘要翻译：功率放大器包括：放大晶体管; 偏置电路; 第一个二极管; 第二个二极管; 匹配衰减电路; 第一电流镜电路; 串联谐振电路和开关。在放大模式中，偏置电路向放大晶体管提供偏置电流，并且第一电流镜电路关断第一和第二二极管以及开关。在衰减模式中，偏置电路不向放大晶体管提供偏置电流，并且第一电流镜电路导通第一和第二二极管和开关。

20. 发明申请

US20090124083A1 Film formation apparatus and method for using same 有权
标题翻译：成膜装置及其使用方法
公开(公告)号：US20090124083A1
公开(公告)日：2009-05-14
申请号：US12285575
申请日：2008-10-08
申请人： Nobutake Nodera , Jun Sato , Kazuya Yamamoto , Kazuhide Hasebe
发明人： Nobutake Nodera , Jun Sato , Kazuya Yamamoto , Kazuhide Hasebe
IPC分类号： H01L21/306
CPC分类号： C23C16/345 , C23C16/0218 , C23C16/4405 , C23C16/452 , C23C16/45542 , H01J37/32082 , H01J37/3244 , H01J37/32522
摘要： A method for using a film formation apparatus for a semiconductor process to form a thin film on a target substrate while supplying a film formation reactive gas from a first nozzle inside a reaction chamber includes performing a cleaning process to remove a by-product film deposited inside the reaction chamber and the first nozzle, in a state where the reaction chamber does not accommodate the target substrate. The cleaning process includes, in order, an etching step of supplying a cleaning reactive gas for etching the by-product film into the reaction chamber, and activating the cleaning reactive gas, thereby etching the by-product film, and an exhaust step of stopping supply of the cleaning reactive gas and exhausting gas from inside the reaction chamber. The etching step is arranged to use conditions that cause the cleaning reactive gas supplied in the reaction chamber to flow into the first nozzle.
摘要翻译：在反应室内的第一喷嘴供给成膜反应性气体的同时，使用半导体工艺的成膜装置在目标基板上形成薄膜的方法包括进行清洗处理以除去内部沉积的副产物膜反应室和第一喷嘴，处于反应室不容纳目标基板的状态。清洗工序依次包括：将清洗反应性气体供给到反应室内的蚀刻工序，激活清洗反应性气体，蚀刻副产物膜，以及停止排出工序从反应室内供给清洗反应气体和排气。蚀刻步骤被设置为使得在反应室中供应的清洁反应气体流入第一喷嘴的条件。

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