专利快速检索-快速检索全球专利，免费商用专利数据库-IPRDB

11. 发明授权

US08338907B2 Semiconductor device and method of manufacturing the same 有权
标题翻译：半导体装置及其制造方法
公开(公告)号：US08338907B2
公开(公告)日：2012-12-25
申请号：US13355036
申请日：2012-01-20
申请人： Hironori Aoki
发明人： Hironori Aoki
IPC分类号： H01L29/06
CPC分类号： H01L29/7811 , H01L29/063 , H01L29/0638 , H01L29/0661 , H01L29/0696 , H01L29/402 , H01L29/41741 , H01L29/7395 , H01L2924/0002 , H01L2924/00
摘要： A semiconductor device includes a first semiconductor region and a second semiconductor region provided on a main surface of a substrate, being apart from each other and having first conductivity; a third semiconductor region provided between the first semiconductor region and the second semiconductor region and having second conductivity opposite to the first conductivity; a fourth semiconductor region provided on a main surface of the substrate, connected to the third semiconductor region, manufactured together with the third semiconductor region in the same manufacturing process, and having the conductivity same as that of the third semiconductor region; and trenches made on the main surface of the fourth semiconductor region and having a depth smaller than a junction depth of the fourth semiconductor region.
摘要翻译：半导体器件包括设置在基板的主表面上的第一半导体区域和第二半导体区域，彼此分开并具有第一导电性; 第三半导体区域，设置在所述第一半导体区域和所述第二半导体区域之间，并且具有与所述第一导电性相反的第二导电性; 第四半导体区域，设置在与所述第三半导体区域连接的所述基板的主表面上，与所述第三半导体区域同一制造工序制造，并具有与所述第三半导体区域相同的导电性; 以及在第四半导体区域的主表面上形成的深度小于第四半导体区域的结深度的深度的沟槽。

12. 发明申请

US20100019677A1 PLASMA PRODUCING APPARATUS AND METHOD OF PLASMA PRODUCTION 有权
标题翻译：等离子体生产设备和等离子体生产方法
公开(公告)号：US20100019677A1
公开(公告)日：2010-01-28
申请号：US12518737
申请日：2007-06-12
申请人： Katsuhisa Kitano , Satoshi Hamaguchi , Hironori Aoki
发明人： Katsuhisa Kitano , Satoshi Hamaguchi , Hironori Aoki
IPC分类号： H05H1/24
CPC分类号： H05H1/44 , H05H1/2406 , H05H2001/2462
摘要： For production of plasma from a medium gas mass in an elongated shape, electric field forming elements 3, 4 that form an electric field in the medium gas mass are provided. The electric field forming elements form an electric field so that partial discharge occurs from the electric field forming elements toward both sides in the longitudinal direction of the medium gas mass. Accordingly, plasma 5 is produced from the medium gas mass. The medium gas mass is formed by, for example, gas supply members 1,2 that guide medium gas, through an internal hollow, to the electric field forming elements. An electric field forming area includes, for example, at least one high-potential electrode 3 and a voltage applying unit 4 that applies a voltage to the high-potential electrode. Plasma limited in medium gas can be produced with high energy efficiency stably over a wide range of parameters through a simple configuration.
摘要翻译：为了从细长形状的中等气体质量生产等离子体，提供了在中等气体质量中形成电场的电场形成元件3,4。电场形成元件形成电场，使得从电场形成元件朝向中等气体质量的纵向方向的两侧发生局部放电。因此，从中等气体质量产生等离子体5。中等气体质量由例如通过内部空心引导介质气体的气体供给构件1,2形成于电场形成元件。电场形成区域例如包括向高电位电极施加电压的至少一个高电位电极3和电压施加单元4。中等气体中的等离子体可以通过简单的结构在宽范围的参数下稳定地以高能量效率产生。

13. 发明授权

US07113246B2 Image display having internal wiring with multi-layer structure and manufacturing method thereof having particular wiring connection 失效
标题翻译：具有多层结构的内部布线的图像显示器及其制造方法具有特定的布线连接
公开(公告)号：US07113246B2
公开(公告)日：2006-09-26
申请号：US10327906
申请日：2002-12-26
申请人： Takehisa Yamaguchi , Hironori Aoki
发明人： Takehisa Yamaguchi , Hironori Aoki
IPC分类号： G02F1/1345 , G02F1/1343
CPC分类号： G02F1/13452 , H01L23/49822 , H01L23/49838 , H01L23/5389 , H01L24/24 , H01L24/25 , H01L24/82 , H01L2224/24145 , H01L2224/24225 , H01L2224/24226 , H01L2924/01004 , H01L2924/01005 , H01L2924/01006 , H01L2924/01019 , H01L2924/01024 , H01L2924/01033 , H01L2924/01047 , H01L2924/14 , H01L2924/19043
摘要： An image display in which a resistance value of internal wiring for inputting a signal and a power supply to a driving IC COG-packaged on an insulating substrate composing a display panel is reduced without enlarging external size of the display panel, and a method of manufacturing the image display. In internal wiring 8 for inputting a signal and a power supply to a driving IC 4 COG-packaged on a first insulating substrate 1, first layer internal wiring 8a is composed of a first conductive film forming a scanning line, etc., and second layer internal wiring 8b is composed of a second conductive film forming a signal line, etc. Connecting wiring 15 for connecting the first layer internal wiring 8a and the second layer internal wiring 8b is formed simultaneously with formation of a display electrode, and the internal wiring 8 is formed into a multi-layer structure connected electrically parallel.
摘要翻译：在不扩大显示面板的外部尺寸的情况下，减小了用于输入信号的内部布线的电阻值和构成组成显示面板的绝缘基板上的COG的驱动IC COG的电源的制造方法图像显示。在用于输入信号的内部布线8和对第一绝缘基板1上的COG封装的驱动IC4的电力供给中，第一层内部布线8a由形成扫描线等的第一导电膜，第二导电膜层内部布线8b由形成信号线等的第二导电膜构成。用于连接第一层内部布线8a和第二层内部布线8b的连接布线15同时形成显示电极，并且内部布线8形成为并联连接的多层结构。

14. 发明授权

US06919942B2 Display apparatus 有权
标题翻译：显示装置
公开(公告)号：US06919942B2
公开(公告)日：2005-07-19
申请号：US10237025
申请日：2002-09-09
申请人： Hironori Aoki , Shigeaki Noumi , Takafumi Hashiguchi
发明人： Hironori Aoki , Shigeaki Noumi , Takafumi Hashiguchi
IPC分类号： G02F1/1335 , G02F1/13357 , G02F1/1362 , G02F1/1368 , G09F9/30 , G09F9/35 , H01L29/786 , G02F1/1343
CPC分类号： G02F1/136209
摘要： A display apparatus according to the present invention is provided with a gate line 2 formed on an insulating substrate, a source line 13 intersecting with the gate line 2 with an insulating film in between, a source electrode 6 connected to the source line 13, a drain electrode 10 connected to a pixel electrode 9, a semiconductor layer 4 formed below the source electrode 6, the source line 13, and the drain electrode 10, a light-shielding pattern 12 configured below the semiconductor layer 4 lying below the source line 13, and a backlight emitting lights from a light source to the surface of the insulating substrate opposite to where pixels are formed. In this configuration, leakage current arisen in the semiconductor layer lying below the source line, the extending pattern of the drain electrode, and so on can be suppressed.
摘要翻译：根据本发明的显示装置设置有形成在绝缘基板上的栅极线2，与栅极线2相交的源极线13，其间具有绝缘膜，连接到源极线13的源电极6，连接到像素电极9的漏电极10，形成在源电极6下面的半导体层4，源极线13和漏电极10，配置在源极线13下方的半导体层4下方的遮光图案12 以及从光源发射到与形成像素的绝缘基板的表面相反的光的背光。在该结构中，可以抑制位于源极线下方的半导体层，漏电极的延伸图案等的漏电流。

15. 发明授权

US07525625B2 Liquid crystal display device comprising a common signal line overlapping a sealing member and including at least two conductive layers with at least one of the conductive layers changing a pattern width 有权
标题翻译：液晶显示装置包括与密封构件重叠的公共信号线，并且包括至少两个导电层，其中至少一个导电层改变图案宽度
公开(公告)号：US07525625B2
公开(公告)日：2009-04-28
申请号：US11420154
申请日：2006-05-24
申请人： Hironori Aoki
发明人： Hironori Aoki
IPC分类号： G02F1/1343
CPC分类号： G02F1/136286 , G02F1/1345 , G02F2001/133388
摘要： A liquid crystal display device according to an embodiment of the present invention includes: a wiring substrate; an opposing substrate opposite to the wiring substrate; a sealing member for bonding the wiring substrate to the opposing substrate; a liquid crystal filled in a space defined by the wiring substrate, the opposing substrate, and the sealing member; a plurality of scanning signal lines formed in a display area formed inside the sealing member; a plurality of display signal lines formed in the display area and crossing the scanning signal lines with an insulating film interposed therebetween; and a common signal line formed outside the display area, the scanning signal lines, the scanning signal lines, and common signal line being formed on the wiring substrate, and the common signal line including at least two conductive layers with one of the conductive layers changing a pattern width below a pattern of the sealing member.
摘要翻译：根据本发明实施例的液晶显示装置包括：布线基板; 与布线基板相对的相对基板; 用于将布线基板接合到相对基板的密封构件; 填充在由布线基板，相对基板和密封部件限定的空间中的液晶; 多个扫描信号线形成在形成在密封部件内的显示区域中; 多个显示信号线，形成在所述显示区域中并且与所述扫描信号线交叉并且隔着绝缘膜; 以及形成在显示区域外部的公共信号线，扫描信号线，扫描信号线和公共信号线形成在布线基板上，并且公共信号线包括至少两个导电层，其中一个导电层改变图案宽度低于密封构件的图案。

16. 发明申请

US20080198108A1 Array substrate and display unit using it and production method for array substrate 审中-公开
标题翻译：使用阵列基板和显示单元及阵列基板的制作方法
公开(公告)号：US20080198108A1
公开(公告)日：2008-08-21
申请号：US12011194
申请日：2008-01-23
申请人： Hironori Aoki
发明人： Hironori Aoki
IPC分类号： G09G3/36
CPC分类号： G02F1/13458 , G02F1/1345 , G02F1/136213 , H01L27/124
摘要： The present invention provides an array substrate in which delay in signal transmission is reduced and provides a display device in which superior display quality is achieved, by using wirings of low resistivity, and moreover, by suppressing increase in wiring resistance caused by contact resistance. A display area in which pixel electrodes (5) are formed, a gate line (2) arranged between the pixel electrodes, a data line (4) crossing over the gate line, a terminal to which a scanning signal for the gate line is applied, an extended scanning line (14), formed from a conductive film of different layer from that for the gate line, for connecting the collected auxiliary capacitance line with the terminal, an auxiliary capacitance line (11) arranged in parallel to the gate line, a collected auxiliary capacitance line (13) arranged in parallel to the signal line and electrically connected to the auxiliary capacitance line, a terminal to which a common signal is applied, and an extended auxiliary capacitance line (15), formed from a conductive film of different layer from that for the collected auxiliary capacitance line, for connecting the collected auxiliary capacitance line with the terminal are formed.
摘要翻译：本发明提供一种降低信号传输延迟的阵列基板，并且通过使用低电阻率的布线，并且还抑制由接触电阻引起的布线电阻的增加，提供了实现优异显示质量的显示装置。其中形成像素电极（5）的显示区域，布置在像素电极之间的栅极线（2），与栅极线交叉的数据线（4），施加栅极线的扫描信号的端子由与栅极线不同层的导电膜形成的延长扫描线（14），用于将所收集的辅助电容线与端子连接，与栅极线并联布置的辅助电容线（11）与信号线平行设置并与辅助电容线电连接的收集的辅助电容线（13），施加公共信号的端子以及由导电膜形成的扩展辅助电容线（15）形成与收集的辅助电容线的层不同的层，用于将收集的辅助电容线与端子连接。

17. 发明申请

US20070002255A1 Image display and manufacturing method thereof 失效
标题翻译：其图像显示及制造方法
公开(公告)号：US20070002255A1
公开(公告)日：2007-01-04
申请号：US11518171
申请日：2006-09-11
申请人： Takehisa Yamaguchi , Hironori Aoki
发明人： Takehisa Yamaguchi , Hironori Aoki
IPC分类号： G02F1/1345
CPC分类号： G02F1/13452 , H01L23/49822 , H01L23/49838 , H01L23/5389 , H01L24/24 , H01L24/25 , H01L24/82 , H01L2224/24145 , H01L2224/24225 , H01L2224/24226 , H01L2924/01004 , H01L2924/01005 , H01L2924/01006 , H01L2924/01019 , H01L2924/01024 , H01L2924/01033 , H01L2924/01047 , H01L2924/14 , H01L2924/19043
摘要： An image display in which a resistance value of internal wiring for inputting a signal and a power supply to a driving IC COG-packaged on an insulating substrate composing a display panel is reduced without enlarging external size of the display panel, and a method of manufacturing the image display. In internal wiring 8 for inputting a signal and a power supply to a driving IC 4 COG-packaged on a first insulating substrate 1, first layer internal wiring 8a is composed of a first conductive film forming a scanning line, etc., and second layer internal wiring 8b is composed of a second conductive film forming a signal line, etc. Connecting wiring 15 for connecting the first layer internal wiring 8a and the second layer internal wiring 8b is formed simultaneously with formation of a display electrode, and the internal wiring 8 is formed into a multi-layer structure connected electrically parallel.
摘要翻译：在不扩大显示面板的外部尺寸的情况下，减小了用于输入信号的内部布线的电阻值和构成组成显示面板的绝缘基板上的COG的驱动IC COG的电源的制造方法图像显示。在用于输入信号的内部布线8和对第一绝缘基板1上的COG封装的驱动IC4的电力供给中，第一层内部布线8a由形成扫描线等的第一导电膜，第二导电膜层内部布线8b由形成信号线等的第二导电膜构成。用于连接第一层内部布线8a和第二层内部布线8b的连接布线15同时形成显示电极，并且内部布线8形成为并联连接的多层结构。

18. 发明授权

US06838696B2 Liquid crystal display 有权
标题翻译：液晶显示器
公开(公告)号：US06838696B2
公开(公告)日：2005-01-04
申请号：US09805039
申请日：2001-03-14
申请人： Kazuhiro Kobayashi , Nobuhiro Nakamura , Kazunori Inoue , Takuji Yoshida , Ken Nakashima , Yuichi Masutani , Hironori Aoki
发明人： Kazuhiro Kobayashi , Nobuhiro Nakamura , Kazunori Inoue , Takuji Yoshida , Ken Nakashima , Yuichi Masutani , Hironori Aoki
IPC分类号： G02F1/136 , G02F1/1362 , G02F1/1368 , H01L29/04
CPC分类号： G02F1/13458 , G02F1/136227 , G02F1/136286 , G02F1/1368 , G02F2001/136236
摘要： A thin film transistor array substrate including an insulating substrate, a first metallic pattern formed on the insulating substrate, and an insulating film provided on the first metallic pattern. A semiconductor pattern is provided on the insulating film, and a second metallic pattern is provided on the semiconductor pattern. The second metallic pattern is surrounded by the semiconductor pattern.
摘要翻译：一种薄膜晶体管阵列基板，包括绝缘基板，形成在所述绝缘基板上的第一金属图案以及设置在所述第一金属图案上的绝缘膜。半导体图案设置在绝缘膜上，第二金属图案设置在半导体图案上。第二金属图案被半导体图案包围。

19. 发明授权

US08587362B2 Gate driver and semiconductor device employing the same 有权
标题翻译：栅极驱动器和使用其的半导体器件
公开(公告)号：US08587362B2
公开(公告)日：2013-11-19
申请号：US13306265
申请日：2011-11-29
申请人： Osamu Machida , Hironori Aoki
发明人： Osamu Machida , Hironori Aoki
IPC分类号： H03K17/687
CPC分类号： H03K17/0822 , H02M1/32 , H02M1/36 , H02M3/33507
摘要： A gate driver for driving a gate of a switching element Tr7 includes a driving part that drives the switching element according to a control signal and an active clamp circuit to clamp the voltage between the first and second main terminals of the switching element through the driving part. If a voltage applied between a first main terminal (drain) and a second main terminal (source) of the switching element exceeds a predetermined voltage, the active clamp circuit forcibly blocks a driving operation of the driving part from driving the switching element.
摘要翻译：用于驱动开关元件Tr7的栅极的栅极驱动器包括驱动部件，其根据控制信号驱动开关元件和有源钳位电路，以通过驱动部分钳位开关元件的第一和第二主端子之间的电压。如果施加在开关元件的第一主端子（漏极）和第二主端子（源极）之间的电压超过预定电压，则有源钳位电路强制地阻止驱动部件的驱动操作来驱动开关元件。

20. 发明授权

US07964931B2 Semiconductor device 有权
标题翻译：半导体器件
公开(公告)号：US07964931B2
公开(公告)日：2011-06-21
申请号：US12212735
申请日：2008-09-18
申请人： Hironori Aoki
发明人： Hironori Aoki
IPC分类号： H01L29/66
CPC分类号： H01L29/7811 , H01L29/0634 , H01L29/0649 , H01L29/0696 , H01L29/1095
摘要： A semiconductor device 1 includes a square substrate 2, first RESURF structures 3 in the shape of planar stripes on an element area 10 of a main surface of the substrate 2, a transistor T arranged between the first RESURF structures 3, a first high withstand voltage section 11 constituted by second RESURF structures 3a in the shape of planar strips on a periphery of the main surface of the substrate 2, and a second high withstand voltage section 12 constituted by third RESURF structures 3b which are symmetrically arranged at corners of the substrate 2 with respect to a diagonal line D of the main surface of the substrate 2.
摘要翻译：半导体器件1包括正方形衬底2，在衬底2的主表面的元件区域10上的平面条纹形状的第一RESURF结构3，布置在第一RESURF结构3之间的晶体管T，第一高耐压由基板2的主表面的周边的平面条状的第二RESURF结构体3a构成的第一部分11以及由对称地布置在基板2的角部的第三RESURF结构3b构成的第二高耐压部分12 相对于基板2的主表面的对角线D.

你已经成功收藏专利！

检索式保存成功!

IPRDB

热门服务

关于我们

友情链接

联系方式