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11. 发明申请

US20070147833A1 Dynamic wavelength allocation apparatus and method 审中-公开
标题翻译：动态波长分配装置及方法
公开(公告)号：US20070147833A1
公开(公告)日：2007-06-28
申请号：US11591214
申请日：2006-11-01
申请人： Yun-Hee Cho , Kwang-Joon Kim
发明人： Yun-Hee Cho , Kwang-Joon Kim
IPC分类号： H04J14/00
CPC分类号： H04J14/0227 , H04J14/0212 , H04J14/0284
摘要： A wavelength allocation method and apparatus that is capable minimizing the number of wavelength converters is provided. In a dynamic wavelength multiplexing division network structure having a limited maximum transmission distance, an optical path is established to maximally suppress activation of a 3R wavelength converter, thereby maximizing efficiency of the 3R wavelength converter. In a dynamic wavelength multiplexing division network structure having a limited maximum transmission distance, a new optical path is established to minimize 3R wavelength conversion and suppress use of unnecessary expensive 3R wavelength converters and thereby increase network efficiency.
摘要翻译：提供了能够使波长转换器的数量最小化的波长分配方法和装置。在具有有限的最大传输距离的动态波长复用分割网络结构中，建立光路以最大限度地抑制3R波长转换器的激活，从而使3R波长转换器的效率最大化。在具有有限的最大传输距离的动态波长复用分割网络结构中，建立新的光路以最小化3R波长转换并抑制不必要昂贵的3R波长转换器的使用，从而提高网络效率。

12. 发明申请

US20070133985A1 Dynamic wavelength allocation device using 3R wavelength converter having limited wavelength conversion range and method thereof 有权
标题翻译：使用具有有限波长转换范围的3R波长转换器的动态波长分配装置及其方法
公开(公告)号：US20070133985A1
公开(公告)日：2007-06-14
申请号：US11633170
申请日：2006-12-04
申请人： Yun-Hee Cho , Kwang-Joon Kim
发明人： Yun-Hee Cho , Kwang-Joon Kim
IPC分类号： H04J14/00
CPC分类号： H04J14/0227 , H04J14/0212 , H04J14/0241 , H04J14/0284
摘要： In a wavelength allocation method in a wavelength division multiplexing network, a 3R wavelength converter having a limited wavelength conversion range is disposed according to a wavelength conversion band of each node, at least one path set between transmitting/receiving nodes is selected, routing paths corresponding to the number of the selected at least one path set between the transmitting/receiving nodes having a request for a new optical path generation are extracted, it is determined whether there is a wavelength consecutive segment set that satisfies a maximum transmission distance for guaranteeing transmission quality of an optical signal and that includes one consecutive wavelength among the extracted routing paths, and a path using a first-fit wavelength is selected from paths of each wavelength consecutive segment and the wavelength is allocated when determining that there is a wavelength consecutive segment set.
摘要翻译：在波分复用网络中的波长分配方法中，根据每个节点的波长转换带布置具有有限波长转换范围的3R波长转换器，选择发送/接收节点之间设置的至少一个路径，对应的路由路径提取具有对新的光路生成的请求的发送/接收节点之间的所选择的至少一个路径集合的数量，确定是否存在满足用于保证传输质量的最大传输距离的波长连续段集合并且在所提取的路由路径中包括一个连续波长，并且从每个波长连续片段的路径中选择使用第一拟合波长的路径，并且当确定存在波长连续片段集时分配波长。

13. 发明申请

US20070064232A1 Method and system for measuring overlay of semiconductor device 审中-公开
标题翻译：半导体器件叠层测量方法及系统
公开(公告)号：US20070064232A1
公开(公告)日：2007-03-22
申请号：US11513181
申请日：2006-08-31
申请人： Duck-Sun Yang , Yun-Hee Cho , Seok-Hwan Oh , Gi-Sung Yeo
发明人： Duck-Sun Yang , Yun-Hee Cho , Seok-Hwan Oh , Gi-Sung Yeo
IPC分类号： G01B11/00
CPC分类号： G03F7/70633 , G03F7/70491
摘要： Described is a method and system for measuring overlay of a semiconductor device. The method may include obtaining reference sample data and misaligned sample data from scattering data of a reference sample and misaligned samples, assigning reference fitting values based on the reference sample data and the misaligned sample data, collecting target wafer scattering data from a target wafer, evaluating a target wafer fitting value based on the reference sample data and the target wafer scattering data and comparing the target wafer fitting value with the reference fitting values to determine a target wafer misaligned value relating to the overlay between the first pattern and the second pattern of a target wafer.
摘要翻译：描述了用于测量半导体器件的覆盖层的方法和系统。该方法可以包括从参考样本和未对准样本的散射数据获得参考样本数据和未对准样本数据，基于参考样本数据和未对准样本数据分配参考拟合值，从目标晶片收集目标晶片散射数据，评估基于参考样本数据和目标晶片散射数据的目标晶片拟合值，并将目标晶片拟合值与参考拟合值进行比较，以确定与第一图案和第二图案之间的覆盖层相关的目标晶片未对准值目标晶圆。

14. 发明授权

US06393188B1 Dispersion compensation device and optical transmission system with the same 有权
标题翻译：色散补偿装置与光传输系统相同
公开(公告)号：US06393188B1
公开(公告)日：2002-05-21
申请号：US09388488
申请日：1999-09-02
申请人： Ki-Tae Jeong , Young-Tark Lee , Ho-Jin Jeong , Han-Kyo Seo , Jeong-U Jeon , Tae-Sang Park , Seok-Bong Ko , Yun-Hee Cho , Seong-Il Choi , Sang-Woork Park
发明人： Ki-Tae Jeong , Young-Tark Lee , Ho-Jin Jeong , Han-Kyo Seo , Jeong-U Jeon , Tae-Sang Park , Seok-Bong Ko , Yun-Hee Cho , Seong-Il Choi , Sang-Woork Park
IPC分类号： G02B616
CPC分类号： G02B6/29377 , G02B6/29394 , G02B6/4215
摘要： A dispersion compensation device and an optical transmission system are capable of simultaneously compensating a dispersion value and dispersion slope in a single-mode optical fiber in a high-speed long-distance optical transmission system and a wavelength division optical transmission system. The dispersion compensation device includes N number of component optical fibers arranged in a serial fashion, N being a positive integer more than one, wherein each of the component optical fiber has a different dispersion value per a unit length, a dispersion slope per a unit length, and a different length.
摘要翻译：色散补偿装置和光传输系统能够同时补偿高速长距离光传输系统和波分分光传输系统中的单模光纤中的色散值和色散斜率。色散补偿装置包括以串联方式布置的N个分量光纤，N是大于1的正整数，其中每个分量光纤每单位长度具有不同的色散值，每单位长度的色散斜率，和不同的长度。

15. 发明申请

US20110063174A1 PATCH ANTENNA AND WIRELESS COMMUNICATIONS MODULE 审中-公开
标题翻译：天线和无线通信模块
公开(公告)号：US20110063174A1
公开(公告)日：2011-03-17
申请号：US12647610
申请日：2009-12-28
申请人： Yun Hee CHO , Jong Myeon LEE , Je Hong SUNG
发明人： Yun Hee CHO , Jong Myeon LEE , Je Hong SUNG
IPC分类号： H01Q1/38 , H01Q1/24
CPC分类号： H01Q9/0457
摘要： There is provided a patch antenna. The patch antenna includes a high dielectric constant substrate having a cavity, a radiator disposed on a portion of one surface of the high dielectric constant substrate corresponding to the cavity, a feeder line disposed on the high dielectric constant substrate and supplying a signal to the radiator, and a ground part disposed on the high dielectric constant substrate.
摘要翻译：提供贴片天线。贴片天线包括具有空腔的高介电常数衬底，布置在对应于空腔的高介电常数衬底的一个表面的一部分上的散热器，设置在高介电常数衬底上并将信号提供给散热器的馈电线和设置在高介电常数衬底上的接地部分。

16. 发明申请

US20100053908A1 Electric device module 审中-公开
标题翻译：电器模块
公开(公告)号：US20100053908A1
公开(公告)日：2010-03-04
申请号：US12385368
申请日：2009-04-06
申请人： Gyu Man Hwang , Yun Hwi Park , Yun Hee Cho
发明人： Gyu Man Hwang , Yun Hwi Park , Yun Hee Cho
IPC分类号： H05K1/14 , H05K7/02
CPC分类号： H05K1/142 , H05K3/0058 , H05K2203/049 , H05K2203/167
摘要： There is provided an electric device module including: a housing; a board member fixed to one inner side of the housing and including a plurality of connecting terminals; at least one board adhered to another inner side of the housing by a predetermined adhesive and including a plurality of terminals electrically connected to the plurality of connecting terminals; and a guider guiding a mounting position of the board. In the electric device module, a circuit board is prevented from changing in adhering position due to fluidity of an adhesive but can be adhered at a precise position. Also, an extra amount of the adhesive is prevented from flowing outside the circuit board to thereby enhance accuracy and reliability in terms of terminal connection.
摘要翻译：提供一种电气设备模块，包括：壳体; 固定到所述壳体的一个内侧的板构件，并且包括多个连接端子; 至少一个板通过预定的粘合剂粘附到壳体的另一内侧，并且包括电连接到多个连接端子的多个端子; 以及引导板的安装位置的导向器。在电气装置模块中，由于粘合剂的流动性，可以防止电路板的粘合位置的变化，而是能够在精确的位置粘接。此外，防止了额外量的粘合剂流入电路板外部，从而提高端子连接方面的精度和可靠性。

17. 发明授权

US07167493B2 Method for automatically revising wavelength of electro-absorption modulator integrated laser diode 失效
标题翻译：自动修正电吸收式调制器集成激光二极管波长的方法
公开(公告)号：US07167493B2
公开(公告)日：2007-01-23
申请号：US10897362
申请日：2004-07-21
申请人： Jyung-Chan Lee , Joon-Ki Lee , Yun-Hee Cho , Seung-Il Myong , Youn-Seon Jang , Yool Kwon , Kwangjoon Kim , Moo-Jung Chu
发明人： Jyung-Chan Lee , Joon-Ki Lee , Yun-Hee Cho , Seung-Il Myong , Youn-Seon Jang , Yool Kwon , Kwangjoon Kim , Moo-Jung Chu
IPC分类号： H01S3/00 , H01S3/04 , H01S3/10 , H01S3/13 , H01S3/14
CPC分类号： H01S5/06804 , H01S5/02415 , H01S5/0265 , H01S5/042
摘要： The present invention relates to a method for revising a wavelength of the EML by controlling a working temperature based on arithmetic functional relations between the DC-Offset voltage and the wavelength and between the working temperature and the wavelength, and a computer-readable recording medium thereof. The method includes the steps of: re-setting initial values of a working temperature, a amplifying voltage and the DC-Offset voltage; determining a wavelength with respect to the re-set DC-Offset voltage based on a functional relation between the DC-Offset voltage and the wavelength of the EML; and determining the revising working temperature for the determined wavelength based on the functional relation between the working temperature and the wavelength of the EML, and re-setting the working temperature with the revising working temperature.
摘要翻译：本发明涉及一种通过基于DC偏移电压与波长之间以及工作温度和波长之间的算术函数关系来控制工作温度来修改EML的波长的方法及其计算机可读记录介质。该方法包括以下步骤：重新设定工作温度，放大电压和DC偏移电压的初始值; 基于所述DC偏移电压和所述EML的波长之间的函数关系来确定相对于所述重新设定的DC偏移电压的波长; 并根据工作温度和EML波长之间的功能关系确定确定波长的修正工作温度，并根据修改工作温度重新设定工作温度。

18. 发明授权

US5578519A Method for forming align key pattern in semiconductor device 失效
标题翻译：在半导体器件中形成对准键图案的方法
公开(公告)号：US5578519A
公开(公告)日：1996-11-26
申请号：US561824
申请日：1995-11-27
申请人： Yun-hee Cho
发明人： Yun-hee Cho
IPC分类号： H01L21/027 , H01L21/76 , H01L23/544 , H01L21/762
CPC分类号： H01L23/544 , H01L2223/54453 , H01L2924/0002
摘要： A method for forming an align key pattern in a semiconductor device is provided. The method has the steps of forming a first insulating film pattern for defining field regions in a cell array area and an align key pattern area on a semiconductor substrate, forming trenches in the field regions, using the first insulating film pattern as a mask, forming a second insulating film on the whole surface of the semiconductor substrate, filling the trenches, etching the second insulating film formed on the active regions of the cell array area and on the active and field regions of the align key pattern area, to a predetermined thickness, etching back the whole surface of the semiconductor substrate, forming a conductive layer on the whole surface of the semiconductor substrate, and covering a photoresist on the whole surface of the conductive layer. According to the present invention, an align key pattern needed for a photolithography process is obtainable by forming steps in an align key pattern area in a semiconductor device having an STI structure.
摘要翻译：提供了一种用于在半导体器件中形成对准键图案的方法。该方法具有以下步骤：使用第一绝缘膜图案作为掩模，形成用于限定半导体衬底中的单元阵列区域中的场区域和对准键图案区域的第一绝缘膜图案，在场区域中形成沟槽，形成在半导体衬底的整个表面上的第二绝缘膜，填充沟槽，将形成在电池阵列区域的有源区域上的第二绝缘膜和对准键图案区域的有源区域和场区域蚀刻到预定厚度蚀刻半导体衬底的整个表面，在半导体衬底的整个表面上形成导电层，并在导电层的整个表面上覆盖光致抗蚀剂。根据本发明，通过在具有STI结构的半导体器件中的对准键图案区域中形成步骤，可以获得光刻工艺所需的对准键图案。

19. 发明申请

US20110061910A1 MULTI-LAYER CERAMIC CIRCUIT BOARD, METHOD OF MANUFACTURING THE SAME, AND ELECTRIC DEVICE MODULE USING THE SAME 审中-公开
标题翻译：多层陶瓷电路板及其制造方法以及使用其的电子装置模块
公开(公告)号：US20110061910A1
公开(公告)日：2011-03-17
申请号：US12648201
申请日：2009-12-28
申请人： Je Hong SUNG , Yun Hee CHO , Kwang Jae OH
发明人： Je Hong SUNG , Yun Hee CHO , Kwang Jae OH
IPC分类号： H05K1/00 , H05K3/00
CPC分类号： H05K1/111 , H01L24/13 , H01L24/16 , H01L24/81 , H01L2224/13023 , H01L2224/16111 , H01L2224/16235 , H01L2224/16237 , H01L2224/8114 , H01L2224/81191 , H01L2224/81385 , H01L2224/81444 , H01L2224/81455 , H01L2224/81815 , H01L2924/12042 , H01L2924/14 , H01L2924/15787 , H05K1/112 , H05K3/3436 , H05K3/4629 , H05K2201/09472 , H05K2201/09509 , H05K2201/09827 , H05K2201/10734 , Y10T29/49124 , Y10T29/49155 , Y10T29/49165 , H01L2924/00014 , H01L2924/00
摘要： There is provided a multi-layer ceramic circuit board. The multi-layer ceramic circuit board according to an aspect of the invention may include: a ceramic body having a plurality of ceramic green sheets stacked upon one another and an interlayer circuit having conductive vias and conductive patterns separately provided in the plurality of ceramic green sheets; a bump receiving portion provided in at least one surface ceramic green sheet adjacent to a surface of the plurality of ceramic green sheets, and having side walls inclined upward; and a bonding pad provided on the inclined side walls and a bottom surface of the bump receiving portion, and connected to the interlayer circuit.
摘要翻译：提供了多层陶瓷电路板。根据本发明的一个方面的多层陶瓷电路板可以包括：具有彼此堆叠的多个陶瓷生片的陶瓷体和分别设置在多个陶瓷生片中的导电通孔和导电图案的层间电路 ; 设置在与多个陶瓷生片的表面相邻的至少一个表面陶瓷生片中并且具有向上倾斜的侧壁的凸块接收部; 以及设置在所述倾斜侧壁上的接合焊盘和所述凸块接收部分的底表面，并且连接到所述层间电路。

20. 发明申请

US20100102430A1 SEMICONDUCTOR MULTI-CHIP PACKAGE 审中-公开
标题翻译：半导体多芯片封装
公开(公告)号：US20100102430A1
公开(公告)日：2010-04-29
申请号：US12476221
申请日：2009-06-01
申请人： Tae Soo LEE , Yun Hwi Park , Yun Hee Cho
发明人： Tae Soo LEE , Yun Hwi Park , Yun Hee Cho
IPC分类号： H01L23/488 , H01L23/48
CPC分类号： H01L25/16 , H01L24/73 , H01L2224/05554 , H01L2224/16227 , H01L2224/48091 , H01L2224/48227 , H01L2224/73204 , H01L2224/73265 , H01L2225/0651 , H01L2225/06517 , H01L2225/06541 , H01L2225/06572 , H01L2924/01006 , H01L2924/01029 , H01L2924/01033 , H01L2924/01047 , H01L2924/07802 , H01L2924/09701 , H01L2924/14 , H01L2924/15787 , H01L2924/181 , H01L2924/19104 , H01L2924/00014 , H01L2924/00
摘要： A semiconductor multichip package includes a substrate having a top surface on which a bonding pad is formed, and a bottom surface opposing the top surface, on which an external connection terminal electrically connected with the bonding pad is formed, a first semiconductor chip mounted on a region of the top surface of the substrate excluding the bonding pad, a ceramic spacer disposed on a top surface of the first semiconductor chip and including a passive device therein, and at least one second semiconductor chip disposed on a top surface of the ceramic spacer. The ceramic spacer includes an interlayer circuit for an electrical connection between the first and second semiconductor chips, and the passive device is electrically connected to at least one of the first and second semiconductor chips. Accordingly, a package with a more compact structure can be realized.
摘要翻译：一种半导体多芯片封装，包括具有形成有焊盘的顶面的基板和与形成有与焊盘电连接的外部连接端子的上表面的底面，安装在焊盘上的第一半导体芯片除了焊盘之外的衬底的顶表面的区域，设置在第一半导体芯片的顶表面上并且包括其中的无源器件的陶瓷间隔件和设置在陶瓷间隔件的顶表面上的至少一个第二半导体芯片。陶瓷间隔件包括用于第一和第二半导体芯片之间的电连接的层间电路，并且无源器件电连接到第一和第二半导体芯片中的至少一个。因此，可以实现具有更紧凑结构的封装。

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