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11. 发明授权

US06806202B2 Method of removing silicon oxide from a surface of a substrate 失效
公开(公告)号：US06806202B2
公开(公告)日：2004-10-19
申请号：US10309500
申请日：2002-12-03
申请人： Xiaoming Hu , James B. Craigo , Ravindranath Droopad , John L. Edwards, Jr. , Yong Liang , Yi Wei , Zhiyi Yu
发明人： Xiaoming Hu , James B. Craigo , Ravindranath Droopad , John L. Edwards, Jr. , Yong Liang , Yi Wei , Zhiyi Yu
IPC分类号： H01L21461
CPC分类号： H01L21/02046
摘要： A method for removing silicon oxide from a surface of a substrate is disclosed. The method includes depositing material onto the silicon oxide (110) and heating the substrate surface to a sufficient temperature to form volatile compounds including the silicon oxide and the deposited material (120). The method also includes heating the surface to a sufficient temperature to remove any remaining deposited material (130).

12. 发明授权

US06693298B2 Structure and method for fabricating epitaxial semiconductor on insulator (SOI) structures and devices utilizing the formation of a compliant substrate for materials used to form same 失效
标题翻译：用于制造绝缘体外延半导体（SOI）结构的结构和方法以及利用形成用于形成绝缘体材料的材料形成柔性衬底的器件
公开(公告)号：US06693298B2
公开(公告)日：2004-02-17
申请号：US09908707
申请日：2001-07-20
申请人： Kurt W. Eisenbeiser , Zhiyi Yu , Ravindranath Droopad
发明人： Kurt W. Eisenbeiser , Zhiyi Yu , Ravindranath Droopad
IPC分类号： H01L2904
CPC分类号： H01L21/7624 , C30B25/18 , H01L21/02381 , H01L21/02439 , H01L21/02488 , H01L21/02505 , H01L21/02532
摘要： High quality epitaxial layers of monocrystalline materials can be grown overlying monocrystalline substrates such as large silicon wafers by forming a compliant substrate for growing the monocrystalline layers. An accommodating buffer layer comprises a layer of monocrystalline oxide spaced apart from the silicon wafer by an amorphous interface layer of silicon oxide. The amorphous interface layer dissipates strain and permits the growth of a high quality monocrystalline oxide accommodating buffer layer. The accommodating buffer layer is lattice matched to both the underlying silicon wafer and the overlying monocrystalline material layer. A monocrystalline layer is then formed over the accommodating buffer layer, such that a lattice constant of the monocrystalline layer substantially matches the lattice constant of a subsequently grown monocrystalline film.
摘要翻译：通过形成用于生长单晶层的柔性衬底，可以将单晶材料的高质量外延层生长在覆盖单晶衬底（例如大硅晶片）上。容纳缓冲层包括通过硅氧化物的非晶界面层与硅晶片间隔开的单晶氧化物层。非晶界面层消耗应变并允许高质量单晶氧化物容纳缓冲层的生长。容纳缓冲层与下面的硅晶片和上覆的单晶材料层晶格匹配。然后在容纳缓冲层上形成单晶层，使得单晶层的晶格常数与随后生长的单晶膜的晶格常数基本一致。

13. 发明授权

US06493497B1 Electro-optic structure and process for fabricating same 失效
标题翻译：电光结构及其制造方法
公开(公告)号：US06493497B1
公开(公告)日：2002-12-10
申请号：US09669602
申请日：2000-09-26
申请人： Jamal Ramdani , Lyndee Hilt , Ravindranath Droopad , William Jay Ooms
发明人： Jamal Ramdani , Lyndee Hilt , Ravindranath Droopad , William Jay Ooms
IPC分类号： G02B610
CPC分类号： G02B6/12004 , G02B6/131 , G02F1/0338 , G02F1/035
摘要： High quality epitaxial layers of oxide can be grown overlying large silicon wafers by first growing an accommodating buffer layer on a silicon wafer. The accommodating buffer layer is a layer of monocrystalline oxide spaced apart from the silicon wafer by an amorphous interface layer of silicon oxide. The amorphous intermediate layer dissipates strain and permits the growth of a high quality monocrystalline oxide accommodating buffer layer. Any lattice mismatch between the accommodating buffer layer and the underlying silicon substrate is taken care of by the amorphous intermediate layer. Waveguides may be formed of high quality monocrystalline material atop the monocrystalline buffer layer. The waveguides can suitably be formed to modulate the wave. Monolithic integration of oxide based electro-optic devices with III-V based photonics and Si circuitry is fully realized.
摘要翻译：通过首先在硅晶片上生长容纳缓冲层，可以生长覆盖大硅晶片的高质量的氧化物外延层。容纳缓冲层是通过氧化硅的非晶界面层与硅晶片间隔开的单晶氧化物层。无定形中间层耗散应变并允许高质量单晶氧化物容纳缓冲层的生长。通过无定形中间层处理容纳缓冲层和下面的硅衬底之间的任何晶格失配。波导可以由单晶缓冲层顶部的高质量单晶材料形成。可以适当地形成波导以调制波。基于氧化物的电光器件与基于III-V的光子学和Si电路的单片集成完全实现。

14. 发明授权

US06479173B1 Semiconductor structure having a crystalline alkaline earth metal silicon nitride/oxide interface with silicon 失效
标题翻译：具有结晶碱土金属氮化硅/氧化物与硅的界面的半导体结构
公开(公告)号：US06479173B1
公开(公告)日：2002-11-12
申请号：US09465623
申请日：1999-12-17
申请人： Zhiyi Yu , Jun Wang , Ravindranath Droopad , Alexander Demkov , Jerald Allan Hallmark , Jamal Ramdani
发明人： Zhiyi Yu , Jun Wang , Ravindranath Droopad , Alexander Demkov , Jerald Allan Hallmark , Jamal Ramdani
IPC分类号： B32B900
CPC分类号： H01L21/3144 , H01L21/31691 , H01L21/318 , H01L28/56
摘要： A semiconductor structure comprises a silicon substrate (10), one or more layers of single crystal oxides or nitrides (26), and an interface (14) between the silicon substrate and the one or more layers of single crystal oxides or nitrides, the interface manufactured with a crystalline material which matches the lattice constant of silicon. The interface comprises an atomic layer of silicon, nitrogen, and a metal in the form MSiN2, where M is a metal. In a second embodiment, the interface comprises an atomic layer of silicon, a metal, and a mixture of nitrogen and oxygen in the form MSi[N1−xOx]2, where M is a metal and X is 0≦X
摘要翻译：半导体结构包括硅衬底（10），一层或多层单晶氧化物或氮化物（26），以及在硅衬底和一层或多层单晶氧化物或氮化物之间的界面（14），界面用与硅的晶格常数匹配的结晶材料制成。该界面包括硅，氮和MSiN 2形式的金属的原子层，其中M是金属。在第二个实施方案中，界面包括形式为MSi [N1-xOx] 2的硅原子层，金属和氮和氧的混合物，其中M是金属，X是0 <= X <1。

15. 发明授权

US06432546B1 Microelectronic piezoelectric structure and method of forming the same 失效
标题翻译：微电子压电结构及其形成方法
公开(公告)号：US06432546B1
公开(公告)日：2002-08-13
申请号：US09624527
申请日：2000-07-24
申请人： Ramoothy Ramesh , Yu Wang , Jeffrey M. Finder , Kurt Eisenbeiser , Zhiyi Yu , Ravindranath Droopad
发明人： Ramoothy Ramesh , Yu Wang , Jeffrey M. Finder , Kurt Eisenbeiser , Zhiyi Yu , Ravindranath Droopad
IPC分类号： B32B900
CPC分类号： B32B9/00 , H01L21/31691 , H01L28/56 , H01L41/0478 , H01L41/0815 , H01L41/1876 , H01L41/319
摘要： A high quality epitaxial layer of monocrystalline Pb(Zr,Ti)O3 can be grown overlying large silicon wafers by first growing an strontium titanate layer on a silicon wafer. The strontium titanate layer is a monocrystalline layer spaced apart from the silicon wafer by an amorphous interface layer of silicon oxide.
摘要翻译：通过首先在硅晶片上生长钛酸锶层，可以将大量的单晶Pb（Zr，Ti）O 3的高品质外延层生长在大的硅晶片上。钛酸锶层是通过硅氧化物的非晶界面层与硅晶片隔开的单晶层。

16. 发明授权

US08847280B2 Insulated gate field effect transistors 有权
标题翻译：绝缘栅场效应晶体管
公开(公告)号：US08847280B2
公开(公告)日：2014-09-30
申请号：US13293910
申请日：2011-11-10
申请人： Jonathan K. Abrokwah , Ravindranath Droopad , Matthias Passlack
发明人： Jonathan K. Abrokwah , Ravindranath Droopad , Matthias Passlack
IPC分类号： H01L29/78 , H01L23/31 , H01L29/778 , H01L29/51 , H01L29/207
CPC分类号： H01L29/7783 , H01L23/3192 , H01L29/207 , H01L29/513 , H01L2924/0002 , H01L2924/12044 , H01L2924/13091 , H01L2924/00
摘要： An improved insulated gate field effect device is obtained by providing a substrate desirably comprising a III-V semiconductor, having a further semiconductor layer on the substrate adapted to contain the channel of the device between spaced apart source-drain electrodes formed on the semiconductor layer. A dielectric layer is formed on the semiconductor layer. A sealing layer is formed on the dielectric layer and exposed to an oxygen plasma. A gate electrode is formed on the dielectric layer between the source-drain electrodes. The dielectric layer preferably comprises gallium-oxide and/or gadolinium-gallium oxide, and the oxygen plasma is preferably an inductively coupled plasma. A further sealing layer of, for example, silicon nitride is desirably provided above the sealing layer. Surface states and gate dielectric traps that otherwise adversely affect leakage and channel sheet resistance are much reduced.
摘要翻译：通过提供期望地包括III-V半导体的衬底来获得改进的绝缘栅场效应器件，所述衬底在衬底上具有另外的半导体层，其适于在形成在半导体层上的间隔开的源 - 漏电极之间容纳器件的沟道。在半导体层上形成介电层。在电介质层上形成密封层并暴露于氧等离子体。在源 - 漏电极之间的电介质层上形成栅电极。电介质层优选包含氧化镓和/或钆 - 镓氧化物，氧等离子体优选为电感耦合等离子体。希望在密封层的上方设置另外的例如氮化硅的密封层。否则对泄漏和通道薄层电阻有不利影响的表面状态和栅极电介质阱将大大减少。

17. 发明授权

US08105925B2 Method for forming an insulated gate field effect device 有权
标题翻译：一种形成绝缘栅场效应器件的方法
公开(公告)号：US08105925B2
公开(公告)日：2012-01-31
申请号：US12182349
申请日：2008-07-30
申请人： Jonathan K. Abrokwah , Ravindranath Droopad , Matthias Passlack
发明人： Jonathan K. Abrokwah , Ravindranath Droopad , Matthias Passlack
IPC分类号： H01L21/26
CPC分类号： H01L29/7783 , H01L23/3192 , H01L29/207 , H01L29/513 , H01L2924/0002 , H01L2924/12044 , H01L2924/13091 , H01L2924/00
摘要： An improved insulated gate field effect device (60) is obtained by providing a substrate (20) desirably comprising a III-V semiconductor, having a further semiconductor layer (22) on the substrate (20) adapted to contain the channel (230) of the device (60) between spaced apart source-drain electrodes (421, 422) formed on the semiconductor layer (22). A dielectric layer (24) is formed on the semiconductor layer (22). A sealing layer (28) is formed on the dielectric layer (24) and exposed to an oxygen plasma (36). A gate electrode (482) is formed on the dielectric layer (24) between the source-drain electrodes (421, 422). The dielectric layer (24) preferably comprises gallium-oxide (25) and/or gadolinium-gallium oxide (26, 27), and the oxygen plasma (36) is preferably an inductively coupled plasma. A further sealing layer (44) of, for example, silicon nitride is desirably provided above the sealing layer (28). Surface states and gate dielectric traps that otherwise adversely affect leakage and channel sheet resistance are much reduced.
摘要翻译：通过提供期望地包括III-V半导体的衬底（20）来获得改进的绝缘栅场效应器件（60），所述衬底（20）在所述衬底（20）上具有另外的半导体层（22），所述半导体层适于容纳所述沟道（230）所述器件（60）形成在所述半导体层（22）上形成的间隔开的源 - 漏电极（421,422）之间。在半导体层（22）上形成介电层（24）。密封层（28）形成在电介质层（24）上并暴露于氧等离子体（36）。在源漏电极（421,422）之间的电介质层（24）上形成栅电极（482）。电介质层（24）优选包含氧化镓（25）和/或氧化钆 - 氧化镓（26,27），氧等离子体（36）优选为电感耦合等离子体。期望地在密封层（28）的上方设置例如氮化硅的另外的密封层（44）。否则对泄漏和通道薄层电阻有不利影响的表面状态和栅极电介质阱将大大减少。

18. 发明授权

US07442654B2 Method of forming an oxide layer on a compound semiconductor structure 有权
标题翻译：在化合物半导体结构上形成氧化物层的方法
公开(公告)号：US07442654B2
公开(公告)日：2008-10-28
申请号：US11239749
申请日：2005-09-30
申请人： Ravindranath Droopad , Matthias Passlack
发明人： Ravindranath Droopad , Matthias Passlack
IPC分类号： H01L21/31
CPC分类号： H01L21/02266 , H01L21/02175 , H01L21/022 , H01L21/28264 , H01L21/31604 , H01L29/20 , H01L29/513 , H01L29/78
摘要： A method of forming a dielectric layer structure on a supporting semiconductor structure having a first surface comprises providing a first beam of oxide; depositing a first layer of oxide on the first surface of the supporting semiconductor structure using the first beam of oxide, wherein the first layer of oxide has a second surface; terminating the first beam of oxide, and concurrently providing a second beam of oxide, a beam of metal and a beam of oxygen, wherein the first and second beams of oxide are separate and distinct beams of oxide; and depositing a second layer of oxide on the second surface simultaneously using the second beam of oxide, the beam of metal, and the beam of oxygen.
摘要翻译：在具有第一表面的支撑半导体结构上形成电介质层结构的方法包括：提供第一氧化物束; 使用第一氧化物束在支撑半导体结构的第一表面上沉积第一层氧化物，其中所述第一氧化物层具有第二表面; 终止第一氧化物束，并且同时提供第二氧化物束，金属梁和氧束，其中所述第一和第二氧化物束是分离的和不同的氧化物束; 以及使用所述第二氧化物束，所述金属束和所述氧束将所述第二表面的氧化物沉积在所述第二表面上。

19. 发明授权

US06885065B2 Ferromagnetic semiconductor structure and method for forming the same 失效
标题翻译：铁磁半导体结构及其形成方法
公开(公告)号：US06885065B2
公开(公告)日：2005-04-26
申请号：US10299801
申请日：2002-11-20
申请人： Yong Liang , Ravindranath Droopad , Hao Li , Zhiyi Yu
发明人： Yong Liang , Ravindranath Droopad , Hao Li , Zhiyi Yu
IPC分类号： H01L21/8246 , H01L27/22 , H01L29/72
CPC分类号： H01L27/22 , B82Y10/00 , H01L43/12
摘要： A ferromagnetic semiconductor structure is provided. The structure includes a monocrystalline semiconductor substrate and a doped titanium oxide anatase layer overlying the semiconductor substrate.
摘要翻译：提供了铁磁半导体结构。该结构包括单晶半导体衬底和覆盖半导体衬底的掺杂氧化钛锐钛矿层。

20. 发明授权

US06709989B2 Method for fabricating a semiconductor structure including a metal oxide interface with silicon 失效
标题翻译：包括与硅的金属氧化物界面的半导体结构的方法
公开(公告)号：US06709989B2
公开(公告)日：2004-03-23
申请号：US09885409
申请日：2001-06-21
申请人： Jamal Ramdani , Ravindranath Droopad , Zhiyi Yu
发明人： Jamal Ramdani , Ravindranath Droopad , Zhiyi Yu
IPC分类号： H01L2100
CPC分类号： H01L21/3141 , H01L21/02172 , H01L21/0228 , H01L21/02304 , H01L21/316 , H01L21/31604 , H01L21/31616 , H01L21/31645 , H01L21/31691
摘要： A method of fabricating a semiconductor structure including the steps of: providing a silicon substrate having a surface; forming by atomic layer deposition a monocrystalline seed layer on the surface of the silicon substrate; and forming by atomic layer deposition one or more layers of a monocrystalline high dielectric constant oxide on the seed layer, where providing a substrate includes providing a substrate having formed thereon a silicon oxide, and wherein forming by atomic layer deposition a seed layer further includes depositing a layer of a metal oxide onto a surface of the silicon oxide, flushing the layer of metal oxide with an inert gas, and reacting the metal oxide and the silicon oxide to form a monocrystalline silicate.
摘要翻译：一种制造半导体结构的方法，包括以下步骤：提供具有表面的硅衬底;通过原子层沉积在硅衬底的表面上形成单晶种子层; 并且通过原子层沉积形成在种子层上的单晶高介电常数氧化物的一层或多层，其中提供衬底包括提供其上形成有氧化硅的衬底，并且其中通过原子层沉积形成晶种层还包括沉积在氧化硅表面上的金属氧化物层，用惰性气体冲洗金属氧化物层，并使金属氧化物和氧化硅反应形成单晶硅酸盐。

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