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11. 发明申请

US20120015402A1 Method of Proliferating Plasma Cells 失效
标题翻译：增殖血浆细胞的方法
公开(公告)号：US20120015402A1
公开(公告)日：2012-01-19
申请号：US13187677
申请日：2011-07-21
申请人： Masayuki Tsuchiya , Masami Suzuki , Kenji Yoshida , Etsuko Fujii , Miho Watanabe , Koichi Matsubara , Yu Jau Chen , Juliana Sim
发明人： Masayuki Tsuchiya , Masami Suzuki , Kenji Yoshida , Etsuko Fujii , Miho Watanabe , Koichi Matsubara , Yu Jau Chen , Juliana Sim
IPC分类号： C12P21/00 , C12N5/071
CPC分类号： A01K67/027 , A01K2267/01 , A61K35/16 , C07K16/00 , C07K16/30
摘要： An objective of the present invention is to facilitate the acquisition of antibody-producing cells that are infiltrating virus-infected cells, cancer cells, abnormal cells forming a benign hyperplasia, and the like, and to improve the efficiency of the production of antibodies as well as nucleic acids encoding them from the antibody-producing cells.The present inventors discovered that, when cancer tissues comprising infiltrating lymphocytes are transplanted into highly immunodeficient animals that do not have T cells, B cells, and NK cells and further exhibit a low IFN production ability, the differentiation and proliferation of infiltrating lymphocytes are unexpectedly promoted, and the number of plasma cells that produce antibodies recognizing cancer tissues increases dramatically, plasma cells can be separated easily, and antibodies or nucleic acids encoding them can be easily prepared from the plasma cells.
摘要翻译：本发明的目的是便于获得渗透病毒感染细胞的抗体产生细胞，癌细胞，形成良性增生的异常细胞等，以及提高抗体生产的效率作为从抗体产生细胞编码它们的核酸。本发明人发现，当将包含浸润性淋巴细胞的癌组织移植到不具有T细胞，B细胞和NK细胞的高度免疫缺陷的动物中并且进一步表现出低的IFN产生能力时，意外地促进了浸润性淋巴细胞的分化和增殖并且产生识别癌组织的抗体的浆细胞的数量急剧增加，可以容易地分离浆细胞，并且可以容易地从浆细胞制备抗体或编码它们的核酸。

12. 发明授权

US08030706B2 Power semiconductor device 失效
标题翻译：功率半导体器件
公开(公告)号：US08030706B2
公开(公告)日：2011-10-04
申请号：US12540192
申请日：2009-08-12
申请人： Miho Watanabe , Masaru Izumisawa , Yasuto Sumi , Hiroshi Ohta , Wataru Sekine , Wataru Saito , Syotaro Ono , Nana Hatano
发明人： Miho Watanabe , Masaru Izumisawa , Yasuto Sumi , Hiroshi Ohta , Wataru Sekine , Wataru Saito , Syotaro Ono , Nana Hatano
IPC分类号： H01L29/66
CPC分类号： H01L29/7811 , H01L29/0634 , H01L29/1095 , H01L29/7802
摘要： A semiconductor device according to an embodiment of the present invention includes a device part and a terminal part. The device includes a first semiconductor layer, and second and third semiconductor layers formed on the first semiconductor layer, and alternately arranged along a direction parallel to a surface of the first semiconductor layer, wherein the device part is provided with a first region and a second region, each of which includes at least one of the second semiconductor layers and at least one of the third semiconductor layers, and with regard to a difference value ΔN (=NA−NB) obtained by subtracting an impurity amount NB per unit length of each of the third semiconductor layers from an impurity amount NA per unit length of each of the second semiconductor layers, a difference value ΔNC1 which is the difference value ΔN in the first region of the device part, a difference value ΔNC2 which is the difference value ΔN in the second region of the device part, and a difference value ΔNT which is the difference value ΔN in the terminal part satisfy a relationship of ΔNC1>ΔNT>ΔNC2.
摘要翻译：根据本发明实施例的半导体器件包括器件部分和端子部分。该器件包括第一半导体层，以及形成在第一半导体层上的第二和第三半导体层，并且沿着与第一半导体层的表面平行的方向交替布置，其中器件部分设置有第一区域和第二半导体层区域，其中每一个包括第二半导体层和至少一个第三半导体层中的至少一个，并且关于通过从每单位长度减去杂质量NB获得的差值Dgr; N（= NA-NB）从每个第二半导体层的每单位长度的杂质量NA中的每个第三半导体层的差分值＆Dgr; NC1，其是器件部分的第一区域中的差值＆Dgr; N，差值＆Dgr ;作为装置部分的第二区域中的差值Dgr; N的NC2，作为终端部分中的差值Dgr; N的差值＆Dgr; NT满足关系的＆Dgr; NC1>＆Dgr; NT>＆Dgr; NC2。

13. 发明申请

US20110227154A1 SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING THE SAME 审中-公开
标题翻译：半导体器件及其制造方法
公开(公告)号：US20110227154A1
公开(公告)日：2011-09-22
申请号：US13052032
申请日：2011-03-18
申请人： Syotaro ONO , Wataru Saito , Munehisa Yabuzaki , Shunji Taniuchi , Miho Watanabe
发明人： Syotaro ONO , Wataru Saito , Munehisa Yabuzaki , Shunji Taniuchi , Miho Watanabe
IPC分类号： H01L29/78 , H01L21/336
CPC分类号： H01L29/7802 , H01L29/0634 , H01L29/0878 , H01L29/1095 , H01L29/66712
摘要： A semiconductor device comprising: a first semiconductor layer of a first conductivity type; a second semiconductor layer of the first conductivity type formed on the first semiconductor layer; a first buried layer of the first conductivity type selectively formed in the second semiconductor layer and having a first peak impurity concentration at a first depth; a second buried layer of a second conductivity type selectively formed in the second semiconductor layer and having a second peak impurity concentration at a second depth; a base layer of the second conductivity type selectively formed in the second semiconductor layer and overlapping with an upper portion of the second buried layer; a source layer of the first conductivity type selectively formed in the base layer; and a gate electrode formed on the base layer and on the second semiconductor layer above the first buried layer with a gate insulating film being interposed therebetween.
摘要翻译：一种半导体器件，包括：第一导电类型的第一半导体层; 形成在第一半导体层上的第一导电类型的第二半导体层; 第一导电类型的第一掩埋层选择性地形成在第二半导体层中，并且在第一深度处具有第一峰值杂质浓度; 第二导电类型的第二掩埋层选择性地形成在第二半导体层中，并且在第二深度具有第二峰值杂质浓度; 第二导电类型的基极层选择性地形成在第二半导体层中并与第二掩埋层的上部重叠; 选择性地形成在所述基底层中的所述第一导电类型的源极层; 以及形成在所述第一掩埋层上的所述基极层和所述第二半导体层上的栅电极，其间插入有栅极绝缘膜。

14. 发明申请

US20110215418A1 SEMICONDUCTOR DEVICE 有权
标题翻译：半导体器件
公开(公告)号：US20110215418A1
公开(公告)日：2011-09-08
申请号：US13029925
申请日：2011-02-17
申请人： Wataru SAITO , Syotaro Ono , Munehisa Yabuzaki , Shunji Taniuchi , Miho Watanabe
发明人： Wataru SAITO , Syotaro Ono , Munehisa Yabuzaki , Shunji Taniuchi , Miho Watanabe
IPC分类号： H01L27/07 , H01L29/72
CPC分类号： H01L27/07 , H01L29/72
摘要： According to one embodiment, a semiconductor device includes a first semiconductor region of a first conductivity type, a second semiconductor region of the first conductivity type, a first main electrode, a third semiconductor region of a second conductivity type, a second main electrode, and a plurality of embedded semiconductor regions of the second conductivity type. The second semiconductor region is formed on a first major surface of the first semiconductor region. The first main electrode is formed on a face side opposite to the first major surface of the first semiconductor region. The third semiconductor region is formed on a second major surface of the second semiconductor region on a side opposite to the first semiconductor region. The second main electrode is formed to bond to the third semiconductor region. The embedded semiconductor regions are provided in a termination region. A distance between the embedded semiconductor region and the second major surface along a direction from the second major surface toward the first major surface becomes longer toward outside from the device region.
摘要翻译：根据一个实施例，半导体器件包括第一导电类型的第一半导体区域，第一导电类型的第二半导体区域，第一主电极，第二导电类型的第三半导体区域，第二主电极和多个第二导电类型的嵌入式半导体区域。第二半导体区域形成在第一半导体区域的第一主表面上。第一主电极形成在与第一半导体区域的第一主表面相对的正面上。第三半导体区域形成在第二半导体区域的与第一半导体区域相对的一侧的第二主表面上。第二主电极形成为结合到第三半导体区域。嵌入式半导体区域设置在终端区域中。沿着从第二主表面朝向第一主表面的方向在嵌入式半导体区域和第二主表面之间的距离从器件区域向外部变长。

15. 发明申请

US20110018055A1 POWER SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING SAME 失效
标题翻译：功率半导体器件及其制造方法
公开(公告)号：US20110018055A1
公开(公告)日：2011-01-27
申请号：US12840201
申请日：2010-07-20
申请人： Hiroshi OHTA , Yasuto SUMI , Kiyoshi KIMURA , Wataru SEKINE , Wataru SAITO , Syotaro ONO , Munehisa YABUZAKI , Nana HATANO , Miho WATANABE
发明人： Hiroshi OHTA , Yasuto SUMI , Kiyoshi KIMURA , Wataru SEKINE , Wataru SAITO , Syotaro ONO , Munehisa YABUZAKI , Nana HATANO , Miho WATANABE
IPC分类号： H01L29/78 , H01L21/336
CPC分类号： H01L29/66712 , H01L29/0619 , H01L29/0634 , H01L29/0638 , H01L29/0696 , H01L29/1095 , H01L29/402 , H01L29/7811
摘要： According to one embodiment, a power semiconductor device includes a first semiconductor layer, and first, second and third semiconductor regions. The first semiconductor layer has a first conductivity type. The first semiconductor regions have a second conductivity type, and are formed with periodicity in a lateral direction in a second semiconductor layer of the first conductivity type. The second semiconductor layer is provided on a major surface of the first semiconductor layer in a device portion with a main current path formed in a vertical direction generally perpendicular to the major surface and in a terminal portion provided around the device portion. The second semiconductor region has the first conductivity type and is a portion of the second semiconductor layer sandwiched between adjacent ones of the first semiconductor regions. The third semiconductor regions have the second conductivity type and are provided below the first semiconductor regions in the terminal portion.
摘要翻译：根据一个实施例，功率半导体器件包括第一半导体层以及第一，第二和第三半导体区域。第一半导体层具有第一导电类型。第一半导体区域具有第二导电类型，并且在第一导电类型的第二半导体层中在横向方向上形成周期性。第二半导体层设置在器件部分的第一半导体层的主表面上，其主电流通道形成在大体上垂直于主表面的垂直方向上，以及设置在器件部分周围的端子部分中。第二半导体区域具有第一导电类型，并且是夹在相邻的第一半导体区域中的第二半导体层的一部分。第三半导体区域具有第二导电类型并且设置在端子部分中的第一半导体区域的下方。

16. 发明申请

US20100096692A1 SEMICONDUCTOR DEVICE 有权
标题翻译：半导体器件
公开(公告)号：US20100096692A1
公开(公告)日：2010-04-22
申请号：US12537219
申请日：2009-08-06
申请人： Wataru SAITO , Syotaro ONO , Nana HATANO , Hiroshi OHTA , Miho WATANABE
发明人： Wataru SAITO , Syotaro ONO , Nana HATANO , Hiroshi OHTA , Miho WATANABE
IPC分类号： H01L29/78
CPC分类号： H01L29/7813 , H01L29/0619 , H01L29/0634 , H01L29/0696 , H01L29/1095 , H01L29/407 , H01L29/41766 , H01L29/7806
摘要： A semiconductor device of the invention includes: a super junction structure of an n-type pillar layer and a p-type pillar layer; a base layer provided on the p-type pillar layer; a source layer selectively provided on a surface of the base layer; a gate insulating film provided on a portion being in contact with the base layer, a portion being in contact with the source layer and a portion being in contact with the n-type pillar layer on a portion of a junction between the n-type pillar layer and the p-type pillar layer; a control electrode provided opposed to the base layer, the source layer and the n-type pillar layer through the gate insulating film; and a source electrode electrically connected to the base layer, the source layer and the n-type layer. The source electrode is contact with the surface of the n-type pillar layer located between the control electrodes to form a Schottky junction.
摘要翻译：本发明的半导体器件包括：n型柱层和p型柱层的超结结构; 设置在p型支柱层上的基底层; 源层选择性地设置在基层的表面上; 设置在与所述基底层接触的部分上的栅极绝缘膜，与所述源极层接触的部分和在所述n型支柱的接合部的一部分上与所述n型支柱层接触的部分层和p型支柱层; 控制电极，其通过所述栅极绝缘膜与所述基极层，所述源极层和所述n型支柱层相对设置; 以及与基极层，源极层和n型层电连接的源电极。源电极与位于控制电极之间的n型支柱层的表面接触以形成肖特基结。

17. 发明申请

US20090236697A1 SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING THE SAME 失效
标题翻译：半导体器件及其制造方法
公开(公告)号：US20090236697A1
公开(公告)日：2009-09-24
申请号：US12403881
申请日：2009-03-13
申请人： Syotaro ONO , Wataru SAITO , Nana HATANO , Masaru IZUMISAWA , Yasuto SUMI , Hiroshi OHTA , Wataru SEKINE , Miho WATANABE
发明人： Syotaro ONO , Wataru SAITO , Nana HATANO , Masaru IZUMISAWA , Yasuto SUMI , Hiroshi OHTA , Wataru SEKINE , Miho WATANABE
IPC分类号： H01L29/06 , H01L21/20
CPC分类号： H01L29/66712 , H01L21/266 , H01L29/0615 , H01L29/0634 , H01L29/0638 , H01L29/0696 , H01L29/0878 , H01L29/1095 , H01L29/402 , H01L29/7395 , H01L29/7811
摘要： A semiconductor device includes a super junction region that has a first-conductivity-type first semiconductor pillar region and a second-conductivity-type second semiconductor pillar region alternately provided on the semiconductor substrate. The first semiconductor pillar region and the second semiconductor pillar region in a termination region have a lamination form resulting from alternate lamination of the first semiconductor pillar region and the second semiconductor pillar region on the top surface of the semiconductor substrate. The first semiconductor pillar region and/or the second semiconductor pillar region at a corner part of the termination region exhibit an impurity concentration distribution such that a plurality of impurity concentration peaks appear periodically. The first semiconductor pillar region and/or the second semiconductor pillar region at a corner part of the termination region have an impurity amount such that it becomes smaller as being closer to the circumference of the corner part.
摘要翻译：半导体器件包括具有交替设置在半导体衬底上的第一导电型第一半导体柱区域和第二导电型第二半导体柱区域的超结区域。终端区域中的第一半导体柱区域和第二半导体柱区域具有由半导体衬底的顶表面上的第一半导体柱区域和第二半导体柱区域的交替层叠形成的叠层形式。终端区域的角部处的第一半导体柱区域和/或第二半导体柱区域显示杂质浓度分布，使得多个杂质浓度峰值周期性出现。终端区域的角部处的第一半导体柱区域和/或第二半导体柱区域具有使得随着角部更靠近圆周而变小的杂质量。

18. 发明授权

US07576172B2 Method of preparing aliphatic polymer having ketone group in main chain thereof and method of preparing composition containing the same 失效
标题翻译：制备主链中具有酮基的脂族聚合物的方法及其制备方法
公开(公告)号：US07576172B2
公开(公告)日：2009-08-18
申请号：US10568428
申请日：2004-04-30
申请人： Taishi Shigematsu , Chikara Manabe , Masaki Hirakata , Kentaro Kishi , Miho Watanabe , Hiroyuki Watanabe
发明人： Taishi Shigematsu , Chikara Manabe , Masaki Hirakata , Kentaro Kishi , Miho Watanabe , Hiroyuki Watanabe
IPC分类号： C08G65/34 , C08G2/00 , C08G4/00 , C08G6/00 , C08G10/00 , C08G12/00 , C08G14/00 , C08G16/00 , C23C14/12 , C23C14/10 , C08K3/00 , H01B1/12 , B60C1/00 , C08K3/04
CPC分类号： C08G65/34 , B82Y30/00 , C08G65/00 , C08G65/48
摘要： The present invention discloses a method of synthesizing an aliphatic polymer having a ketone group in the main chain thereof, in which polyhydric alcohol (for example, glycerin) as a raw material is polymerized in the presence of a catalyst, and a method of preparing a composition containing an aliphatic polymer having a ketone group in the main chain thereof, including such a process.
摘要翻译：本发明公开了在催化剂存在下，使主链中含有作为原料的多元醇（例如甘油）聚合的主链中的具有酮基的脂肪族聚合物的合成方法，包含其主链中具有酮基的脂肪族聚合物的组合物，包括这种方法。

19. 发明申请

US20080166650A1 Colorant and toner 有权
标题翻译：着色剂和墨粉
公开(公告)号：US20080166650A1
公开(公告)日：2008-07-10
申请号：US12003340
申请日：2007-12-21
申请人： Shinji Hasegawa , Kazunori Anazawa , Yuka Ito , Minquan Tian , Kazuhiko Hirokawa , Makoto Furuki , Kazunaga Horiuchi , Takashi Matsubara , Tomoko Miyahara , Miho Watanabe
发明人： Shinji Hasegawa , Kazunori Anazawa , Yuka Ito , Minquan Tian , Kazuhiko Hirokawa , Makoto Furuki , Kazunaga Horiuchi , Takashi Matsubara , Tomoko Miyahara , Miho Watanabe
IPC分类号： G03G9/09 , G03G9/087
CPC分类号： G03G9/0916 , C09D11/037 , C09D11/322 , G03G9/0922
摘要： A colorant comprising an aggregate of a molecule having a squarylium skeleton and having a maximum absorption wavelength at about 500 nm to about 600 nm in a molecular dispersion state.
摘要翻译：一种着色剂，其在分子分散状态下包含具有方酸骨架并具有约500nm至约600nm的最大吸收波长的分子的聚集体。

20. 发明申请

US20080105544A1 Electrode for electrochemical measurement 失效
标题翻译：电极用于电化学测量
公开(公告)号：US20080105544A1
公开(公告)日：2008-05-08
申请号：US10863732
申请日：2004-06-09
申请人： Taishi Shigematsu , Miho Watanabe , Chikara Manabe , Hiroyuki Watanabe
发明人： Taishi Shigematsu , Miho Watanabe , Chikara Manabe , Hiroyuki Watanabe
IPC分类号： G01N27/26 , G01N27/30
CPC分类号： B82Y15/00 , B82Y30/00 , G01N27/308
摘要： The present invention provides an electrode for electrochemical measurement including a carbon nanotube, a catalyst causing a specific chemical reaction, and an insulator in which the carbon nanotube and the catalyst are embedded, wherein a part of the catalyst is exposed at the surface of the insulator and a part of the carbon nanotube is exposed at the surface of the insulator to form an electoconductive portion, or wherein a part of the catalyst is exposed at the surface of the insulator, and a part of the carbon nanotube is electrically connected to the exposed catalyst to form an electoconductive portion.
摘要翻译：本发明提供一种用于电化学测量的电极，包括碳纳米管，引起特定化学反应的催化剂，以及嵌入有碳纳米管和催化剂的绝缘体，其中一部分催化剂在绝缘体的表面露出并且所述碳纳米管的一部分在所述绝缘体的表面露出以形成电导体部分，或者其中所述催化剂的一部分在所述绝缘体的表面露出，并且所述碳纳米管的一部分与所述暴露的催化剂形成电导电部分。

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