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11. 发明申请

US20060008478A1 Immunoadjuvant 审中-公开
标题翻译：免疫佐剂
公开(公告)号：US20060008478A1
公开(公告)日：2006-01-12
申请号：US10510708
申请日：2003-04-15
申请人： Tadao Ohno , Eiji Uchimura , Lan Huang , Ming Kuang
发明人： Tadao Ohno , Eiji Uchimura , Lan Huang , Ming Kuang
IPC分类号： A61K39/00
CPC分类号： A61K39/39 , A61K39/0011 , A61K2039/5154 , A61K2039/5158 , A61K2039/55516 , A61K2039/55583
摘要： An immunoadjuvant which can efficiently exhibit potent adjuvant activity and avoid conditions undesirable for living bodies, and comprises precipitates formed by coacervation of (a) a soluble protein (provided that a soluble protein contained in tuberculin is excluded), and (b) a mucopolysaccharide, and further comprises (c) a soluble protein contained in tuberculin wherein said (c) is coprecipitated with the precipitates.
摘要翻译：一种免疫佐剂，其能够有效地显示出有效的佐剂活性并避免生物体不利的条件，并且包含通过凝集（a）可溶性蛋白质形成的沉淀物（条件是不包括结核菌素中所含的可溶性蛋白质），和（b）粘多糖，并且还包含（c）结核菌素中所含的可溶性蛋白质，其中所述（c）与沉淀物共沉淀。

12. 发明申请

US20050102296A1 Technique for determining a target data type in a heterogeneous multi-level environment 有权
标题翻译：用于在异构多级环境中确定目标数据类型的技术
公开(公告)号：US20050102296A1
公开(公告)日：2005-05-12
申请号：US10703296
申请日：2003-11-06
申请人： Lan Huang , Eileen Lin , Tina Mukai , Amit Somani , Yang Sun
发明人： Lan Huang , Eileen Lin , Tina Mukai , Amit Somani , Yang Sun
IPC分类号： G06F7/00 , G06F17/30
CPC分类号： G06F17/30566 , Y10S707/99945
摘要： A method, apparatus and article of manufacture, implementing the method, of determines a target data type in an environment having a plurality of levels. Zero or more intermediate levels are between the source level and the target level. A target data type representing the transformation of a data type of an associated datum as the datum passes from the source level through the zero or more intermediate levels to the target level is generated. In another aspect of the invention, the datum is assigned to the target level in accordance with the target data type. In yet another aspect of the invention, the target data type is passed with the associated datum, via the zero or more intermediate levels to the target level.
摘要翻译：实现该方法的方法，装置和制品在具有多个级别的环境中确定目标数据类型。零级或更多的中间级别在源级别和目标级别之间。生成表示当基准从源级别通过零个或多个中间级别传递到目标级别时相关联的数据的数据类型的变换的目标数据类型。在本发明的另一方面，根据目标数据类型将数据分配给目标级别。在本发明的另一方面，目标数据类型通过相关联的数据经由零个或多个中间级别传递到目标级别。

13. 发明授权

US5591259A Rapid setting cementitious compositions and method 失效
标题翻译：快速凝固水泥组合物和方法
公开(公告)号：US5591259A
公开(公告)日：1997-01-07
申请号：US470870
申请日：1995-06-06
申请人： Lan Huang , Stephen A. Farrington
发明人： Lan Huang , Stephen A. Farrington
IPC分类号： C04B24/06 , C04B28/02 , C04B24/04
CPC分类号： C04B28/02 , C04B24/06 , C04B2103/12 , C04B2111/00155
摘要： Rapid setting cementitious compositions comprise hydraulic cement and at least 4% by weight based on the weight of the cement of a water-soluble malate or citramalate such as an alkali metal malate or alkali metal citramalate.
摘要翻译：快速凝固水泥质组合物包含水硬性水泥，至少4重量％，基于水泥的水溶性苹果酸盐或柠檬酸盐如碱金属苹果酸盐或碱金属柠檬酸盐的重量。

14. 发明授权

US08387028B2 Determining a target data type in a heterogeneous multi-level environment 失效
标题翻译：确定异构多级环境中的目标数据类型
公开(公告)号：US08387028B2
公开(公告)日：2013-02-26
申请号：US12110187
申请日：2008-04-25
申请人： Lan Huang , Eileen Tien Lin , Tina Louise Mukai , Amit Radheshyam Somani , Yang Sun
发明人： Lan Huang , Eileen Tien Lin , Tina Louise Mukai , Amit Radheshyam Somani , Yang Sun
IPC分类号： G06F9/45 , G06F17/00 , G06F7/00
CPC分类号： G06F17/30566 , Y10S707/99945
摘要： An apparatus and computer program product determine a target data type in an environment having a plurality of levels. The plurality of levels comprise a source level, zero or more intermediate levels, and a target level. The zero or more intermediate levels are between the source level and the target level. A target data type representing a transformation of a data type of an associated datum as the datum passes from the source level through the zero or more intermediate levels to the target level is generated. The target data type comprises a sequence of nested transformation functions having an innermost transformation function and an outermost transformation function.
摘要翻译：设备和计算机程序产品在具有多个级别的环境中确定目标数据类型。多个级别包括源级别，零级或更多级别以及目标级别。零个或多个中间级别在源级别和目标级别之间。生成表示当基准从源级别通过零个或多个中间级别传递到目标级别时的关联数据的数据类型的变换的目标数据类型。目标数据类型包括具有最内变换函数和最外变换函数的嵌套变换函数序列。

15. 发明授权

US07853548B2 Methodology and computer program product for effecting rule evaluation in policy based data management 失效
标题翻译：在政策性数据管理中实施规则评估的方法论和计算机程序产品
公开(公告)号：US07853548B2
公开(公告)日：2010-12-14
申请号：US12034238
申请日：2008-02-20
申请人： Lan Huang , Windsor Wee Sun Hsu
发明人： Lan Huang , Windsor Wee Sun Hsu
IPC分类号： G06N5/00
CPC分类号： G06F17/30336 , G06F17/30507 , G06Q10/10
摘要： The invention relates to a system and method for providing efficient policy rule updates in policy-based data management. More particularly, the invention relates to a system and method for restraining the size of the set of data objects to be examined after a policy rule evaluation.
摘要翻译：本发明涉及一种用于在基于策略的数据管理中提供有效的策略规则更新的系统和方法。更具体地，本发明涉及一种用于在策略规则评估之后限制要检查的数据对象的大小的系统和方法。

16. 发明申请

US20100223665A1 SYSTEM AND METHOD FOR PROVIDING A VIRTUAL BINDING FOR A WORM STORAGE SYSTEM ON REWRITABLE MEDIA 失效
标题翻译：用于为有创纪录的媒体提供虚拟存储系统的虚拟绑定的系统和方法
公开(公告)号：US20100223665A1
公开(公告)日：2010-09-02
申请号：US12781021
申请日：2010-05-17
申请人： Windsor Wee Sun Hsu , Lan Huang
发明人： Windsor Wee Sun Hsu , Lan Huang
IPC分类号： G06F21/00
CPC分类号： G06F21/6218
摘要： A virtual binding system ensures that the WORM logic for protecting data immutability cannot be circumvented, effectively guaranteeing WORM property of a WORM storage system composed of rewritable magnetic hard disks. To close the security hole between the rewritable media and the WORM logic, virtual binding securely authenticates the legitimacy of a WORM logic controller before granting data access on a WORM storage media. Furthermore, the system verifies the legitimacy of the WORM logic controller during data access. This approach virtually binds together the WORM logic controller and the WORM storage media even though the WORM logic controller and the WORM storage media may be physically separate.
摘要翻译：虚拟绑定系统确保不能避免用于保护数据不变性的WORM逻辑，有效地保证由可重写磁性硬盘组成的WORM存储系统的WORM属性。要关闭可重写介质和WORM逻辑之间的安全漏洞，虚拟绑定安全地验证WORM逻辑控制器的合法性，然后才能授予WORM存储介质上的数据访问权限。此外，系统在数据访问期间验证WORM逻辑控制器的合法性。即使WORM逻辑控制器和WORM存储介质可能是物理上分离的，这种方式实际上将WORM逻辑控制器和WORM存储介质绑定在一起。

17. 发明申请

US20090284081A1 Power discharge control system 有权
标题翻译：放电控制系统
公开(公告)号：US20090284081A1
公开(公告)日：2009-11-19
申请号：US12220778
申请日：2008-07-28
申请人： Lan Huang , Shih-Hao Liu
发明人： Lan Huang , Shih-Hao Liu
IPC分类号： G05F1/10
CPC分类号： H05K9/0067
摘要： A power discharge control system for eliminating residual voltage of electronic components in an electronic device, is proposed, which includes a control IC for outputting first electrical signals of a first level and a second level respectively corresponding to power on and power off of the electronic device; a power supply for receiving the first electrical signal, and providing or terminating operation power to the electronic component accordingly, and delaying outputting of a second electrical signal equivalent to the first electrical signal level; a logic judgment module connected to the control IC and the power supply for receiving the first and the second electrical signals for executing logic operation process, when at least one of the first and the second electrical signals is at the first level, a third electrical signal of a third level is outputted, when both the first and the second electrical signals are at the second level, a third electrical signal of a fourth level is outputted; and at least a discharge module for receiving the third electrical signal, when the third electrical signal is at the third level, the discharge process is skipped, when the third electrical signal is at the fourth level, the discharge process is executed.
摘要翻译：提出了一种用于消除电子设备中的电子部件的残余电压的放电控制系统，其包括用于分别输出对应于电子设备的通电和断电的第一电平和第二电平的第一电信号的控制IC ; 电源，用于接收第一电信号，并相应地向电子组件提供或终止操作电力，并延迟输出等效于第一电信号电平的第二电信号; 连接到控制IC的逻辑判断模块和用于在第一和第二电信号中的至少一个处于第一电平时接收用于执行逻辑运算处理的第一和第二电信号的电源，第三电信号当第一和第二电信号均处于第二电平时，输出第三电平的第三电平的第三电信号; 以及至少一个用于接收第三电信号的放电模块，当第三电信号处于第三电平时，跳过放电过程，当第三电信号处于第四电平时，执行放电处理。

18. 发明申请

US20090210878A1 SYSTEM AND METHOD FOR DATA MANAGEMENT JOB PLANNING AND SCHEDULING WITH FINISH TIME GUARANTEE 失效
标题翻译：用于数据管理的系统和方法作业计划和调度与完成时间保证
公开(公告)号：US20090210878A1
公开(公告)日：2009-08-20
申请号：US12034427
申请日：2008-02-20
申请人： LAN HUANG
发明人： LAN HUANG
IPC分类号： G06F9/46
CPC分类号： G06F9/4881
摘要： A method is disclosed for scheduling data management jobs on a computer system that uses a dual level scheduling method. Macro level scheduling using a chained timer schedules the data management job for execution in the future. Micro level scheduling using an algorithm controls the actual dispatch of the component requests of a data management job to minimize impact on foreground programs.
摘要翻译：公开了一种在使用双级调度方法的计算机系统上调度数据管理作业的方法。使用链接定时器的宏级调度会调度数据管理作业以备将来执行。使用算法的微级调度控制数据管理作业的组件请求的实际分派，以最小化对前台程序的影响。

19. 发明申请

US20090125731A1 CORE VOLTAGE CONTROLLING APPARATUS 有权
标题翻译：核心电压控制装置
公开(公告)号：US20090125731A1
公开(公告)日：2009-05-14
申请号：US11960178
申请日：2007-12-19
申请人： Lan Huang , Shih-Hao Liu
发明人： Lan Huang , Shih-Hao Liu
IPC分类号： G06F1/26
CPC分类号： G06F1/26
摘要： A core voltage controlling apparatus suitable for a center processing unit (CPU) is provided. The apparatus includes a level shifting unit, a time-delay unit and a logic unit. An input terminal of the level shifting unit receives and shifts a first voltage signal, and an output terminal generates a second voltage signal, in which the first voltage signal indicates a power-on stable state, and the second voltage signal indicates a magnitude of the core voltage. The time-delay unit delays the second voltage signal to generate a third voltage signal. The logic unit is coupled to the time-delay unit for performing a logic operation on the third voltage and a fourth voltage signal transmitted by a power supply, and generating a fifth voltage signal for controlling a core voltage generator whether to provide the core voltage to the CPU or not, in which the fourth voltage signal indicates a power state.
摘要翻译：提供一种适用于中央处理单元（CPU）的核心电压控制装置。该装置包括电平转换单元，延时单元和逻辑单元。电平移位单元的输入端子接收并移位第一电压信号，并且输出端子产生其中第一电压信号指示通电稳定状态的第二电压信号，并且第二电压信号指示第核心电压。时间延迟单元延迟第二电压信号以产生第三电压信号。逻辑单元耦合到时间延迟单元，用于对由电源发送的第三电压和第四电压信号进行逻辑运算，并产生用于控制核心电压发生器的第五电压信号，以提供核心电压 CPU，否则，第四电压信号表示电源状态。

20. 发明申请

US20090115470A1 MEMORY RESET APPARATUS 失效
标题翻译：存储器复位设备
公开(公告)号：US20090115470A1
公开(公告)日：2009-05-07
申请号：US11970962
申请日：2008-01-08
申请人： Lan Huang , Shih-Hao Liu
发明人： Lan Huang , Shih-Hao Liu
IPC分类号： H03K17/22 , G11C5/14
CPC分类号： G11C5/063 , H03K17/22
摘要： A memory reset apparatus including a first inverse circuit, a logic circuit, and a plurality of second inverse circuits is provided. The first inverse circuit receives a control signal generated by a north bridge and generates a first signal, in which the control signal controls reset of a plurality of memories. The logic circuit performs a logic operation of the first signal and an indicating signal and generates a second signal, in which the indicating signal indicates each component of a computer system completely powered on. The plurality of second inverse circuits is respectively coupled between the logic circuit and the memories. The second inverse circuits inverse the second signal and respectively generate a plurality of reset signals to the memories, so as to reset the memories.
摘要翻译：提供了包括第一反向电路，逻辑电路和多个第二反向电路的存储器复位装置。第一反向电路接收由北桥产生的控制信号，并产生第一信号，其中控制信号控制多个存储器的复位。逻辑电路执行第一信号和指示信号的逻辑运算，并产生第二信号，其中指示信号指示计算机系统的每个部件完全通电。多个第二反向电路分别耦合在逻辑电路和存储器之间。第二反向电路与第二信号反相并分别产生多个复位信号给存储器，从而复位存储器。

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