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11. 发明申请

US20090052669A1 METHOD AND SYSTEM FOR DISASTER RECOVERY OF DATA FROM A STORAGE DEVICE 有权
标题翻译：用于从存储设备中数据恢复的方法和系统
公开(公告)号：US20090052669A1
公开(公告)日：2009-02-26
申请号：US12194302
申请日：2008-08-19
申请人： Kenneth Ma
发明人： Kenneth Ma
IPC分类号： H04L9/06
CPC分类号： G06F21/64 , G09C1/00 , H04L9/0863 , H04L9/0897
摘要： Aspects of the invention provide a method and system for securely managing the storage and retrieval of data. Securely managing the storage and retrieval of data may include receiving a first disaster recovery code and acquiring a first password corresponding to the first disaster recovery code. A first disaster recovery key may be generated based on the first disaster recovery code and the first password. Another aspect of the invention may also include generating the received first disaster recovery code based on said first password and the first disaster recovery key. The generated disaster recovery code may be securely stored on at least a portion of a storage device or a removable media. Data stored on the storage device may be encrypted using the first generated disaster recovery key. Additionally, data read from the storage device may be decrypted using the generated first disaster recovery key.
摘要翻译：本发明的方面提供了一种用于安全地管理数据的存储和检索的方法和系统。安全地管理数据的存储和检索可以包括接收第一灾难恢复代码并获取与第一灾难恢复代码相对应的第一密码。可以基于第一灾难恢复代码和第一密码来生成第一灾难恢复密钥。本发明的另一方面还可以包括基于所述第一密码和第一灾难恢复密钥生成接收的第一灾难恢复码。生成的灾难恢复代码可以安全地存储在存储设备或可移动介质的至少一部分上。可以使用第一生成的灾难恢复密钥对存储设备上存储的数据进行加密。此外，可以使用所生成的第一灾难恢复密钥来解密从存储设备读取的数据。

12. 发明授权

US07415115B2 Method and system for disaster recovery of data from a storage device 有权
标题翻译：从存储设备进行数据灾难恢复的方法和系统
公开(公告)号：US07415115B2
公开(公告)日：2008-08-19
申请号：US10437532
申请日：2003-05-14
申请人： Kenneth Ma
发明人： Kenneth Ma
IPC分类号： H04L9/00 , H04K1/00 , G06F11/30 , G06F3/023 , G06F21/00 , H03M11/10 , H03M11/12 , H04L9/08
CPC分类号： G06F21/64 , G09C1/00 , H04L9/0863 , H04L9/0897
摘要： Aspects of the invention provide a method and system for securely managing the storage and retrieval of data. Securely managing the storage and retrieval of data may include receiving a first disaster recovery code and acquiring a first password corresponding to the first disaster recovery code. A first disaster recovery key may be generated based on the first disaster recovery code and the first password. Another aspect of the invention may also include generating the received first disaster recovery code based on said first password and the first disaster recovery key. The generated disaster recovery code may be securely stored on at least a portion of a storage device or a removable media. Data stored on the storage device may be encrypted using the first generated disaster recovery key. Additionally, data read from the storage device may be decrypted using the generated first disaster recovery key.
摘要翻译：本发明的方面提供了一种用于安全地管理数据的存储和检索的方法和系统。安全地管理数据的存储和检索可以包括接收第一灾难恢复代码并获取与第一灾难恢复代码相对应的第一密码。可以基于第一灾难恢复代码和第一密码来生成第一灾难恢复密钥。本发明的另一方面还可以包括基于所述第一密码和第一灾难恢复密钥生成接收到的第一灾难恢复代码。生成的灾难恢复代码可以安全地存储在存储设备或可移动介质的至少一部分上。可以使用第一生成的灾难恢复密钥对存储设备上存储的数据进行加密。此外，可以使用所生成的第一灾难恢复密钥来解密从存储设备读取的数据。

13. 发明申请

US20080062918A1 PEER TO PEER WIRELESS COMMUNICATION CONFLICT RESOLUTION 有权
标题翻译：同行无线通信冲突决议
公开(公告)号：US20080062918A1
公开(公告)日：2008-03-13
申请号：US11938628
申请日：2007-11-12
申请人： Brima Ibrahim , Kenneth Ma
发明人： Brima Ibrahim , Kenneth Ma
IPC分类号： H04Q7/00
CPC分类号： H04W72/1215 , H04L1/1642 , H04W88/06
摘要： In accordance with a method for wireless communication, in a coexistence system comprising a plurality of different wireless interface devices within a single integrated circuit, wherein each of the plurality of wireless interface devices utilizes a corresponding different wireless communication standard, and when one of the plurality of wireless interface devices is receiving or will receive a packet, communicating from the one of the plurality of wireless interface devices, an indication to at least one of a remaining one or remaining ones of the plurality of wireless interface devices, which enables the at least one of the remaining one or ones of the plurality of wireless interface devices to delay corresponding transmission based on the indication. The indication may include status information for the receiving of the packet by the one of the plurality of wireless interface devices.
摘要翻译：根据用于无线通信的方法，在包括单个集成电路内的多个不同无线接口设备的共存系统中，其中所述多个无线接口设备中的每一个利用相应的不同无线通信标准，并且当所述多个无线接口设备中的一个的无线接口设备正在接收或将接收从所述多个无线接口设备之一通信的分组，指示所述多个无线接口设备中剩余的一个或多个无线接口设备中的至少一个无线接口设备的至少一个，所述多个无线接口设备中的剩余一个或多个无线接口设备中的一个基于所述指示来延迟对应的传输。所述指示可以包括由所述多个无线接口设备中的一个接收所述分组的状态信息。

14. 发明授权

US07231534B2 Method and apparatus for improving bus master performance 有权
标题翻译：提高总线主控性能的方法和装置
公开(公告)号：US07231534B2
公开(公告)日：2007-06-12
申请号：US11189688
申请日：2005-07-26
申请人： Kenneth Ma
发明人： Kenneth Ma
IPC分类号： G06F1/26
CPC分类号： G06F1/324 , G06F1/3203 , G06F1/3215 , G06F1/3225 , G06F1/3228 , G06F1/3243 , G06F1/325 , G06F1/3253 , G06F1/3275 , G06F1/3296 , Y02D10/126 , Y02D10/13 , Y02D10/14 , Y02D10/151 , Y02D10/152 , Y02D10/172 , Y02D50/20
摘要： A method and apparatus are disclosed for performing dynamic arbitration of memory accesses by a CPU and at least one bus master interface module based on, at least in part, monitoring a CPU throttle control signal and monitoring CPU power and performance states, and making decisions based on the monitored parameters. Bus master memory access break events and memory read and write accesses are also monitored as part of the arbitration process in accordance with certain embodiments of the present invention. An arbitration (ARB) module performs the dynamic arbitration. A CPU throttle control module generates the CPU throttle control signal, indicating when the CPU is idle, and also monitors and outputs the CPU power and performance states. A memory controller (MC) module controls accesses to the memory subsystem based on, at least in part, the dynamic arbitration performed by the dynamic arbitration module.
摘要翻译：公开了一种方法和装置，用于至少部分地至少部分地监视CPU节气门控制信号和监视CPU功率和性能状态，并且基于CPU进行决策，来执行CPU和至少一个总线主接口模块的存储器访问的动态仲裁对监控的参数。根据本发明的某些实施例，总线主存储器访问中断事件和存储器读写访问也被作为仲裁过程的一部分进行监视。仲裁（ARB）模块执行动态仲裁。 CPU节气门控制模块产生CPU油门控制信号，指示CPU何时空转，并监控并输出CPU功率和性能状态。存储器控制器（MC）模块至少部分地基于由动态仲裁模块执行的动态仲裁来控制对存储器子系统的访问。

15. 发明授权

US06971033B2 Method and apparatus for improving bus master performance 有权
标题翻译：提高总线主控性能的方法和装置
公开(公告)号：US06971033B2
公开(公告)日：2005-11-29
申请号：US10339843
申请日：2003-01-10
申请人： Kenneth Ma
发明人： Kenneth Ma
IPC分类号： G06F1/32 , G06F13/28
CPC分类号： G06F1/324 , G06F1/3203 , G06F1/3215 , G06F1/3225 , G06F1/3228 , G06F1/3243 , G06F1/325 , G06F1/3253 , G06F1/3275 , G06F1/3296 , Y02D10/126 , Y02D10/13 , Y02D10/14 , Y02D10/151 , Y02D10/152 , Y02D10/172 , Y02D50/20
摘要： A method and apparatus are disclosed for performing dynamic arbitration of memory accesses by a CPU and at least one bus master interface module based on, at least in part, monitoring a CPU throttle control signal and monitoring CPU power and performance states, and making decisions based on the monitored parameters. Bus master memory access break events and memory read and write accesses are also monitored as part of the arbitration process in accordance with certain embodiments of the present invention. An arbitration (ARB) module performs the dynamic arbitration. A CPU throttle control module generates the CPU throttle control signal, indicating when the CPU is idle, and also monitors and outputs the CPU power and performance states. A memory controller (MC) module controls accesses to the memory subsystem based on, at least in part, the dynamic arbitration performed by the dynamic arbitration module.
摘要翻译：公开了一种方法和装置，用于至少部分地至少部分地监视CPU节气门控制信号和监视CPU功率和性能状态，并且基于CPU进行决策，来执行CPU和至少一个总线主接口模块的存储器访问的动态仲裁对监控的参数。根据本发明的某些实施例，总线主存储器访问中断事件和存储器读写访问也被作为仲裁过程的一部分进行监视。仲裁（ARB）模块执行动态仲裁。 CPU节气门控制模块产生CPU油门控制信号，指示CPU何时空转，并监控并输出CPU功率和性能状态。存储器控制器（MC）模块至少部分地基于由动态仲裁模块执行的动态仲裁来控制对存储器子系统的访问。

16. 发明申请

US20050256983A1 System and method to control access to data stored in a data storage device 有权
标题翻译：控制对存储在数据存储设备中的数据的访问的系统和方法
公开(公告)号：US20050256983A1
公开(公告)日：2005-11-17
申请号：US11049772
申请日：2005-02-03
申请人： Kenneth Ma
发明人： Kenneth Ma
IPC分类号： G06F13/12 , G06F13/38
CPC分类号： G06F13/385
摘要： Various aspects of the invention provide a plurality of systems and methods of selectively enabling access to data stored in a data storage device, by one or more data processing devices communicatively coupled to the data storage device. In a representative embodiment, selective access to one or more data pools may be made as a function of one or more interfaces of the data storage device. In a representative embodiment, selective access to one or more data pools may be made as a function of one or more data file types associated with one or more data pools of the data storage device. In a representative embodiment, access to data stored in one or more data pools of the data storage device may be based on or associated with one or more types networks associated with the data storage device.
摘要翻译：本发明的各个方面提供了多个系统和方法，其通过一个或多个通信地耦合到数据存储设备的数据处理设备来选择性地允许访问存储在数据存储设备中的数据。在代表性实施例中，可以对数据存储设备的一个或多个接口进行对一个或多个数据池的选择性访问。在代表性实施例中，可以对与一个或多个数据存储设备的一个或多个数据池相关联的一个或多个数据文件类型进行对一个或多个数据池的选择性访问。在代表性实施例中，存储在数据存储设备的一个或多个数据池中的对数据的访问可以基于与数据存储设备相关联的一个或多个类型的网络或者与之相关联。

17. 发明申请

US20050229165A1 Method and system for probe optimization while instrumenting a program 失效
标题翻译：测量程序时探头优化的方法和系统
公开(公告)号：US20050229165A1
公开(公告)日：2005-10-13
申请号：US10819463
申请日：2004-04-07
申请人： Kenneth Ma , Stephen Schertz
发明人： Kenneth Ma , Stephen Schertz
IPC分类号： G06F11/28 , G06F9/44 , G06F11/36
CPC分类号： G06F11/3676
摘要： A method and system is provided for instrumenting a program by optimizing probe insertion. The number of probe insertions into instrumented code is reduced by providing optimal probe insertion points. The control flow of the code is analyzed along with the arc and block relationships to build a post-dominator tree. An optimization map is generated from the post-dominator tree that provides the optimal probe insertion points. Once the probes are inserted and data is collected by running the binary representing the code and probes, the data may be overlaid onto the optimization map and arc and block relationships to provide code coverage data.
摘要翻译：提供了一种方法和系统，用于通过优化探针插入来对程序进行检测。通过提供最佳的探针插入点来减少探头插入仪器化代码的次数。对代码的控制流程与弧和块关系进行分析，以构建后置控制器树。从提供最佳探针插入点的后支配树生成优化图。一旦插入了探针，并通过运行表示代码和探针的二进制数据来收集数据，则可以将数据覆盖在优化图上，并且弧和块关系以提供代码覆盖数据。

18. 发明申请

US20050216719A1 Method and apparatus for adaptive CPU power management 有权
标题翻译：自适应CPU电源管理方法和装置
公开(公告)号：US20050216719A1
公开(公告)日：2005-09-29
申请号：US11133776
申请日：2005-05-20
申请人： Kenneth Ma
发明人： Kenneth Ma
IPC分类号： G06F1/32 , G06F9/00
CPC分类号： G06F1/3203 , G06F11/3423 , Y02D10/34
摘要： A method and apparatus are disclosed for performing adaptive run-time power management in a system employing a CPU and an operating system. A CPU cycle tracker (CCT) module monitors critical CPU signals and generates CPU performance data based on the critical CPU signals. An adaptive CPU throttler (THR) module uses the CPU performance data, along with a CPU percent idle value fed back from the operating system, to generate a CPU throttle control signal during predefined run-time segments of the CPU run time. The CPU throttle control signal links back to the CPU and adaptively adjusts CPU throttling and, therefore, power usage of the CPU during each of the run-time segments.
摘要翻译：公开了一种在采用CPU和操作系统的系统中执行自适应运行时电力管理的方法和装置。 CPU循环跟踪器（CCT）模块监视关键CPU信号，并根据关键CPU信号生成CPU性能数据。自适应CPU节流器（THR）模块使用CPU性能数据以及从操作系统反馈的CPU百分比空闲值，以在CPU运行时间的预定义运行时段中生成CPU节气门控制信号。 CPU节气门控制信号返回CPU并自适应地调整CPU节流，因此在每个运行时间段期间调整CPU的功耗。

19. 发明申请

US20050021940A1 Authentication mechanism for wireless communication devices 审中-公开
标题翻译：无线通信设备认证机制
公开(公告)号：US20050021940A1
公开(公告)日：2005-01-27
申请号：US10460969
申请日：2003-06-13
申请人： Kenneth Ma
发明人： Kenneth Ma
IPC分类号： H04W12/06 , H04L9/00
CPC分类号： H04W12/06 , H04L63/0853 , H04W12/00403
摘要： One or more systems and methods are disclosed to securely authenticate one or more wireless communication devices using a subscriber identification mechanism provided by a wireless communication device. The subscriber identification mechanism provides one or more keys and algorithms used in the authentication of a wireless communication device. In one embodiment, the subscriber identification mechanism comprises a subscriber identity module (SIM) card capable of being easily inserted into a wireless communication device. In one embodiment, wireless signal transmission occurs over a GSM/GPRS/EDGE network.
摘要翻译：公开了一种或多种系统和方法，以使用由无线通信设备提供的用户识别机制来安全认证一个或多个无线通信设备。用户识别机制提供在无线通信设备的认证中使用的一个或多个密钥和算法。在一个实施例中，用户识别机制包括能够容易地插入到无线通信设备中的用户识别模块（SIM）卡。在一个实施例中，通过GSM / GPRS / EDGE网络进行无线信号传输。

20. 发明授权

US5983356A Power conservation method and apparatus activated by detecting shadowed interrupt signals indicative of system inactivity and excluding prefetched signals 失效
标题翻译：通过检测指示系统不活动并且排除预取信号的阴影中断信号来激活功率节省方法和装置
公开(公告)号：US5983356A
公开(公告)日：1999-11-09
申请号：US665778
申请日：1996-06-18
申请人： Vimi Pandey , Kenneth Ma , Leo Jiang , Scott Shaw
发明人： Vimi Pandey , Kenneth Ma , Leo Jiang , Scott Shaw
IPC分类号： G06F1/32 , G06F1/00 , G06F1/04 , G06F9/38 , G06F9/46 , G06F9/48
CPC分类号： G06F1/00 , G06F1/04 , G06F1/32 , G06F9/38 , G06F9/46 , G06F9/48 , Y02B60/144
摘要： A method and apparatus is disclosed for controlling the application of a clock stopping signal in a processor to limit power consumption. The system controller receives addresses, signals indicative of primary and secondary system activity, and at least one nap timeout signal. Interrupt addresses or programmed addresses are trapped and stored as shadowed addresses. Current addresses may be compared with shadowed addresses. Matching addresses trigger a nap mode. Upon nap mode triggering, the clock stopping signal may be applied during a throttling period. Applying the clock stopping signal with programmable duty cycle during the throttling period ensures that processing necessary for the detection and servicing of primary and secondary activity can occur. A prefetch detect circuit ensures that shadowed addresses loaded in the middle of a prefetch do not trigger the clock stopping signal. Clock stopping signal is removed or inhibited when primary or secondary activity is detected or when a nap timer expires.
摘要翻译：公开了一种用于控制处理器中的时钟停止信号的应用以限制功耗的方法和装置。系统控制器接收地址，指示主要和次要系统活动的信号，以及至少一个休眠超时信号。中断地址或编程地址被捕获并存储为阴影地址。当前地址可能与阴影地址进行比较。匹配地址触发睡眠模式。在小睡模式触发时，可以在节流期间施加时钟停止信号。在节流期间应用具有可编程占空比的时钟停止信号，可确保对主要和次要活动进行检测和维修所需的处理。预取检测电路确保预取中间加载的阴影地址不会触发时钟停止信号。当检测到主要或次要活动时或当小时计时器到期时，时钟停止信号被去除或禁止。

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