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11. 发明授权

US07304646B2 Image data structure for direct memory access 有权
标题翻译：用于直接存储器访问的图像数据结构
公开(公告)号：US07304646B2
公开(公告)日：2007-12-04
申请号：US10922670
申请日：2004-08-19
申请人： Eiji Iwata
发明人： Eiji Iwata
IPC分类号： G06F13/00 , G09G5/36
CPC分类号： H04N19/423
摘要： A method is provided for transferring data for processing of an image between a first memory and a second memory accessible by a processor. According to such method, data is provided in the first memory for processing of the image, the data being organized into a plurality of blocks, wherein each block relates to a portion of the image. At least some of the data is transferred by a direct memory access controller in units of a block between the first memory and a second memory accessible by the processor.
摘要翻译：提供了一种方法，用于传送用于在由处理器访问的第一存储器和第二存储器之间的图像处理的数据。根据这种方法，在第一存储器中提供数据以处理图像，将数据组织成多个块，其中每个块与图像的一部分相关。至少一些数据由直接存储器访问控制器以第一存储器和处理器可访问的第二存储器之间的块为单位传送。

12. 发明申请

US20060038821A1 Image data structure for direct memory access 有权
标题翻译：用于直接存储器访问的图像数据结构
公开(公告)号：US20060038821A1
公开(公告)日：2006-02-23
申请号：US10922670
申请日：2004-08-19
申请人： Eiji Iwata
发明人： Eiji Iwata
IPC分类号： G06F13/00
CPC分类号： H04N19/423
摘要： A method is provided for transferring data for processing of an image between a first memory and a second memory accessible by a processor. According to such method, data is provided in the first memory for processing of the image, the data being organized into a plurality of blocks, wherein each block relates to a portion of the image. At least some of the data is transferred by a direct memory access controller in units of a block between the first memory and a second memory accessible by the processor.
摘要翻译：提供了一种方法，用于传送用于在由处理器访问的第一存储器和第二存储器之间的图像处理的数据。根据这种方法，在第一存储器中提供数据以处理图像，将数据组织成多个块，其中每个块与图像的一部分相关。至少一些数据由直接存储器访问控制器以第一存储器和处理器可访问的第二存储器之间的块为单位传送。

13. 发明申请

US20050284203A1 Pressed work and manufacturing method thereof 审中-公开
标题翻译：压制工作及其制造方法
公开(公告)号：US20050284203A1
公开(公告)日：2005-12-29
申请号：US11150308
申请日：2005-06-10
申请人： Hideo Takekoshi , Eiji Iwata
发明人： Hideo Takekoshi , Eiji Iwata
IPC分类号： B21B1/00 , B21D22/04 , B21K1/32
CPC分类号： B21K1/32 , B21D22/04 , Y10T29/49991
摘要： A rolled steel plate as a raw material is press-formed into a pressed work provided with a boss section, and the work is fitted to a shaft by press-fitting of the shaft into the boss section. Rolling flow of internal metallographic layers in the boss section is curved like a letter S. Moreover, a manufacturing method of such a pressed work comprises: a primary-boss forming process during which a primary boss having a hole section and a protruding section protruding from the periphery of the hole section at a position corresponding to the boss section on a plane-like raw material is formed; and a boss-section forming process during which the protruding section is pressed and deformed in the protruding length direction to form the boss section.
摘要翻译：作为原料的轧制钢板被压制成具有凸台部分的压制工件，并且通过将轴压入凸台部分将工件装配到轴上。凸起部分内部金相层的滚动流程如字母S弯曲。此外，这种压制工件的制造方法包括：主凸台形成工艺，其中具有孔部分和突出部分的突出部分形成与平面状原料上的凸起部对应的位置的孔部的周缘部; 以及凸起部形成工序，在该突出部形成工序中，突出部在突出长度方向上被按压变形，形成凸台部。

14. 发明申请

US20050147174A1 Encoding apparatus and method of same and decoding apparatus and method of same 审中-公开
标题翻译：其编码装置及其方法及其解码装置及方法
公开(公告)号：US20050147174A1
公开(公告)日：2005-07-07
申请号：US11052190
申请日：2005-02-07
申请人： Eiji Iwata
发明人： Eiji Iwata
IPC分类号： H04N19/50 , G06F9/50 , G06T1/20 , G06T9/00 , H03M7/40 , H04N1/41 , H04N19/423 , H04N19/436 , H04N19/503 , H04N19/51 , H04N19/60 , H04N19/61 , H04N19/625 , H04N19/91 , H04N7/12
CPC分类号： H04N19/436 , H04N19/42 , H04N19/61 , H04N19/91
摘要： Encoding and decoding systems for MPEG encoding and decoding at a high speed using a parallel processing system, wherein macroblocks to be processed are designated for first to third processors which are made to carry out all processings of encoding, variable length coding, and local decoding of those macroblocks; the variable length coding is carried out after confirming that the variable length coding with respect to the previous macroblock is ended; the variable length coding which was normally sequentially carried out at a specific processor is carried out at all of the processors; and the encoding and local decoding are carried out at all of the processors; whereby the loads are dispersed, the efficiency is improved as a whole, and the processing speed becomes fast.
摘要翻译：用于使用并行处理系统以高速进行MPEG编码和解码的编码和解码系统，其中要处理的宏块被指定用于第一至第三处理器，用于执行编码，可变长度编码和本地解码的所有处理那些宏块在确认相对于前一个宏块的可变长度编码结束之后执行可变长度编码; 在所有处理器中执行通常在特定处理器处顺序执行的可变长度编码; 并且在所有处理器上执行编码和本地解码; 由此负载分散，整体上提高效率，加工速度变快。

15. 发明授权

US5629882A Discrete cosine transformation system and inverse discrete cosine transformation system, having simple structure and operable at high speed 失效
标题翻译：离散余弦变换系统和逆离散余弦变换系统，结构简单，运行速度快
公开(公告)号：US5629882A
公开(公告)日：1997-05-13
申请号：US115756
申请日：1993-09-03
申请人： Eiji Iwata
发明人： Eiji Iwata
IPC分类号： G06F17/14 , G06F7/38
CPC分类号： G06F17/147 , G06F17/145
摘要： An 8.times.8 discrete cosine transformation (8.times.8 DCT) system with minimum multiplications, without a reduced accuracy of calculation, and operable at a high speed, and an 8.times.8 inverse discrete cosine transformation (IDCT) system are disclosed. The transformation matrices for an 8.times.8 DCT are factorized into a constant matrix [Q] and a matrix [R], and the relationship between the original input data [X] and the output matrix data [C] can be defined by [C]=1/2.multidot.[R] [Q] [X]. The matrix [Q] consists of 0, 1, and -1, while the matrix [R] consists of irrational numbers defined by the 8.times.8 DCT. The computation of the constant matrix [Q] to the matrix data [X] can be realized by an addition and subtraction operation, while multiplication is performed just for the computation of the matrix [R]. The addition and subtraction circuit performs a computation between [X] and [Q], while the multiplication and addition circuit performs a computation between the result of computation of the addition and subtraction circuit and the matrix [R]. Also, an 8.times.8 IDCT performs the computation inverse to the 8.times.8 DCT.
摘要翻译：公开了一种具有最小乘法的8×8离散余弦变换（8×8 DCT）系统，没有降低的计算精度并且可以高速运行，并且具有8×8的逆离散余弦变换（IDCT）系统。 8×8 DCT的变换矩阵被分解为常数矩阵[Q]和矩阵[R]，原始输入数据[X]和输出矩阵数据[C]之间的关系可以由[C] = + E，fra 1/2 + EE x [R] [Q] [X]。矩阵[Q]由0，1和-1组成，而矩阵[R]由8x8 DCT定义的无理数组成。常数矩阵[Q]到矩阵数据[X]的计算可以通过加法运算和减法运算来实现，而乘法仅用于矩阵[R]的计算。加法和减法电路在[X]和[Q]之间执行计算，而乘法和加法电路执行加法和减法电路的计算结果与矩阵[R]之间的计算。此外，8×8 IDCT执行与8×8 DCT相反的计算。

16. 发明授权

US08001294B2 Methods and apparatus for providing a compressed network in a multi-processing system 有权
标题翻译：在多处理系统中提供压缩网络的方法和装置
公开(公告)号：US08001294B2
公开(公告)日：2011-08-16
申请号：US11236262
申请日：2005-09-27
申请人： Keisuke Inoue , Eiji Iwata
发明人： Keisuke Inoue , Eiji Iwata
IPC分类号： G06F13/28 , G06F3/00
CPC分类号： G06F13/28 , G06F15/167
摘要： The present invention provides methods and apparatus for transferring and storing data among processors and memory in a multiprocessor system. The data is compressed locally before it is sent to a shared memory. The memory stores the data in its compressed state, but the data is aligned in the memory in the same manner as uncompressed data would be. A tag table keeps track of the compression type and compressed data size for a set of data at a given address block. A data compressor and a data expander may be implemented in a direct memory access controller accessible to multiple coprocessors, or the compressor and the expander may be implemented within the coprocessors.
摘要翻译：本发明提供了用于在多处理器系统中在处理器和存储器之间传送和存储数据的方法和装置。在将数据发送到共享内存之前，将数据压缩到本地。存储器将数据存储在其压缩状态，但数据以与未压缩数据相同的方式存储在存储器中。标签表跟踪给定地址块上的一组数据的压缩类型和压缩数据大小。可以在可由多个协处理器访问的直接存储器访问控制器中实现数据压缩器和数据扩展器，或者压缩器和扩展器可以在协处理器内实现。

17. 发明授权

US07038676B2 System and method for data compression 有权
公开(公告)号：US07038676B2
公开(公告)日：2006-05-02
申请号：US10167328
申请日：2002-06-11
申请人： Eiji Iwata , Masakazu Suzuoki
发明人： Eiji Iwata , Masakazu Suzuoki
IPC分类号： G06F17/00 , G09G5/00 , G06T13/00
CPC分类号： H04N19/51 , G06T9/001 , H04N19/20 , H04N19/57
摘要： A system and method for compressing video graphics data are provided. The system and method include generating in a graphics pipeline, from video graphics data modeling objects, vertex data corresponding to the objects, rendering the video graphics data to produce a current frame of pixel data and a reference frame of pixel data, and, based upon the vertex data, defining a search area within the reference frame for calculating a motion vector for a block of pixel data within the current frame. The current frame then is compressed using the motion vector. The use of vertex data from the graphics pipeline to define the search area substantially reduces the amount of searching necessary to generate motion vectors and perform data compression.

18. 发明授权

US06198771B1 Motion vector processing circuit 失效
标题翻译：运动矢量处理电路
公开(公告)号：US06198771B1
公开(公告)日：2001-03-06
申请号：US08140318
申请日：1993-10-22
申请人： Eiji Iwata
发明人： Eiji Iwata
IPC分类号： H04N712
CPC分类号： H04N5/145 , G06T7/231 , G06T2200/28 , G06T2207/10016 , H04N19/51
摘要： A processing circuit for performing full searching by a block-matching method for detecting the motion vector, with a block size of a reference block of the current frame being for example, 3×4 pixels and the number of candidate blocks of a previous frame being 3×4. The processing includes 3×4 or 12 processing units each of which is adapted for accumulating an absolute value of the difference between the pixel value of the reference block of the current frame on one hand and the pixel value of a candidate block of an odd column of the previous frame and the pixel value of a candidate block of an even column of the previous frame, whichever is selected as a result of multiplication, on the other hand, to find the sum of the absolute values of the differences. These units are arrayed in a 3×4 matrix configuration and interconnected so as to be supplied with the pixel values of the reference block and the candidate blocks in a pre-set sequence to detect the motion vector.
摘要翻译：一种用于通过用于检测运动矢量的块匹配方法执行全部搜索的处理电路，当前帧的参考块的块大小例如为3×4像素，并且前一帧的候选块的数量为3×4。该处理包括3×4或12个处理单元，每个处理单元适于累积一方面当前帧的参考块的像素值与第一列的奇数列的候选块的像素值之间的差的绝对值另一方面，前一帧的前一帧的偶数列的候选块的像素值（作为乘法结果选择的那个）的像素值，以找到差的绝对值的和。这些单元以3×4矩阵配置排列并互连，以便以预设序列提供参考块和候选块的像素值以检测运动矢量。

19. 发明授权

US5644082A Vehicle rotational-angle calculating apparatus 失效
标题翻译：车辆旋转角度计算装置
公开(公告)号：US5644082A
公开(公告)日：1997-07-01
申请号：US496618
申请日：1995-06-29
申请人： Eiji Iwata , Hiroyuki Maeda
发明人： Eiji Iwata , Hiroyuki Maeda
IPC分类号： G01C21/04 , G01C19/00 , G01C21/28 , G01P7/00
CPC分类号： G01C21/28
摘要： A first sensor outputs a signal representing an angular rate of a vehicle body. A second sensor outputs a signal representing a direction of the vehicle body. The output signal of the first sensor is integrated to generate a signal representing a tentative rotational angle of the vehicle body. First data pieces are generated which represent temporally spaced samples of the output signal of the second sensor respectively. Second data pieces are generated which represent temporally spaced samples of the tentative rotational angle signal respectively. Two first data pieces are selected from among the first data pieces. Calculation is given of a time interval between the occurrence moments of the selected two first data pieces. Two second data pieces are selected from among the second data pieces. Calculation is given of a direction difference between directions represented by the selected two first data pieces. Calculation is given of a rotational-angle difference between tentative rotational angles represented by the selected two second data pieces. An amount of offset in the output signal of the first sensor is calculated in response to the calculated time interval and the calculated rotational-angle difference in cases where the calculated direction difference is equal to or smaller than a predetermined direction difference. The output signal of the first sensor is corrected into an offset-free signal in response to the calculated offset amount. The offset-free signal is integrated to generate a signal representing a final rotational angle of the vehicle body.
摘要翻译：第一传感器输出表示车身的角速度的信号。第二传感器输出表示车身方向的信号。第一传感器的输出信号被积分，以产生表示车体暂时旋转角度的信号。生成表示第二传感器的输出信号的时间间隔采样的第一数据。生成表示临时旋转角信号的时间间隔样本的第二数据片。从第一数据片段中选择两个第一数据片段。给出所选择的两个第一数据的发生时刻之间的时间间隔的计算。从第二数据片段中选择两个第二数据片段。给出由所选择的两个第一数据段表示的方向之间的方向差的计算。给出由所选择的两个第二数据段表示的暂定旋转角之间的旋转角差的计算。在计算出的方向差等于或小于预定方向差的情况下，响应于计算出的时间间隔和计算出的旋转角差来计算第一传感器的输出信号中的偏移量。响应于所计算的偏移量，将第一传感器的输出信号校正为无偏移信号。无偏移信号被积分以产生表示车体的最终旋转角度的信号。

20. 发明授权

US5621676A Discrete cosine transformation system and inverse discrete cosine transformation system, having simple structure and operable at high speed 失效
标题翻译：离散余弦变换系统和逆离散余弦变换系统，结构简单，运行速度快
公开(公告)号：US5621676A
公开(公告)日：1997-04-15
申请号：US552497
申请日：1995-11-09
申请人： Eiji Iwata
发明人： Eiji Iwata
IPC分类号： G06F17/14 , G06F7/38
CPC分类号： G06F17/147 , G06F17/145
摘要： An 8.times.8 discrete cosine transformation (8.times.8 DCT) system with minimum multiplications, without a reduced accuracy of calculation, and operable at a high speed, and an 8.times.8 inverse discrete cosine transformation (IDCT) system are disclosed. The transformation matrices for an 8.times.8 DCT are factorized into a constant matrix [Q] and a matrix [R], and the relationship between the original input data [X] and the output matrix data [C] can be defined by [C]=1/2 [R] [Q] [X]. The matrix [Q] consists of 0, 1, and -1, while the matrix [R] consists of irrational numbers defined by the 8.times.8 DCT. The computation of the constant matrix [Q] to the matrix data [X] can be realized by an addition and subtraction operation, while multiplication is performed just for the computation of the matrix [R]. The addition and subtraction circuit performs a computation between [X] and [Q], while the multiplication and addition circuit performs a computation between the result of computation of the addition and subtraction circuit and the matrix [R]. Also, an 8.times.8 IDCT performs the computation inverse to the 8.times.8 DCT.
摘要翻译：公开了一种具有最小乘法的8×8离散余弦变换（8×8 DCT）系统，没有降低的计算精度并且可以高速运行，并且具有8×8的逆离散余弦变换（IDCT）系统。 8×8 DCT的变换矩阵被分解为常数矩阵[Q]和矩阵[R]，原始输入数据[X]和输出矩阵数据[C]之间的关系可以由[C] = + E，fra 1/2 + EE [R] [Q] [X]。矩阵[Q]由0，1和-1组成，而矩阵[R]由8x8 DCT定义的无理数组成。常数矩阵[Q]到矩阵数据[X]的计算可以通过加法运算和减法运算来实现，而乘法仅用于矩阵[R]的计算。加法和减法电路在[X]和[Q]之间执行计算，而乘法和加法电路执行加法和减法电路的计算结果与矩阵[R]之间的计算。此外，8×8 IDCT执行与8×8 DCT相反的计算。

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